[mirror_ubuntu-artful-kernel.git] / drivers / cpufreq / intel_pstate.c

/*
 * intel_pstate.c: Native P state management for Intel processors
 *
 * (C) Copyright 2012 Intel Corporation
 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; version 2
 * of the License.
 */

#include <linux/kernel.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/ktime.h>
#include <linux/hrtimer.h>
#include <linux/tick.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/list.h>
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/sysfs.h>
#include <linux/types.h>
#include <linux/fs.h>
#include <linux/debugfs.h>
#include <trace/events/power.h>

#include <asm/div64.h>
#include <asm/msr.h>
#include <asm/cpu_device_id.h>

#define SAMPLE_COUNT		3

#define FRAC_BITS 8
#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
#define fp_toint(X) ((X) >> FRAC_BITS)

static inline int32_t mul_fp(int32_t x, int32_t y)
{
	return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
}

static inline int32_t div_fp(int32_t x, int32_t y)
{
	return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
}

struct sample {
	int32_t core_pct_busy;
	u64 aperf;
	u64 mperf;
	int freq;
};

struct pstate_data {
	int	current_pstate;
	int	min_pstate;
	int	max_pstate;
	int	turbo_pstate;
};

struct _pid {
	int setpoint;
	int32_t integral;
	int32_t p_gain;
	int32_t i_gain;
	int32_t d_gain;
	int deadband;
	int32_t last_err;
};

struct cpudata {
	int cpu;

	char name[64];

	struct timer_list timer;

	struct pstate_adjust_policy *pstate_policy;
	struct pstate_data pstate;
	struct _pid pid;

	int min_pstate_count;

	u64	prev_aperf;
	u64	prev_mperf;
	int	sample_ptr;
	struct sample samples[SAMPLE_COUNT];
};

static struct cpudata **all_cpu_data;
struct pstate_adjust_policy {
	int sample_rate_ms;
	int deadband;
	int setpoint;
	int p_gain_pct;
	int d_gain_pct;
	int i_gain_pct;
};

static struct pstate_adjust_policy default_policy = {
	.sample_rate_ms = 10,
	.deadband = 0,
	.setpoint = 97,
	.p_gain_pct = 20,
	.d_gain_pct = 0,
	.i_gain_pct = 0,
};

struct perf_limits {
	int no_turbo;
	int max_perf_pct;
	int min_perf_pct;
	int32_t max_perf;
	int32_t min_perf;
	int max_policy_pct;
	int max_sysfs_pct;
};

static struct perf_limits limits = {
	.no_turbo = 0,
	.max_perf_pct = 100,
	.max_perf = int_tofp(1),
	.min_perf_pct = 0,
	.min_perf = 0,
	.max_policy_pct = 100,
	.max_sysfs_pct = 100,
};

static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
			int deadband, int integral) {
	pid->setpoint = setpoint;
	pid->deadband  = deadband;
	pid->integral  = int_tofp(integral);
	pid->last_err  = setpoint - busy;
}

static inline void pid_p_gain_set(struct _pid *pid, int percent)
{
	pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
}

static inline void pid_i_gain_set(struct _pid *pid, int percent)
{
	pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
}

static inline void pid_d_gain_set(struct _pid *pid, int percent)
{

	pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
}

static signed int pid_calc(struct _pid *pid, int32_t busy)
{
	signed int result;
	int32_t pterm, dterm, fp_error;
	int32_t integral_limit;

	fp_error = int_tofp(pid->setpoint) - busy;

	if (abs(fp_error) <= int_tofp(pid->deadband))
		return 0;

	pterm = mul_fp(pid->p_gain, fp_error);

	pid->integral += fp_error;

	/* limit the integral term */
	integral_limit = int_tofp(30);
	if (pid->integral > integral_limit)
		pid->integral = integral_limit;
	if (pid->integral < -integral_limit)
		pid->integral = -integral_limit;

	dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
	pid->last_err = fp_error;

	result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;

	return (signed int)fp_toint(result);
}

static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
{
	pid_p_gain_set(&cpu->pid, cpu->pstate_policy->p_gain_pct);
	pid_d_gain_set(&cpu->pid, cpu->pstate_policy->d_gain_pct);
	pid_i_gain_set(&cpu->pid, cpu->pstate_policy->i_gain_pct);

	pid_reset(&cpu->pid,
		cpu->pstate_policy->setpoint,
		100,
		cpu->pstate_policy->deadband,
		0);
}

static inline void intel_pstate_reset_all_pid(void)
{
	unsigned int cpu;
	for_each_online_cpu(cpu) {
		if (all_cpu_data[cpu])
			intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
	}
}

/************************** debugfs begin ************************/
static int pid_param_set(void *data, u64 val)
{
	*(u32 *)data = val;
	intel_pstate_reset_all_pid();
	return 0;
}
static int pid_param_get(void *data, u64 *val)
{
	*val = *(u32 *)data;
	return 0;
}
DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
			pid_param_set, "%llu\n");

struct pid_param {
	char *name;
	void *value;
};

static struct pid_param pid_files[] = {
	{"sample_rate_ms", &default_policy.sample_rate_ms},
	{"d_gain_pct", &default_policy.d_gain_pct},
	{"i_gain_pct", &default_policy.i_gain_pct},
	{"deadband", &default_policy.deadband},
	{"setpoint", &default_policy.setpoint},
	{"p_gain_pct", &default_policy.p_gain_pct},
	{NULL, NULL}
};

static struct dentry *debugfs_parent;
static void intel_pstate_debug_expose_params(void)
{
	int i = 0;

	debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
	if (IS_ERR_OR_NULL(debugfs_parent))
		return;
	while (pid_files[i].name) {
		debugfs_create_file(pid_files[i].name, 0660,
				debugfs_parent, pid_files[i].value,
				&fops_pid_param);
		i++;
	}
}

/************************** debugfs end ************************/

/************************** sysfs begin ************************/
#define show_one(file_name, object)					\
	static ssize_t show_##file_name					\
	(struct kobject *kobj, struct attribute *attr, char *buf)	\
	{								\
		return sprintf(buf, "%u\n", limits.object);		\
	}

static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
				const char *buf, size_t count)
{
	unsigned int input;
	int ret;
	ret = sscanf(buf, "%u", &input);
	if (ret != 1)
		return -EINVAL;
	limits.no_turbo = clamp_t(int, input, 0 , 1);

	return count;
}

static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
				const char *buf, size_t count)
{
	unsigned int input;
	int ret;
	ret = sscanf(buf, "%u", &input);
	if (ret != 1)
		return -EINVAL;

	limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
	return count;
}

static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
				const char *buf, size_t count)
{
	unsigned int input;
	int ret;
	ret = sscanf(buf, "%u", &input);
	if (ret != 1)
		return -EINVAL;
	limits.min_perf_pct = clamp_t(int, input, 0 , 100);
	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));

	return count;
}

show_one(no_turbo, no_turbo);
show_one(max_perf_pct, max_perf_pct);
show_one(min_perf_pct, min_perf_pct);

define_one_global_rw(no_turbo);
define_one_global_rw(max_perf_pct);
define_one_global_rw(min_perf_pct);

static struct attribute *intel_pstate_attributes[] = {
	&no_turbo.attr,
	&max_perf_pct.attr,
	&min_perf_pct.attr,
	NULL
};

static struct attribute_group intel_pstate_attr_group = {
	.attrs = intel_pstate_attributes,
};
static struct kobject *intel_pstate_kobject;

static void intel_pstate_sysfs_expose_params(void)
{
	int rc;

	intel_pstate_kobject = kobject_create_and_add("intel_pstate",
						&cpu_subsys.dev_root->kobj);
	BUG_ON(!intel_pstate_kobject);
	rc = sysfs_create_group(intel_pstate_kobject,
				&intel_pstate_attr_group);
	BUG_ON(rc);
}

/************************** sysfs end ************************/

static int intel_pstate_min_pstate(void)
{
	u64 value;
	rdmsrl(MSR_PLATFORM_INFO, value);
	return (value >> 40) & 0xFF;
}

static int intel_pstate_max_pstate(void)
{
	u64 value;
	rdmsrl(MSR_PLATFORM_INFO, value);
	return (value >> 8) & 0xFF;
}

static int intel_pstate_turbo_pstate(void)
{
	u64 value;
	int nont, ret;
	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
	nont = intel_pstate_max_pstate();
	ret = ((value) & 255);
	if (ret <= nont)
		ret = nont;
	return ret;
}

static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
{
	int max_perf = cpu->pstate.turbo_pstate;
	int min_perf;
	if (limits.no_turbo)
		max_perf = cpu->pstate.max_pstate;

	max_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
	*max = clamp_t(int, max_perf,
			cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);

	min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
	*min = clamp_t(int, min_perf,
			cpu->pstate.min_pstate, max_perf);
}

static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
{
	int max_perf, min_perf;
	u64 val;

	intel_pstate_get_min_max(cpu, &min_perf, &max_perf);

	pstate = clamp_t(int, pstate, min_perf, max_perf);

	if (pstate == cpu->pstate.current_pstate)
		return;

	trace_cpu_frequency(pstate * 100000, cpu->cpu);

	cpu->pstate.current_pstate = pstate;
	val = pstate << 8;
	if (limits.no_turbo)
		val |= (u64)1 << 32;

	wrmsrl(MSR_IA32_PERF_CTL, val);
}

static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
{
	int target;
	target = cpu->pstate.current_pstate + steps;

	intel_pstate_set_pstate(cpu, target);
}

static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
{
	int target;
	target = cpu->pstate.current_pstate - steps;
	intel_pstate_set_pstate(cpu, target);
}

static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
{
	sprintf(cpu->name, "Intel 2nd generation core");

	cpu->pstate.min_pstate = intel_pstate_min_pstate();
	cpu->pstate.max_pstate = intel_pstate_max_pstate();
	cpu->pstate.turbo_pstate = intel_pstate_turbo_pstate();

	/*
	 * goto max pstate so we don't slow up boot if we are built-in if we are
	 * a module we will take care of it during normal operation
	 */
	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
}

static inline void intel_pstate_calc_busy(struct cpudata *cpu,
					struct sample *sample)
{
	u64 core_pct;
	core_pct = div64_u64(int_tofp(sample->aperf * 100),
			     sample->mperf);
	sample->freq = fp_toint(cpu->pstate.max_pstate * core_pct * 1000);

	sample->core_pct_busy = core_pct;
}

static inline void intel_pstate_sample(struct cpudata *cpu)
{
	u64 aperf, mperf;

	rdmsrl(MSR_IA32_APERF, aperf);
	rdmsrl(MSR_IA32_MPERF, mperf);
	cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
	cpu->samples[cpu->sample_ptr].aperf = aperf;
	cpu->samples[cpu->sample_ptr].mperf = mperf;
	cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
	cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;

	intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);

	cpu->prev_aperf = aperf;
	cpu->prev_mperf = mperf;
}

static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
{
	int sample_time, delay;

	sample_time = cpu->pstate_policy->sample_rate_ms;
	delay = msecs_to_jiffies(sample_time);
	mod_timer_pinned(&cpu->timer, jiffies + delay);
}

static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
{
	int32_t core_busy, max_pstate, current_pstate;

	core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
	max_pstate = int_tofp(cpu->pstate.max_pstate);
	current_pstate = int_tofp(cpu->pstate.current_pstate);
	return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
}

static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
{
	int32_t busy_scaled;
	struct _pid *pid;
	signed int ctl = 0;
	int steps;

	pid = &cpu->pid;
	busy_scaled = intel_pstate_get_scaled_busy(cpu);

	ctl = pid_calc(pid, busy_scaled);

	steps = abs(ctl);
	if (ctl < 0)
		intel_pstate_pstate_increase(cpu, steps);
	else
		intel_pstate_pstate_decrease(cpu, steps);
}

static void intel_pstate_timer_func(unsigned long __data)
{
	struct cpudata *cpu = (struct cpudata *) __data;

	intel_pstate_sample(cpu);
	intel_pstate_adjust_busy_pstate(cpu);

	if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
		cpu->min_pstate_count++;
		if (!(cpu->min_pstate_count % 5)) {
			intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
		}
	} else
		cpu->min_pstate_count = 0;

	intel_pstate_set_sample_time(cpu);
}

#define ICPU(model, policy) \
	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy }

static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
	ICPU(0x2a, default_policy),
	ICPU(0x2d, default_policy),
	ICPU(0x3a, default_policy),
	ICPU(0x3c, default_policy),
	ICPU(0x3e, default_policy),
	ICPU(0x3f, default_policy),
	ICPU(0x45, default_policy),
	ICPU(0x46, default_policy),
	{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);

static int intel_pstate_init_cpu(unsigned int cpunum)
{

	const struct x86_cpu_id *id;
	struct cpudata *cpu;

	id = x86_match_cpu(intel_pstate_cpu_ids);
	if (!id)
		return -ENODEV;

	all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
	if (!all_cpu_data[cpunum])
		return -ENOMEM;

	cpu = all_cpu_data[cpunum];

	intel_pstate_get_cpu_pstates(cpu);

	cpu->cpu = cpunum;
	cpu->pstate_policy =
		(struct pstate_adjust_policy *)id->driver_data;
	init_timer_deferrable(&cpu->timer);
	cpu->timer.function = intel_pstate_timer_func;
	cpu->timer.data =
		(unsigned long)cpu;
	cpu->timer.expires = jiffies + HZ/100;
	intel_pstate_busy_pid_reset(cpu);
	intel_pstate_sample(cpu);
	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);

	add_timer_on(&cpu->timer, cpunum);

	pr_info("Intel pstate controlling: cpu %d\n", cpunum);

	return 0;
}

static unsigned int intel_pstate_get(unsigned int cpu_num)
{
	struct sample *sample;
	struct cpudata *cpu;

	cpu = all_cpu_data[cpu_num];
	if (!cpu)
		return 0;
	sample = &cpu->samples[cpu->sample_ptr];
	return sample->freq;
}

static int intel_pstate_set_policy(struct cpufreq_policy *policy)
{
	struct cpudata *cpu;

	cpu = all_cpu_data[policy->cpu];

	if (!policy->cpuinfo.max_freq)
		return -ENODEV;

	if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
		limits.min_perf_pct = 100;
		limits.min_perf = int_tofp(1);
		limits.max_perf_pct = 100;
		limits.max_perf = int_tofp(1);
		limits.no_turbo = 0;
		return 0;
	}
	limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
	limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));

	limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
	limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));

	return 0;
}

static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
{
	cpufreq_verify_within_limits(policy,
				policy->cpuinfo.min_freq,
				policy->cpuinfo.max_freq);

	if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
		(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
		return -EINVAL;

	return 0;
}

static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
{
	int cpu = policy->cpu;

	del_timer(&all_cpu_data[cpu]->timer);
	kfree(all_cpu_data[cpu]);
	all_cpu_data[cpu] = NULL;
	return 0;
}

static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
{
	struct cpudata *cpu;
	int rc;

	rc = intel_pstate_init_cpu(policy->cpu);
	if (rc)
		return rc;

	cpu = all_cpu_data[policy->cpu];

	if (!limits.no_turbo &&
		limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
		policy->policy = CPUFREQ_POLICY_PERFORMANCE;
	else
		policy->policy = CPUFREQ_POLICY_POWERSAVE;

	policy->min = cpu->pstate.min_pstate * 100000;
	policy->max = cpu->pstate.turbo_pstate * 100000;

	/* cpuinfo and default policy values */
	policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
	policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
	policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
	cpumask_set_cpu(policy->cpu, policy->cpus);

	return 0;
}

static struct cpufreq_driver intel_pstate_driver = {
	.flags		= CPUFREQ_CONST_LOOPS,
	.verify		= intel_pstate_verify_policy,
	.setpolicy	= intel_pstate_set_policy,
	.get		= intel_pstate_get,
	.init		= intel_pstate_cpu_init,
	.exit		= intel_pstate_cpu_exit,
	.name		= "intel_pstate",
};

static int __initdata no_load;

static int intel_pstate_msrs_not_valid(void)
{
	/* Check that all the msr's we are using are valid. */
	u64 aperf, mperf, tmp;

	rdmsrl(MSR_IA32_APERF, aperf);
	rdmsrl(MSR_IA32_MPERF, mperf);

	if (!intel_pstate_min_pstate() ||
		!intel_pstate_max_pstate() ||
		!intel_pstate_turbo_pstate())
		return -ENODEV;

	rdmsrl(MSR_IA32_APERF, tmp);
	if (!(tmp - aperf))
		return -ENODEV;

	rdmsrl(MSR_IA32_MPERF, tmp);
	if (!(tmp - mperf))
		return -ENODEV;

	return 0;
}
static int __init intel_pstate_init(void)
{
	int cpu, rc = 0;
	const struct x86_cpu_id *id;

	if (no_load)
		return -ENODEV;

	id = x86_match_cpu(intel_pstate_cpu_ids);
	if (!id)
		return -ENODEV;

	if (intel_pstate_msrs_not_valid())
		return -ENODEV;

	pr_info("Intel P-state driver initializing.\n");

	all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
	if (!all_cpu_data)
		return -ENOMEM;

	rc = cpufreq_register_driver(&intel_pstate_driver);
	if (rc)
		goto out;

	intel_pstate_debug_expose_params();
	intel_pstate_sysfs_expose_params();
	return rc;
out:
	get_online_cpus();
	for_each_online_cpu(cpu) {
		if (all_cpu_data[cpu]) {
			del_timer_sync(&all_cpu_data[cpu]->timer);
			kfree(all_cpu_data[cpu]);
		}
	}

	put_online_cpus();
	vfree(all_cpu_data);
	return -ENODEV;
}
device_initcall(intel_pstate_init);

static int __init intel_pstate_setup(char *str)
{
	if (!str)
		return -EINVAL;

	if (!strcmp(str, "disable"))
		no_load = 1;
	return 0;
}
early_param("intel_pstate", intel_pstate_setup);

MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
MODULE_LICENSE("GPL");
Commit	Line	Data
93f0822d	1	/*
d1b68485	2	* intel_pstate.c: Native P state management for Intel processors
93f0822d DB	3	*
	4	* (C) Copyright 2012 Intel Corporation
	5	* Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; version 2
	10	* of the License.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/kernel_stat.h>
	15	#include <linux/module.h>
	16	#include <linux/ktime.h>
	17	#include <linux/hrtimer.h>
	18	#include <linux/tick.h>
	19	#include <linux/slab.h>
	20	#include <linux/sched.h>
	21	#include <linux/list.h>
	22	#include <linux/cpu.h>
	23	#include <linux/cpufreq.h>
	24	#include <linux/sysfs.h>
	25	#include <linux/types.h>
	26	#include <linux/fs.h>
	27	#include <linux/debugfs.h>
	28	#include <trace/events/power.h>
	29
	30	#include <asm/div64.h>
	31	#include <asm/msr.h>
	32	#include <asm/cpu_device_id.h>
	33
	34	#define SAMPLE_COUNT 3
	35
	36	#define FRAC_BITS 8
	37	#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
	38	#define fp_toint(X) ((X) >> FRAC_BITS)
	39
	40	static inline int32_t mul_fp(int32_t x, int32_t y)
	41	{
	42	return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
	43	}
	44
	45	static inline int32_t div_fp(int32_t x, int32_t y)
	46	{
	47	return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
	48	}
	49
	50	struct sample {
d253d2a5	51	int32_t core_pct_busy;
93f0822d DB	52	u64 aperf;
	53	u64 mperf;
	54	int freq;
	55	};
	56
	57	struct pstate_data {
	58	int current_pstate;
	59	int min_pstate;
	60	int max_pstate;
	61	int turbo_pstate;
	62	};
	63
	64	struct _pid {
	65	int setpoint;
	66	int32_t integral;
	67	int32_t p_gain;
	68	int32_t i_gain;
	69	int32_t d_gain;
	70	int deadband;
d253d2a5	71	int32_t last_err;
93f0822d DB	72	};
	73
	74	struct cpudata {
	75	int cpu;
	76
	77	char name[64];
	78
	79	struct timer_list timer;
	80
	81	struct pstate_adjust_policy *pstate_policy;
	82	struct pstate_data pstate;
	83	struct _pid pid;
93f0822d DB	84
93f0822d DB	85	int min_pstate_count;
93f0822d	86
93f0822d DB	87	u64 prev_aperf;
	88	u64 prev_mperf;
	89	int sample_ptr;
	90	struct sample samples[SAMPLE_COUNT];
	91	};
	92
	93	static struct cpudata **all_cpu_data;
	94	struct pstate_adjust_policy {
	95	int sample_rate_ms;
	96	int deadband;
	97	int setpoint;
	98	int p_gain_pct;
	99	int d_gain_pct;
	100	int i_gain_pct;
	101	};
	102
	103	static struct pstate_adjust_policy default_policy = {
	104	.sample_rate_ms = 10,
	105	.deadband = 0,
2134ed4d DB	106	.setpoint = 97,
2134ed4d DB	107	.p_gain_pct = 20,
93f0822d	108	.d_gain_pct = 0,
2134ed4d	109	.i_gain_pct = 0,
93f0822d DB	110	};
	111
	112	struct perf_limits {
	113	int no_turbo;
	114	int max_perf_pct;
	115	int min_perf_pct;
	116	int32_t max_perf;
	117	int32_t min_perf;
d8f469e9 DB	118	int max_policy_pct;
d8f469e9 DB	119	int max_sysfs_pct;
93f0822d DB	120	};
	121
	122	static struct perf_limits limits = {
	123	.no_turbo = 0,
	124	.max_perf_pct = 100,
	125	.max_perf = int_tofp(1),
	126	.min_perf_pct = 0,
	127	.min_perf = 0,
d8f469e9 DB	128	.max_policy_pct = 100,
d8f469e9 DB	129	.max_sysfs_pct = 100,
93f0822d DB	130	};
	131
	132	static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
	133	int deadband, int integral) {
	134	pid->setpoint = setpoint;
	135	pid->deadband = deadband;
	136	pid->integral = int_tofp(integral);
	137	pid->last_err = setpoint - busy;
	138	}
	139
	140	static inline void pid_p_gain_set(struct _pid *pid, int percent)
	141	{
	142	pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
	143	}
	144
	145	static inline void pid_i_gain_set(struct _pid *pid, int percent)
	146	{
	147	pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
	148	}
	149
	150	static inline void pid_d_gain_set(struct _pid *pid, int percent)
	151	{
	152
	153	pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
	154	}
	155
d253d2a5	156	static signed int pid_calc(struct _pid *pid, int32_t busy)
93f0822d	157	{
d253d2a5	158	signed int result;
93f0822d DB	159	int32_t pterm, dterm, fp_error;
	160	int32_t integral_limit;
	161
d253d2a5	162	fp_error = int_tofp(pid->setpoint) - busy;
93f0822d	163
d253d2a5	164	if (abs(fp_error) <= int_tofp(pid->deadband))
93f0822d DB	165	return 0;
	166
	167	pterm = mul_fp(pid->p_gain, fp_error);
	168
	169	pid->integral += fp_error;
	170
	171	/* limit the integral term */
	172	integral_limit = int_tofp(30);
	173	if (pid->integral > integral_limit)
	174	pid->integral = integral_limit;
	175	if (pid->integral < -integral_limit)
	176	pid->integral = -integral_limit;
	177
d253d2a5 BS	178	dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
d253d2a5 BS	179	pid->last_err = fp_error;
93f0822d DB	180
	181	result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
	182
	183	return (signed int)fp_toint(result);
	184	}
	185
	186	static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
	187	{
	188	pid_p_gain_set(&cpu->pid, cpu->pstate_policy->p_gain_pct);
	189	pid_d_gain_set(&cpu->pid, cpu->pstate_policy->d_gain_pct);
	190	pid_i_gain_set(&cpu->pid, cpu->pstate_policy->i_gain_pct);
	191
	192	pid_reset(&cpu->pid,
	193	cpu->pstate_policy->setpoint,
	194	100,
	195	cpu->pstate_policy->deadband,
	196	0);
	197	}
	198
93f0822d DB	199	static inline void intel_pstate_reset_all_pid(void)
	200	{
	201	unsigned int cpu;
	202	for_each_online_cpu(cpu) {
	203	if (all_cpu_data[cpu])
	204	intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
	205	}
	206	}
	207
	208	/************************ debugfs begin **********************/
	209	static int pid_param_set(void *data, u64 val)
	210	{
	211	(u32 )data = val;
	212	intel_pstate_reset_all_pid();
	213	return 0;
	214	}
	215	static int pid_param_get(void data, u64 val)
	216	{
	217	val = (u32 *)data;
	218	return 0;
	219	}
	220	DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
	221	pid_param_set, "%llu\n");
	222
	223	struct pid_param {
	224	char *name;
	225	void *value;
	226	};
	227
	228	static struct pid_param pid_files[] = {
	229	{"sample_rate_ms", &default_policy.sample_rate_ms},
	230	{"d_gain_pct", &default_policy.d_gain_pct},
	231	{"i_gain_pct", &default_policy.i_gain_pct},
	232	{"deadband", &default_policy.deadband},
	233	{"setpoint", &default_policy.setpoint},
	234	{"p_gain_pct", &default_policy.p_gain_pct},
	235	{NULL, NULL}
	236	};
	237
	238	static struct dentry *debugfs_parent;
	239	static void intel_pstate_debug_expose_params(void)
	240	{
	241	int i = 0;
	242
	243	debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
	244	if (IS_ERR_OR_NULL(debugfs_parent))
	245	return;
	246	while (pid_files[i].name) {
	247	debugfs_create_file(pid_files[i].name, 0660,
	248	debugfs_parent, pid_files[i].value,
	249	&fops_pid_param);
	250	i++;
	251	}
	252	}
	253
	254	/************************ debugfs end **********************/
	255
	256	/************************ sysfs begin **********************/
	257	#define show_one(file_name, object) \
	258	static ssize_t show_##file_name \
	259	(struct kobject kobj, struct attribute attr, char *buf) \
	260	{ \
	261	return sprintf(buf, "%u\n", limits.object); \
	262	}
263
264	static ssize_t store_no_turbo(struct kobject a, struct attribute b,
265	const char *buf, size_t count)
266	{
267	unsigned int input;
268	int ret;
269	ret = sscanf(buf, "%u", &input);
270	if (ret != 1)
271	return -EINVAL;
272	limits.no_turbo = clamp_t(int, input, 0 , 1);
273
274	return count;
275	}
276
277	static ssize_t store_max_perf_pct(struct kobject a, struct attribute b,
278	const char *buf, size_t count)
279	{
280	unsigned int input;
281	int ret;
282	ret = sscanf(buf, "%u", &input);
283	if (ret != 1)
284	return -EINVAL;
285
d8f469e9 DB	286	limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
d8f469e9 DB	287	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
93f0822d DB	288	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
	289	return count;
	290	}
	291
	292	static ssize_t store_min_perf_pct(struct kobject a, struct attribute b,
	293	const char *buf, size_t count)
	294	{
	295	unsigned int input;
	296	int ret;
	297	ret = sscanf(buf, "%u", &input);
	298	if (ret != 1)
	299	return -EINVAL;
	300	limits.min_perf_pct = clamp_t(int, input, 0 , 100);
	301	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
	302
	303	return count;
	304	}
	305
	306	show_one(no_turbo, no_turbo);
	307	show_one(max_perf_pct, max_perf_pct);
	308	show_one(min_perf_pct, min_perf_pct);
	309
	310	define_one_global_rw(no_turbo);
	311	define_one_global_rw(max_perf_pct);
	312	define_one_global_rw(min_perf_pct);
	313
	314	static struct attribute *intel_pstate_attributes[] = {
	315	&no_turbo.attr,
	316	&max_perf_pct.attr,
	317	&min_perf_pct.attr,
	318	NULL
	319	};
	320
	321	static struct attribute_group intel_pstate_attr_group = {
	322	.attrs = intel_pstate_attributes,
	323	};
	324	static struct kobject *intel_pstate_kobject;
	325
	326	static void intel_pstate_sysfs_expose_params(void)
	327	{
	328	int rc;
	329
	330	intel_pstate_kobject = kobject_create_and_add("intel_pstate",
	331	&cpu_subsys.dev_root->kobj);
	332	BUG_ON(!intel_pstate_kobject);
	333	rc = sysfs_create_group(intel_pstate_kobject,
	334	&intel_pstate_attr_group);
	335	BUG_ON(rc);
	336	}
	337
	338	/************************ sysfs end **********************/
	339
	340	static int intel_pstate_min_pstate(void)
	341	{
	342	u64 value;
05e99c8c	343	rdmsrl(MSR_PLATFORM_INFO, value);
93f0822d DB	344	return (value >> 40) & 0xFF;
	345	}
	346
	347	static int intel_pstate_max_pstate(void)
	348	{
	349	u64 value;
05e99c8c	350	rdmsrl(MSR_PLATFORM_INFO, value);
93f0822d DB	351	return (value >> 8) & 0xFF;
	352	}
	353
	354	static int intel_pstate_turbo_pstate(void)
	355	{
	356	u64 value;
	357	int nont, ret;
05e99c8c	358	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
93f0822d DB	359	nont = intel_pstate_max_pstate();
	360	ret = ((value) & 255);
	361	if (ret <= nont)
	362	ret = nont;
	363	return ret;
	364	}
	365
	366	static void intel_pstate_get_min_max(struct cpudata cpu, int min, int *max)
	367	{
	368	int max_perf = cpu->pstate.turbo_pstate;
	369	int min_perf;
	370	if (limits.no_turbo)
	371	max_perf = cpu->pstate.max_pstate;
	372
	373	max_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
	374	*max = clamp_t(int, max_perf,
	375	cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
	376
	377	min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
	378	*min = clamp_t(int, min_perf,
	379	cpu->pstate.min_pstate, max_perf);
	380	}
	381
	382	static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
	383	{
	384	int max_perf, min_perf;
09c87e2f	385	u64 val;
93f0822d DB	386
	387	intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
	388
	389	pstate = clamp_t(int, pstate, min_perf, max_perf);
	390
	391	if (pstate == cpu->pstate.current_pstate)
	392	return;
	393
93f0822d	394	trace_cpu_frequency(pstate * 100000, cpu->cpu);
35363e94	395
93f0822d	396	cpu->pstate.current_pstate = pstate;
09c87e2f	397	val = pstate << 8;
1ccf7a1c	398	if (limits.no_turbo)
09c87e2f	399	val \|= (u64)1 << 32;
93f0822d	400
09c87e2f	401	wrmsrl(MSR_IA32_PERF_CTL, val);
93f0822d DB	402	}
	403
	404	static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
	405	{
	406	int target;
	407	target = cpu->pstate.current_pstate + steps;
	408
	409	intel_pstate_set_pstate(cpu, target);
	410	}
	411
	412	static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
	413	{
	414	int target;
	415	target = cpu->pstate.current_pstate - steps;
	416	intel_pstate_set_pstate(cpu, target);
	417	}
	418
	419	static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
	420	{
	421	sprintf(cpu->name, "Intel 2nd generation core");
	422
	423	cpu->pstate.min_pstate = intel_pstate_min_pstate();
	424	cpu->pstate.max_pstate = intel_pstate_max_pstate();
	425	cpu->pstate.turbo_pstate = intel_pstate_turbo_pstate();
	426
	427	/*
	428	* goto max pstate so we don't slow up boot if we are built-in if we are
	429	* a module we will take care of it during normal operation
	430	*/
	431	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
	432	}
	433
	434	static inline void intel_pstate_calc_busy(struct cpudata *cpu,
	435	struct sample *sample)
	436	{
	437	u64 core_pct;
d253d2a5 BS	438	core_pct = div64_u64(int_tofp(sample->aperf * 100),
	439	sample->mperf);
	440	sample->freq = fp_toint(cpu->pstate.max_pstate * core_pct * 1000);
93f0822d	441
1abc4b20	442	sample->core_pct_busy = core_pct;
93f0822d DB	443	}
	444
	445	static inline void intel_pstate_sample(struct cpudata *cpu)
	446	{
93f0822d DB	447	u64 aperf, mperf;
93f0822d DB	448
93f0822d DB	449	rdmsrl(MSR_IA32_APERF, aperf);
93f0822d DB	450	rdmsrl(MSR_IA32_MPERF, mperf);
1abc4b20 DB	451	cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
	452	cpu->samples[cpu->sample_ptr].aperf = aperf;
	453	cpu->samples[cpu->sample_ptr].mperf = mperf;
	454	cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
	455	cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
	456
	457	intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
93f0822d	458
93f0822d DB	459	cpu->prev_aperf = aperf;
	460	cpu->prev_mperf = mperf;
	461	}
	462
	463	static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
	464	{
	465	int sample_time, delay;
	466
	467	sample_time = cpu->pstate_policy->sample_rate_ms;
	468	delay = msecs_to_jiffies(sample_time);
93f0822d DB	469	mod_timer_pinned(&cpu->timer, jiffies + delay);
	470	}
	471
d253d2a5	472	static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
93f0822d	473	{
2134ed4d	474	int32_t core_busy, max_pstate, current_pstate;
93f0822d	475
d253d2a5	476	core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
2134ed4d	477	max_pstate = int_tofp(cpu->pstate.max_pstate);
93f0822d	478	current_pstate = int_tofp(cpu->pstate.current_pstate);
d253d2a5	479	return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
93f0822d DB	480	}
	481
	482	static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
	483	{
d253d2a5	484	int32_t busy_scaled;
93f0822d DB	485	struct _pid *pid;
	486	signed int ctl = 0;
	487	int steps;
	488
	489	pid = &cpu->pid;
	490	busy_scaled = intel_pstate_get_scaled_busy(cpu);
	491
	492	ctl = pid_calc(pid, busy_scaled);
	493
	494	steps = abs(ctl);
	495	if (ctl < 0)
	496	intel_pstate_pstate_increase(cpu, steps);
	497	else
	498	intel_pstate_pstate_decrease(cpu, steps);
	499	}
	500
93f0822d DB	501	static void intel_pstate_timer_func(unsigned long __data)
	502	{
	503	struct cpudata cpu = (struct cpudata ) __data;
	504
	505	intel_pstate_sample(cpu);
ca182aee	506	intel_pstate_adjust_busy_pstate(cpu);
93f0822d	507
93f0822d DB	508	if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
	509	cpu->min_pstate_count++;
	510	if (!(cpu->min_pstate_count % 5)) {
	511	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
93f0822d DB	512	}
	513	} else
	514	cpu->min_pstate_count = 0;
ca182aee	515
93f0822d DB	516	intel_pstate_set_sample_time(cpu);
	517	}
	518
	519	#define ICPU(model, policy) \
	520	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy }
	521
	522	static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
	523	ICPU(0x2a, default_policy),
	524	ICPU(0x2d, default_policy),
c96d53d6	525	ICPU(0x3a, default_policy),
6cdcdb79 NH	526	ICPU(0x3c, default_policy),
	527	ICPU(0x3e, default_policy),
	528	ICPU(0x3f, default_policy),
	529	ICPU(0x45, default_policy),
	530	ICPU(0x46, default_policy),
93f0822d DB	531	{}
	532	};
	533	MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
	534
	535	static int intel_pstate_init_cpu(unsigned int cpunum)
	536	{
	537
	538	const struct x86_cpu_id *id;
	539	struct cpudata *cpu;
	540
	541	id = x86_match_cpu(intel_pstate_cpu_ids);
	542	if (!id)
	543	return -ENODEV;
	544
	545	all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
	546	if (!all_cpu_data[cpunum])
	547	return -ENOMEM;
	548
	549	cpu = all_cpu_data[cpunum];
	550
	551	intel_pstate_get_cpu_pstates(cpu);
	552
	553	cpu->cpu = cpunum;
	554	cpu->pstate_policy =
	555	(struct pstate_adjust_policy *)id->driver_data;
	556	init_timer_deferrable(&cpu->timer);
	557	cpu->timer.function = intel_pstate_timer_func;
	558	cpu->timer.data =
	559	(unsigned long)cpu;
	560	cpu->timer.expires = jiffies + HZ/100;
	561	intel_pstate_busy_pid_reset(cpu);
93f0822d DB	562	intel_pstate_sample(cpu);
	563	intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
	564
	565	add_timer_on(&cpu->timer, cpunum);
	566
	567	pr_info("Intel pstate controlling: cpu %d\n", cpunum);
	568
	569	return 0;
	570	}
	571
	572	static unsigned int intel_pstate_get(unsigned int cpu_num)
	573	{
	574	struct sample *sample;
	575	struct cpudata *cpu;
	576
	577	cpu = all_cpu_data[cpu_num];
	578	if (!cpu)
	579	return 0;
	580	sample = &cpu->samples[cpu->sample_ptr];
	581	return sample->freq;
	582	}
	583
	584	static int intel_pstate_set_policy(struct cpufreq_policy *policy)
	585	{
	586	struct cpudata *cpu;
93f0822d DB	587
	588	cpu = all_cpu_data[policy->cpu];
	589
d3929b83 DB	590	if (!policy->cpuinfo.max_freq)
	591	return -ENODEV;
	592
93f0822d DB	593	if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
	594	limits.min_perf_pct = 100;
	595	limits.min_perf = int_tofp(1);
	596	limits.max_perf_pct = 100;
	597	limits.max_perf = int_tofp(1);
	598	limits.no_turbo = 0;
d1b68485	599	return 0;
93f0822d	600	}
d1b68485 SP	601	limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
	602	limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
	603	limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
	604
d8f469e9 DB	605	limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
	606	limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
	607	limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
d1b68485	608	limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
93f0822d DB	609
	610	return 0;
	611	}
	612
	613	static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
	614	{
	615	cpufreq_verify_within_limits(policy,
	616	policy->cpuinfo.min_freq,
	617	policy->cpuinfo.max_freq);
	618
	619	if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
	620	(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
	621	return -EINVAL;
	622
	623	return 0;
	624	}
	625
2760984f	626	static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
93f0822d DB	627	{
	628	int cpu = policy->cpu;
	629
	630	del_timer(&all_cpu_data[cpu]->timer);
	631	kfree(all_cpu_data[cpu]);
	632	all_cpu_data[cpu] = NULL;
	633	return 0;
	634	}
	635
2760984f	636	static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
93f0822d	637	{
93f0822d	638	struct cpudata *cpu;
52e0a509	639	int rc;
93f0822d DB	640
	641	rc = intel_pstate_init_cpu(policy->cpu);
	642	if (rc)
	643	return rc;
	644
	645	cpu = all_cpu_data[policy->cpu];
	646
	647	if (!limits.no_turbo &&
	648	limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
	649	policy->policy = CPUFREQ_POLICY_PERFORMANCE;
	650	else
	651	policy->policy = CPUFREQ_POLICY_POWERSAVE;
	652
52e0a509 DB	653	policy->min = cpu->pstate.min_pstate * 100000;
52e0a509 DB	654	policy->max = cpu->pstate.turbo_pstate * 100000;
93f0822d DB	655
	656	/* cpuinfo and default policy values */
	657	policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
	658	policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
	659	policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
	660	cpumask_set_cpu(policy->cpu, policy->cpus);
	661
	662	return 0;
	663	}
	664
	665	static struct cpufreq_driver intel_pstate_driver = {
	666	.flags = CPUFREQ_CONST_LOOPS,
	667	.verify = intel_pstate_verify_policy,
	668	.setpolicy = intel_pstate_set_policy,
	669	.get = intel_pstate_get,
	670	.init = intel_pstate_cpu_init,
	671	.exit = intel_pstate_cpu_exit,
	672	.name = "intel_pstate",
93f0822d DB	673	};
93f0822d DB	674
6be26498 DB	675	static int __initdata no_load;
6be26498 DB	676
b563b4e3 DB	677	static int intel_pstate_msrs_not_valid(void)
	678	{
	679	/* Check that all the msr's we are using are valid. */
	680	u64 aperf, mperf, tmp;
	681
	682	rdmsrl(MSR_IA32_APERF, aperf);
	683	rdmsrl(MSR_IA32_MPERF, mperf);
	684
	685	if (!intel_pstate_min_pstate() \|\|
	686	!intel_pstate_max_pstate() \|\|
	687	!intel_pstate_turbo_pstate())
	688	return -ENODEV;
	689
	690	rdmsrl(MSR_IA32_APERF, tmp);
	691	if (!(tmp - aperf))
	692	return -ENODEV;
	693
	694	rdmsrl(MSR_IA32_MPERF, tmp);
	695	if (!(tmp - mperf))
	696	return -ENODEV;
	697
	698	return 0;
	699	}
93f0822d DB	700	static int __init intel_pstate_init(void)
93f0822d DB	701	{
907cc908	702	int cpu, rc = 0;
93f0822d DB	703	const struct x86_cpu_id *id;
93f0822d DB	704
6be26498 DB	705	if (no_load)
	706	return -ENODEV;
	707
93f0822d DB	708	id = x86_match_cpu(intel_pstate_cpu_ids);
	709	if (!id)
	710	return -ENODEV;
	711
b563b4e3 DB	712	if (intel_pstate_msrs_not_valid())
	713	return -ENODEV;
	714
93f0822d DB	715	pr_info("Intel P-state driver initializing.\n");
93f0822d DB	716
b57ffac5	717	all_cpu_data = vzalloc(sizeof(void ) num_possible_cpus());
93f0822d DB	718	if (!all_cpu_data)
93f0822d DB	719	return -ENOMEM;
93f0822d DB	720
	721	rc = cpufreq_register_driver(&intel_pstate_driver);
	722	if (rc)
	723	goto out;
	724
	725	intel_pstate_debug_expose_params();
	726	intel_pstate_sysfs_expose_params();
	727	return rc;
	728	out:
907cc908 DB	729	get_online_cpus();
	730	for_each_online_cpu(cpu) {
	731	if (all_cpu_data[cpu]) {
	732	del_timer_sync(&all_cpu_data[cpu]->timer);
	733	kfree(all_cpu_data[cpu]);
	734	}
	735	}
	736
	737	put_online_cpus();
	738	vfree(all_cpu_data);
93f0822d DB	739	return -ENODEV;
	740	}
	741	device_initcall(intel_pstate_init);
	742
6be26498 DB	743	static int __init intel_pstate_setup(char *str)
	744	{
	745	if (!str)
	746	return -EINVAL;
	747
	748	if (!strcmp(str, "disable"))
	749	no_load = 1;
	750	return 0;
	751	}
	752	early_param("intel_pstate", intel_pstate_setup);
	753
93f0822d DB	754	MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
	755	MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
	756	MODULE_LICENSE("GPL");