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93f0822d | 1 | /* |
d1b68485 | 2 | * intel_pstate.c: Native P state management for Intel processors |
93f0822d DB |
3 | * |
4 | * (C) Copyright 2012 Intel Corporation | |
5 | * Author: Dirk Brandewie <dirk.j.brandewie@intel.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; version 2 | |
10 | * of the License. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/kernel_stat.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/ktime.h> | |
17 | #include <linux/hrtimer.h> | |
18 | #include <linux/tick.h> | |
19 | #include <linux/slab.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/list.h> | |
22 | #include <linux/cpu.h> | |
23 | #include <linux/cpufreq.h> | |
24 | #include <linux/sysfs.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/fs.h> | |
27 | #include <linux/debugfs.h> | |
28 | #include <trace/events/power.h> | |
29 | ||
30 | #include <asm/div64.h> | |
31 | #include <asm/msr.h> | |
32 | #include <asm/cpu_device_id.h> | |
33 | ||
34 | #define SAMPLE_COUNT 3 | |
35 | ||
19e77c28 DB |
36 | #define BYT_RATIOS 0x66a |
37 | ||
93f0822d DB |
38 | #define FRAC_BITS 8 |
39 | #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) | |
40 | #define fp_toint(X) ((X) >> FRAC_BITS) | |
41 | ||
42 | static inline int32_t mul_fp(int32_t x, int32_t y) | |
43 | { | |
44 | return ((int64_t)x * (int64_t)y) >> FRAC_BITS; | |
45 | } | |
46 | ||
47 | static inline int32_t div_fp(int32_t x, int32_t y) | |
48 | { | |
49 | return div_s64((int64_t)x << FRAC_BITS, (int64_t)y); | |
50 | } | |
51 | ||
52 | struct sample { | |
93f0822d | 53 | int core_pct_busy; |
93f0822d DB |
54 | u64 aperf; |
55 | u64 mperf; | |
56 | int freq; | |
57 | }; | |
58 | ||
59 | struct pstate_data { | |
60 | int current_pstate; | |
61 | int min_pstate; | |
62 | int max_pstate; | |
63 | int turbo_pstate; | |
64 | }; | |
65 | ||
66 | struct _pid { | |
67 | int setpoint; | |
68 | int32_t integral; | |
69 | int32_t p_gain; | |
70 | int32_t i_gain; | |
71 | int32_t d_gain; | |
72 | int deadband; | |
73 | int last_err; | |
74 | }; | |
75 | ||
76 | struct cpudata { | |
77 | int cpu; | |
78 | ||
79 | char name[64]; | |
80 | ||
81 | struct timer_list timer; | |
82 | ||
93f0822d DB |
83 | struct pstate_data pstate; |
84 | struct _pid pid; | |
93f0822d DB |
85 | |
86 | int min_pstate_count; | |
93f0822d | 87 | |
93f0822d DB |
88 | u64 prev_aperf; |
89 | u64 prev_mperf; | |
90 | int sample_ptr; | |
91 | struct sample samples[SAMPLE_COUNT]; | |
92 | }; | |
93 | ||
94 | static struct cpudata **all_cpu_data; | |
95 | struct pstate_adjust_policy { | |
96 | int sample_rate_ms; | |
97 | int deadband; | |
98 | int setpoint; | |
99 | int p_gain_pct; | |
100 | int d_gain_pct; | |
101 | int i_gain_pct; | |
102 | }; | |
103 | ||
016c8150 DB |
104 | struct pstate_funcs { |
105 | int (*get_max)(void); | |
106 | int (*get_min)(void); | |
107 | int (*get_turbo)(void); | |
108 | void (*set)(int pstate); | |
93f0822d DB |
109 | }; |
110 | ||
016c8150 DB |
111 | struct cpu_defaults { |
112 | struct pstate_adjust_policy pid_policy; | |
113 | struct pstate_funcs funcs; | |
114 | }; | |
115 | ||
116 | static struct pstate_adjust_policy pid_params; | |
117 | static struct pstate_funcs pstate_funcs; | |
118 | ||
93f0822d DB |
119 | struct perf_limits { |
120 | int no_turbo; | |
121 | int max_perf_pct; | |
122 | int min_perf_pct; | |
123 | int32_t max_perf; | |
124 | int32_t min_perf; | |
d8f469e9 DB |
125 | int max_policy_pct; |
126 | int max_sysfs_pct; | |
93f0822d DB |
127 | }; |
128 | ||
129 | static struct perf_limits limits = { | |
130 | .no_turbo = 0, | |
131 | .max_perf_pct = 100, | |
132 | .max_perf = int_tofp(1), | |
133 | .min_perf_pct = 0, | |
134 | .min_perf = 0, | |
d8f469e9 DB |
135 | .max_policy_pct = 100, |
136 | .max_sysfs_pct = 100, | |
93f0822d DB |
137 | }; |
138 | ||
139 | static inline void pid_reset(struct _pid *pid, int setpoint, int busy, | |
140 | int deadband, int integral) { | |
141 | pid->setpoint = setpoint; | |
142 | pid->deadband = deadband; | |
143 | pid->integral = int_tofp(integral); | |
144 | pid->last_err = setpoint - busy; | |
145 | } | |
146 | ||
147 | static inline void pid_p_gain_set(struct _pid *pid, int percent) | |
148 | { | |
149 | pid->p_gain = div_fp(int_tofp(percent), int_tofp(100)); | |
150 | } | |
151 | ||
152 | static inline void pid_i_gain_set(struct _pid *pid, int percent) | |
153 | { | |
154 | pid->i_gain = div_fp(int_tofp(percent), int_tofp(100)); | |
155 | } | |
156 | ||
157 | static inline void pid_d_gain_set(struct _pid *pid, int percent) | |
158 | { | |
159 | ||
160 | pid->d_gain = div_fp(int_tofp(percent), int_tofp(100)); | |
161 | } | |
162 | ||
163 | static signed int pid_calc(struct _pid *pid, int busy) | |
164 | { | |
165 | signed int err, result; | |
166 | int32_t pterm, dterm, fp_error; | |
167 | int32_t integral_limit; | |
168 | ||
169 | err = pid->setpoint - busy; | |
170 | fp_error = int_tofp(err); | |
171 | ||
172 | if (abs(err) <= pid->deadband) | |
173 | return 0; | |
174 | ||
175 | pterm = mul_fp(pid->p_gain, fp_error); | |
176 | ||
177 | pid->integral += fp_error; | |
178 | ||
179 | /* limit the integral term */ | |
180 | integral_limit = int_tofp(30); | |
181 | if (pid->integral > integral_limit) | |
182 | pid->integral = integral_limit; | |
183 | if (pid->integral < -integral_limit) | |
184 | pid->integral = -integral_limit; | |
185 | ||
186 | dterm = mul_fp(pid->d_gain, (err - pid->last_err)); | |
187 | pid->last_err = err; | |
188 | ||
189 | result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm; | |
190 | ||
191 | return (signed int)fp_toint(result); | |
192 | } | |
193 | ||
194 | static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) | |
195 | { | |
016c8150 DB |
196 | pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); |
197 | pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); | |
198 | pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); | |
93f0822d DB |
199 | |
200 | pid_reset(&cpu->pid, | |
016c8150 | 201 | pid_params.setpoint, |
93f0822d | 202 | 100, |
016c8150 | 203 | pid_params.deadband, |
93f0822d DB |
204 | 0); |
205 | } | |
206 | ||
93f0822d DB |
207 | static inline void intel_pstate_reset_all_pid(void) |
208 | { | |
209 | unsigned int cpu; | |
210 | for_each_online_cpu(cpu) { | |
211 | if (all_cpu_data[cpu]) | |
212 | intel_pstate_busy_pid_reset(all_cpu_data[cpu]); | |
213 | } | |
214 | } | |
215 | ||
216 | /************************** debugfs begin ************************/ | |
217 | static int pid_param_set(void *data, u64 val) | |
218 | { | |
219 | *(u32 *)data = val; | |
220 | intel_pstate_reset_all_pid(); | |
221 | return 0; | |
222 | } | |
223 | static int pid_param_get(void *data, u64 *val) | |
224 | { | |
225 | *val = *(u32 *)data; | |
226 | return 0; | |
227 | } | |
228 | DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, | |
229 | pid_param_set, "%llu\n"); | |
230 | ||
231 | struct pid_param { | |
232 | char *name; | |
233 | void *value; | |
234 | }; | |
235 | ||
236 | static struct pid_param pid_files[] = { | |
016c8150 DB |
237 | {"sample_rate_ms", &pid_params.sample_rate_ms}, |
238 | {"d_gain_pct", &pid_params.d_gain_pct}, | |
239 | {"i_gain_pct", &pid_params.i_gain_pct}, | |
240 | {"deadband", &pid_params.deadband}, | |
241 | {"setpoint", &pid_params.setpoint}, | |
242 | {"p_gain_pct", &pid_params.p_gain_pct}, | |
93f0822d DB |
243 | {NULL, NULL} |
244 | }; | |
245 | ||
246 | static struct dentry *debugfs_parent; | |
247 | static void intel_pstate_debug_expose_params(void) | |
248 | { | |
249 | int i = 0; | |
250 | ||
251 | debugfs_parent = debugfs_create_dir("pstate_snb", NULL); | |
252 | if (IS_ERR_OR_NULL(debugfs_parent)) | |
253 | return; | |
254 | while (pid_files[i].name) { | |
255 | debugfs_create_file(pid_files[i].name, 0660, | |
256 | debugfs_parent, pid_files[i].value, | |
257 | &fops_pid_param); | |
258 | i++; | |
259 | } | |
260 | } | |
261 | ||
262 | /************************** debugfs end ************************/ | |
263 | ||
264 | /************************** sysfs begin ************************/ | |
265 | #define show_one(file_name, object) \ | |
266 | static ssize_t show_##file_name \ | |
267 | (struct kobject *kobj, struct attribute *attr, char *buf) \ | |
268 | { \ | |
269 | return sprintf(buf, "%u\n", limits.object); \ | |
270 | } | |
271 | ||
272 | static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, | |
273 | const char *buf, size_t count) | |
274 | { | |
275 | unsigned int input; | |
276 | int ret; | |
277 | ret = sscanf(buf, "%u", &input); | |
278 | if (ret != 1) | |
279 | return -EINVAL; | |
280 | limits.no_turbo = clamp_t(int, input, 0 , 1); | |
281 | ||
282 | return count; | |
283 | } | |
284 | ||
285 | static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, | |
286 | const char *buf, size_t count) | |
287 | { | |
288 | unsigned int input; | |
289 | int ret; | |
290 | ret = sscanf(buf, "%u", &input); | |
291 | if (ret != 1) | |
292 | return -EINVAL; | |
293 | ||
d8f469e9 DB |
294 | limits.max_sysfs_pct = clamp_t(int, input, 0 , 100); |
295 | limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); | |
93f0822d DB |
296 | limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); |
297 | return count; | |
298 | } | |
299 | ||
300 | static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, | |
301 | const char *buf, size_t count) | |
302 | { | |
303 | unsigned int input; | |
304 | int ret; | |
305 | ret = sscanf(buf, "%u", &input); | |
306 | if (ret != 1) | |
307 | return -EINVAL; | |
308 | limits.min_perf_pct = clamp_t(int, input, 0 , 100); | |
309 | limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); | |
310 | ||
311 | return count; | |
312 | } | |
313 | ||
314 | show_one(no_turbo, no_turbo); | |
315 | show_one(max_perf_pct, max_perf_pct); | |
316 | show_one(min_perf_pct, min_perf_pct); | |
317 | ||
318 | define_one_global_rw(no_turbo); | |
319 | define_one_global_rw(max_perf_pct); | |
320 | define_one_global_rw(min_perf_pct); | |
321 | ||
322 | static struct attribute *intel_pstate_attributes[] = { | |
323 | &no_turbo.attr, | |
324 | &max_perf_pct.attr, | |
325 | &min_perf_pct.attr, | |
326 | NULL | |
327 | }; | |
328 | ||
329 | static struct attribute_group intel_pstate_attr_group = { | |
330 | .attrs = intel_pstate_attributes, | |
331 | }; | |
332 | static struct kobject *intel_pstate_kobject; | |
333 | ||
334 | static void intel_pstate_sysfs_expose_params(void) | |
335 | { | |
336 | int rc; | |
337 | ||
338 | intel_pstate_kobject = kobject_create_and_add("intel_pstate", | |
339 | &cpu_subsys.dev_root->kobj); | |
340 | BUG_ON(!intel_pstate_kobject); | |
341 | rc = sysfs_create_group(intel_pstate_kobject, | |
342 | &intel_pstate_attr_group); | |
343 | BUG_ON(rc); | |
344 | } | |
345 | ||
346 | /************************** sysfs end ************************/ | |
19e77c28 DB |
347 | static int byt_get_min_pstate(void) |
348 | { | |
349 | u64 value; | |
350 | rdmsrl(BYT_RATIOS, value); | |
351 | return value & 0xFF; | |
352 | } | |
353 | ||
354 | static int byt_get_max_pstate(void) | |
355 | { | |
356 | u64 value; | |
357 | rdmsrl(BYT_RATIOS, value); | |
358 | return (value >> 16) & 0xFF; | |
359 | } | |
360 | ||
016c8150 | 361 | static int core_get_min_pstate(void) |
93f0822d DB |
362 | { |
363 | u64 value; | |
05e99c8c | 364 | rdmsrl(MSR_PLATFORM_INFO, value); |
93f0822d DB |
365 | return (value >> 40) & 0xFF; |
366 | } | |
367 | ||
016c8150 | 368 | static int core_get_max_pstate(void) |
93f0822d DB |
369 | { |
370 | u64 value; | |
05e99c8c | 371 | rdmsrl(MSR_PLATFORM_INFO, value); |
93f0822d DB |
372 | return (value >> 8) & 0xFF; |
373 | } | |
374 | ||
016c8150 | 375 | static int core_get_turbo_pstate(void) |
93f0822d DB |
376 | { |
377 | u64 value; | |
378 | int nont, ret; | |
05e99c8c | 379 | rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); |
016c8150 | 380 | nont = core_get_max_pstate(); |
93f0822d DB |
381 | ret = ((value) & 255); |
382 | if (ret <= nont) | |
383 | ret = nont; | |
384 | return ret; | |
385 | } | |
386 | ||
016c8150 DB |
387 | static void core_set_pstate(int pstate) |
388 | { | |
389 | u64 val; | |
390 | ||
391 | val = pstate << 8; | |
392 | if (limits.no_turbo) | |
393 | val |= (u64)1 << 32; | |
394 | ||
395 | wrmsrl(MSR_IA32_PERF_CTL, val); | |
396 | } | |
397 | ||
398 | static struct cpu_defaults core_params = { | |
399 | .pid_policy = { | |
400 | .sample_rate_ms = 10, | |
401 | .deadband = 0, | |
402 | .setpoint = 97, | |
403 | .p_gain_pct = 20, | |
404 | .d_gain_pct = 0, | |
405 | .i_gain_pct = 0, | |
406 | }, | |
407 | .funcs = { | |
408 | .get_max = core_get_max_pstate, | |
409 | .get_min = core_get_min_pstate, | |
410 | .get_turbo = core_get_turbo_pstate, | |
411 | .set = core_set_pstate, | |
412 | }, | |
413 | }; | |
414 | ||
19e77c28 DB |
415 | static struct cpu_defaults byt_params = { |
416 | .pid_policy = { | |
417 | .sample_rate_ms = 10, | |
418 | .deadband = 0, | |
419 | .setpoint = 97, | |
420 | .p_gain_pct = 14, | |
421 | .d_gain_pct = 0, | |
422 | .i_gain_pct = 4, | |
423 | }, | |
424 | .funcs = { | |
425 | .get_max = byt_get_max_pstate, | |
426 | .get_min = byt_get_min_pstate, | |
427 | .get_turbo = byt_get_max_pstate, | |
428 | .set = core_set_pstate, | |
429 | }, | |
430 | }; | |
431 | ||
432 | ||
93f0822d DB |
433 | static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) |
434 | { | |
435 | int max_perf = cpu->pstate.turbo_pstate; | |
436 | int min_perf; | |
437 | if (limits.no_turbo) | |
438 | max_perf = cpu->pstate.max_pstate; | |
439 | ||
440 | max_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf)); | |
441 | *max = clamp_t(int, max_perf, | |
442 | cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); | |
443 | ||
444 | min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf)); | |
445 | *min = clamp_t(int, min_perf, | |
446 | cpu->pstate.min_pstate, max_perf); | |
447 | } | |
448 | ||
449 | static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) | |
450 | { | |
451 | int max_perf, min_perf; | |
452 | ||
453 | intel_pstate_get_min_max(cpu, &min_perf, &max_perf); | |
454 | ||
455 | pstate = clamp_t(int, pstate, min_perf, max_perf); | |
456 | ||
457 | if (pstate == cpu->pstate.current_pstate) | |
458 | return; | |
459 | ||
93f0822d | 460 | trace_cpu_frequency(pstate * 100000, cpu->cpu); |
35363e94 | 461 | |
93f0822d | 462 | cpu->pstate.current_pstate = pstate; |
93f0822d | 463 | |
016c8150 | 464 | pstate_funcs.set(pstate); |
93f0822d DB |
465 | } |
466 | ||
467 | static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) | |
468 | { | |
469 | int target; | |
470 | target = cpu->pstate.current_pstate + steps; | |
471 | ||
472 | intel_pstate_set_pstate(cpu, target); | |
473 | } | |
474 | ||
475 | static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps) | |
476 | { | |
477 | int target; | |
478 | target = cpu->pstate.current_pstate - steps; | |
479 | intel_pstate_set_pstate(cpu, target); | |
480 | } | |
481 | ||
482 | static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) | |
483 | { | |
484 | sprintf(cpu->name, "Intel 2nd generation core"); | |
485 | ||
016c8150 DB |
486 | cpu->pstate.min_pstate = pstate_funcs.get_min(); |
487 | cpu->pstate.max_pstate = pstate_funcs.get_max(); | |
488 | cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); | |
93f0822d DB |
489 | |
490 | /* | |
491 | * goto max pstate so we don't slow up boot if we are built-in if we are | |
492 | * a module we will take care of it during normal operation | |
493 | */ | |
494 | intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); | |
495 | } | |
496 | ||
497 | static inline void intel_pstate_calc_busy(struct cpudata *cpu, | |
498 | struct sample *sample) | |
499 | { | |
500 | u64 core_pct; | |
93f0822d | 501 | core_pct = div64_u64(sample->aperf * 100, sample->mperf); |
e6f3eb29 | 502 | sample->freq = cpu->pstate.max_pstate * core_pct * 1000; |
93f0822d | 503 | |
1abc4b20 | 504 | sample->core_pct_busy = core_pct; |
93f0822d DB |
505 | } |
506 | ||
507 | static inline void intel_pstate_sample(struct cpudata *cpu) | |
508 | { | |
93f0822d DB |
509 | u64 aperf, mperf; |
510 | ||
93f0822d DB |
511 | rdmsrl(MSR_IA32_APERF, aperf); |
512 | rdmsrl(MSR_IA32_MPERF, mperf); | |
1abc4b20 DB |
513 | cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT; |
514 | cpu->samples[cpu->sample_ptr].aperf = aperf; | |
515 | cpu->samples[cpu->sample_ptr].mperf = mperf; | |
516 | cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf; | |
517 | cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf; | |
518 | ||
519 | intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]); | |
93f0822d | 520 | |
93f0822d DB |
521 | cpu->prev_aperf = aperf; |
522 | cpu->prev_mperf = mperf; | |
523 | } | |
524 | ||
525 | static inline void intel_pstate_set_sample_time(struct cpudata *cpu) | |
526 | { | |
527 | int sample_time, delay; | |
528 | ||
016c8150 | 529 | sample_time = pid_params.sample_rate_ms; |
93f0822d | 530 | delay = msecs_to_jiffies(sample_time); |
93f0822d DB |
531 | mod_timer_pinned(&cpu->timer, jiffies + delay); |
532 | } | |
533 | ||
93f0822d DB |
534 | static inline int intel_pstate_get_scaled_busy(struct cpudata *cpu) |
535 | { | |
536 | int32_t busy_scaled; | |
2134ed4d | 537 | int32_t core_busy, max_pstate, current_pstate; |
93f0822d DB |
538 | |
539 | core_busy = int_tofp(cpu->samples[cpu->sample_ptr].core_pct_busy); | |
2134ed4d | 540 | max_pstate = int_tofp(cpu->pstate.max_pstate); |
93f0822d | 541 | current_pstate = int_tofp(cpu->pstate.current_pstate); |
2134ed4d | 542 | busy_scaled = mul_fp(core_busy, div_fp(max_pstate, current_pstate)); |
93f0822d DB |
543 | |
544 | return fp_toint(busy_scaled); | |
545 | } | |
546 | ||
547 | static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu) | |
548 | { | |
549 | int busy_scaled; | |
550 | struct _pid *pid; | |
551 | signed int ctl = 0; | |
552 | int steps; | |
553 | ||
554 | pid = &cpu->pid; | |
555 | busy_scaled = intel_pstate_get_scaled_busy(cpu); | |
556 | ||
557 | ctl = pid_calc(pid, busy_scaled); | |
558 | ||
559 | steps = abs(ctl); | |
560 | if (ctl < 0) | |
561 | intel_pstate_pstate_increase(cpu, steps); | |
562 | else | |
563 | intel_pstate_pstate_decrease(cpu, steps); | |
564 | } | |
565 | ||
93f0822d DB |
566 | static void intel_pstate_timer_func(unsigned long __data) |
567 | { | |
568 | struct cpudata *cpu = (struct cpudata *) __data; | |
569 | ||
570 | intel_pstate_sample(cpu); | |
ca182aee | 571 | intel_pstate_adjust_busy_pstate(cpu); |
93f0822d | 572 | |
93f0822d DB |
573 | if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) { |
574 | cpu->min_pstate_count++; | |
575 | if (!(cpu->min_pstate_count % 5)) { | |
576 | intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); | |
93f0822d DB |
577 | } |
578 | } else | |
579 | cpu->min_pstate_count = 0; | |
ca182aee | 580 | |
93f0822d DB |
581 | intel_pstate_set_sample_time(cpu); |
582 | } | |
583 | ||
584 | #define ICPU(model, policy) \ | |
585 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy } | |
586 | ||
587 | static const struct x86_cpu_id intel_pstate_cpu_ids[] = { | |
016c8150 DB |
588 | ICPU(0x2a, core_params), |
589 | ICPU(0x2d, core_params), | |
19e77c28 | 590 | ICPU(0x37, byt_params), |
016c8150 DB |
591 | ICPU(0x3a, core_params), |
592 | ICPU(0x3c, core_params), | |
593 | ICPU(0x3e, core_params), | |
594 | ICPU(0x3f, core_params), | |
595 | ICPU(0x45, core_params), | |
596 | ICPU(0x46, core_params), | |
93f0822d DB |
597 | {} |
598 | }; | |
599 | MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); | |
600 | ||
601 | static int intel_pstate_init_cpu(unsigned int cpunum) | |
602 | { | |
603 | ||
604 | const struct x86_cpu_id *id; | |
605 | struct cpudata *cpu; | |
606 | ||
607 | id = x86_match_cpu(intel_pstate_cpu_ids); | |
608 | if (!id) | |
609 | return -ENODEV; | |
610 | ||
611 | all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL); | |
612 | if (!all_cpu_data[cpunum]) | |
613 | return -ENOMEM; | |
614 | ||
615 | cpu = all_cpu_data[cpunum]; | |
616 | ||
617 | intel_pstate_get_cpu_pstates(cpu); | |
618 | ||
619 | cpu->cpu = cpunum; | |
016c8150 | 620 | |
93f0822d DB |
621 | init_timer_deferrable(&cpu->timer); |
622 | cpu->timer.function = intel_pstate_timer_func; | |
623 | cpu->timer.data = | |
624 | (unsigned long)cpu; | |
625 | cpu->timer.expires = jiffies + HZ/100; | |
626 | intel_pstate_busy_pid_reset(cpu); | |
93f0822d DB |
627 | intel_pstate_sample(cpu); |
628 | intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); | |
629 | ||
630 | add_timer_on(&cpu->timer, cpunum); | |
631 | ||
632 | pr_info("Intel pstate controlling: cpu %d\n", cpunum); | |
633 | ||
634 | return 0; | |
635 | } | |
636 | ||
637 | static unsigned int intel_pstate_get(unsigned int cpu_num) | |
638 | { | |
639 | struct sample *sample; | |
640 | struct cpudata *cpu; | |
641 | ||
642 | cpu = all_cpu_data[cpu_num]; | |
643 | if (!cpu) | |
644 | return 0; | |
645 | sample = &cpu->samples[cpu->sample_ptr]; | |
646 | return sample->freq; | |
647 | } | |
648 | ||
649 | static int intel_pstate_set_policy(struct cpufreq_policy *policy) | |
650 | { | |
651 | struct cpudata *cpu; | |
93f0822d DB |
652 | |
653 | cpu = all_cpu_data[policy->cpu]; | |
654 | ||
d3929b83 DB |
655 | if (!policy->cpuinfo.max_freq) |
656 | return -ENODEV; | |
657 | ||
93f0822d DB |
658 | if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { |
659 | limits.min_perf_pct = 100; | |
660 | limits.min_perf = int_tofp(1); | |
661 | limits.max_perf_pct = 100; | |
662 | limits.max_perf = int_tofp(1); | |
663 | limits.no_turbo = 0; | |
d1b68485 | 664 | return 0; |
93f0822d | 665 | } |
d1b68485 SP |
666 | limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq; |
667 | limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100); | |
668 | limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100)); | |
669 | ||
d8f469e9 DB |
670 | limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq; |
671 | limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100); | |
672 | limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct); | |
d1b68485 | 673 | limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100)); |
93f0822d DB |
674 | |
675 | return 0; | |
676 | } | |
677 | ||
678 | static int intel_pstate_verify_policy(struct cpufreq_policy *policy) | |
679 | { | |
be49e346 | 680 | cpufreq_verify_within_cpu_limits(policy); |
93f0822d DB |
681 | |
682 | if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && | |
683 | (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) | |
684 | return -EINVAL; | |
685 | ||
686 | return 0; | |
687 | } | |
688 | ||
2760984f | 689 | static int intel_pstate_cpu_exit(struct cpufreq_policy *policy) |
93f0822d DB |
690 | { |
691 | int cpu = policy->cpu; | |
692 | ||
693 | del_timer(&all_cpu_data[cpu]->timer); | |
694 | kfree(all_cpu_data[cpu]); | |
695 | all_cpu_data[cpu] = NULL; | |
696 | return 0; | |
697 | } | |
698 | ||
2760984f | 699 | static int intel_pstate_cpu_init(struct cpufreq_policy *policy) |
93f0822d | 700 | { |
93f0822d | 701 | struct cpudata *cpu; |
52e0a509 | 702 | int rc; |
93f0822d DB |
703 | |
704 | rc = intel_pstate_init_cpu(policy->cpu); | |
705 | if (rc) | |
706 | return rc; | |
707 | ||
708 | cpu = all_cpu_data[policy->cpu]; | |
709 | ||
710 | if (!limits.no_turbo && | |
711 | limits.min_perf_pct == 100 && limits.max_perf_pct == 100) | |
712 | policy->policy = CPUFREQ_POLICY_PERFORMANCE; | |
713 | else | |
714 | policy->policy = CPUFREQ_POLICY_POWERSAVE; | |
715 | ||
52e0a509 DB |
716 | policy->min = cpu->pstate.min_pstate * 100000; |
717 | policy->max = cpu->pstate.turbo_pstate * 100000; | |
93f0822d DB |
718 | |
719 | /* cpuinfo and default policy values */ | |
720 | policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; | |
721 | policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000; | |
722 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | |
723 | cpumask_set_cpu(policy->cpu, policy->cpus); | |
724 | ||
725 | return 0; | |
726 | } | |
727 | ||
728 | static struct cpufreq_driver intel_pstate_driver = { | |
729 | .flags = CPUFREQ_CONST_LOOPS, | |
730 | .verify = intel_pstate_verify_policy, | |
731 | .setpolicy = intel_pstate_set_policy, | |
732 | .get = intel_pstate_get, | |
733 | .init = intel_pstate_cpu_init, | |
734 | .exit = intel_pstate_cpu_exit, | |
735 | .name = "intel_pstate", | |
93f0822d DB |
736 | }; |
737 | ||
6be26498 DB |
738 | static int __initdata no_load; |
739 | ||
b563b4e3 DB |
740 | static int intel_pstate_msrs_not_valid(void) |
741 | { | |
742 | /* Check that all the msr's we are using are valid. */ | |
743 | u64 aperf, mperf, tmp; | |
744 | ||
745 | rdmsrl(MSR_IA32_APERF, aperf); | |
746 | rdmsrl(MSR_IA32_MPERF, mperf); | |
747 | ||
016c8150 DB |
748 | if (!pstate_funcs.get_max() || |
749 | !pstate_funcs.get_min() || | |
750 | !pstate_funcs.get_turbo()) | |
b563b4e3 DB |
751 | return -ENODEV; |
752 | ||
753 | rdmsrl(MSR_IA32_APERF, tmp); | |
754 | if (!(tmp - aperf)) | |
755 | return -ENODEV; | |
756 | ||
757 | rdmsrl(MSR_IA32_MPERF, tmp); | |
758 | if (!(tmp - mperf)) | |
759 | return -ENODEV; | |
760 | ||
761 | return 0; | |
762 | } | |
016c8150 | 763 | |
e0a261a2 | 764 | static void copy_pid_params(struct pstate_adjust_policy *policy) |
016c8150 DB |
765 | { |
766 | pid_params.sample_rate_ms = policy->sample_rate_ms; | |
767 | pid_params.p_gain_pct = policy->p_gain_pct; | |
768 | pid_params.i_gain_pct = policy->i_gain_pct; | |
769 | pid_params.d_gain_pct = policy->d_gain_pct; | |
770 | pid_params.deadband = policy->deadband; | |
771 | pid_params.setpoint = policy->setpoint; | |
772 | } | |
773 | ||
e0a261a2 | 774 | static void copy_cpu_funcs(struct pstate_funcs *funcs) |
016c8150 DB |
775 | { |
776 | pstate_funcs.get_max = funcs->get_max; | |
777 | pstate_funcs.get_min = funcs->get_min; | |
778 | pstate_funcs.get_turbo = funcs->get_turbo; | |
779 | pstate_funcs.set = funcs->set; | |
780 | } | |
781 | ||
93f0822d DB |
782 | static int __init intel_pstate_init(void) |
783 | { | |
907cc908 | 784 | int cpu, rc = 0; |
93f0822d | 785 | const struct x86_cpu_id *id; |
016c8150 | 786 | struct cpu_defaults *cpu_info; |
93f0822d | 787 | |
6be26498 DB |
788 | if (no_load) |
789 | return -ENODEV; | |
790 | ||
93f0822d DB |
791 | id = x86_match_cpu(intel_pstate_cpu_ids); |
792 | if (!id) | |
793 | return -ENODEV; | |
794 | ||
016c8150 DB |
795 | cpu_info = (struct cpu_defaults *)id->driver_data; |
796 | ||
797 | copy_pid_params(&cpu_info->pid_policy); | |
798 | copy_cpu_funcs(&cpu_info->funcs); | |
799 | ||
b563b4e3 DB |
800 | if (intel_pstate_msrs_not_valid()) |
801 | return -ENODEV; | |
802 | ||
93f0822d DB |
803 | pr_info("Intel P-state driver initializing.\n"); |
804 | ||
b57ffac5 | 805 | all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus()); |
93f0822d DB |
806 | if (!all_cpu_data) |
807 | return -ENOMEM; | |
93f0822d DB |
808 | |
809 | rc = cpufreq_register_driver(&intel_pstate_driver); | |
810 | if (rc) | |
811 | goto out; | |
812 | ||
813 | intel_pstate_debug_expose_params(); | |
814 | intel_pstate_sysfs_expose_params(); | |
815 | return rc; | |
816 | out: | |
907cc908 DB |
817 | get_online_cpus(); |
818 | for_each_online_cpu(cpu) { | |
819 | if (all_cpu_data[cpu]) { | |
820 | del_timer_sync(&all_cpu_data[cpu]->timer); | |
821 | kfree(all_cpu_data[cpu]); | |
822 | } | |
823 | } | |
824 | ||
825 | put_online_cpus(); | |
826 | vfree(all_cpu_data); | |
93f0822d DB |
827 | return -ENODEV; |
828 | } | |
829 | device_initcall(intel_pstate_init); | |
830 | ||
6be26498 DB |
831 | static int __init intel_pstate_setup(char *str) |
832 | { | |
833 | if (!str) | |
834 | return -EINVAL; | |
835 | ||
836 | if (!strcmp(str, "disable")) | |
837 | no_load = 1; | |
838 | return 0; | |
839 | } | |
840 | early_param("intel_pstate", intel_pstate_setup); | |
841 | ||
93f0822d DB |
842 | MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>"); |
843 | MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors"); | |
844 | MODULE_LICENSE("GPL"); |