[mirror_ubuntu-artful-kernel.git] / drivers / cpufreq / loongson1-cpufreq.c

/*
 * CPU Frequency Scaling for Loongson 1 SoC
 *
 * Copyright (C) 2014-2016 Zhang, Keguang <keguang.zhang@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include <cpufreq.h>
#include <loongson1.h>

static struct {
	struct device *dev;
	struct clk *clk;	/* CPU clk */
	struct clk *mux_clk;	/* MUX of CPU clk */
	struct clk *pll_clk;	/* PLL clk */
	struct clk *osc_clk;	/* OSC clk */
	unsigned int max_freq;
	unsigned int min_freq;
} ls1x_cpufreq;

static int ls1x_cpufreq_notifier(struct notifier_block *nb,
				 unsigned long val, void *data)
{
	if (val == CPUFREQ_POSTCHANGE)
		current_cpu_data.udelay_val = loops_per_jiffy;

	return NOTIFY_OK;
}

static struct notifier_block ls1x_cpufreq_notifier_block = {
	.notifier_call = ls1x_cpufreq_notifier
};

static int ls1x_cpufreq_target(struct cpufreq_policy *policy,
			       unsigned int index)
{
	unsigned int old_freq, new_freq;

	old_freq = policy->cur;
	new_freq = policy->freq_table[index].frequency;

	/*
	 * The procedure of reconfiguring CPU clk is as below.
	 *
	 *  - Reparent CPU clk to OSC clk
	 *  - Reset CPU clock (very important)
	 *  - Reconfigure CPU DIV
	 *  - Reparent CPU clk back to CPU DIV clk
	 */

	dev_dbg(ls1x_cpufreq.dev, "%u KHz --> %u KHz\n", old_freq, new_freq);
	clk_set_parent(policy->clk, ls1x_cpufreq.osc_clk);
	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU,
		     LS1X_CLK_PLL_DIV);
	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU),
		     LS1X_CLK_PLL_DIV);
	clk_set_rate(ls1x_cpufreq.mux_clk, new_freq * 1000);
	clk_set_parent(policy->clk, ls1x_cpufreq.mux_clk);

	return 0;
}

static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
{
	struct cpufreq_frequency_table *freq_tbl;
	unsigned int pll_freq, freq;
	int steps, i, ret;

	pll_freq = clk_get_rate(ls1x_cpufreq.pll_clk) / 1000;

	steps = 1 << DIV_CPU_WIDTH;
	freq_tbl = kcalloc(steps, sizeof(*freq_tbl), GFP_KERNEL);
	if (!freq_tbl)
		return -ENOMEM;

	for (i = 0; i < (steps - 1); i++) {
		freq = pll_freq / (i + 1);
		if ((freq < ls1x_cpufreq.min_freq) ||
		    (freq > ls1x_cpufreq.max_freq))
			freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID;
		else
			freq_tbl[i].frequency = freq;
		dev_dbg(ls1x_cpufreq.dev,
			"cpufreq table: index %d: frequency %d\n", i,
			freq_tbl[i].frequency);
	}
	freq_tbl[i].frequency = CPUFREQ_TABLE_END;

	policy->clk = ls1x_cpufreq.clk;
	ret = cpufreq_generic_init(policy, freq_tbl, 0);
	if (ret)
		kfree(freq_tbl);

	return ret;
}

static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
{
	kfree(policy->freq_table);
	return 0;
}

static struct cpufreq_driver ls1x_cpufreq_driver = {
	.name		= "cpufreq-ls1x",
	.flags		= CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
	.verify		= cpufreq_generic_frequency_table_verify,
	.target_index	= ls1x_cpufreq_target,
	.get		= cpufreq_generic_get,
	.init		= ls1x_cpufreq_init,
	.exit		= ls1x_cpufreq_exit,
	.attr		= cpufreq_generic_attr,
};

static int ls1x_cpufreq_remove(struct platform_device *pdev)
{
	cpufreq_unregister_notifier(&ls1x_cpufreq_notifier_block,
				    CPUFREQ_TRANSITION_NOTIFIER);
	cpufreq_unregister_driver(&ls1x_cpufreq_driver);

	return 0;
}

static int ls1x_cpufreq_probe(struct platform_device *pdev)
{
	struct plat_ls1x_cpufreq *pdata = pdev->dev.platform_data;
	struct clk *clk;
	int ret;

	if (!pdata || !pdata->clk_name || !pdata->osc_clk_name)
		return -EINVAL;

	ls1x_cpufreq.dev = &pdev->dev;

	clk = devm_clk_get(&pdev->dev, pdata->clk_name);
	if (IS_ERR(clk)) {
		dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
			pdata->clk_name);
		ret = PTR_ERR(clk);
		goto out;
	}
	ls1x_cpufreq.clk = clk;

	clk = clk_get_parent(clk);
	if (IS_ERR(clk)) {
		dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
			__clk_get_name(ls1x_cpufreq.clk));
		ret = PTR_ERR(clk);
		goto out;
	}
	ls1x_cpufreq.mux_clk = clk;

	clk = clk_get_parent(clk);
	if (IS_ERR(clk)) {
		dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
			__clk_get_name(ls1x_cpufreq.mux_clk));
		ret = PTR_ERR(clk);
		goto out;
	}
	ls1x_cpufreq.pll_clk = clk;

	clk = devm_clk_get(&pdev->dev, pdata->osc_clk_name);
	if (IS_ERR(clk)) {
		dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
			pdata->osc_clk_name);
		ret = PTR_ERR(clk);
		goto out;
	}
	ls1x_cpufreq.osc_clk = clk;

	ls1x_cpufreq.max_freq = pdata->max_freq;
	ls1x_cpufreq.min_freq = pdata->min_freq;

	ret = cpufreq_register_driver(&ls1x_cpufreq_driver);
	if (ret) {
		dev_err(ls1x_cpufreq.dev,
			"failed to register cpufreq driver: %d\n", ret);
		goto out;
	}

	ret = cpufreq_register_notifier(&ls1x_cpufreq_notifier_block,
					CPUFREQ_TRANSITION_NOTIFIER);

	if (!ret)
		goto out;

	dev_err(ls1x_cpufreq.dev, "failed to register cpufreq notifier: %d\n",
		ret);

	cpufreq_unregister_driver(&ls1x_cpufreq_driver);
out:
	return ret;
}

static struct platform_driver ls1x_cpufreq_platdrv = {
	.probe	= ls1x_cpufreq_probe,
	.remove	= ls1x_cpufreq_remove,
	.driver	= {
		.name	= "ls1x-cpufreq",
	},
};

module_platform_driver(ls1x_cpufreq_platdrv);

MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>");
MODULE_DESCRIPTION("Loongson1 CPUFreq driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
a0a22cf1 KC	1	/*
	2	* CPU Frequency Scaling for Loongson 1 SoC
	3	*
6a1d55cc	4	* Copyright (C) 2014-2016 Zhang, Keguang <keguang.zhang@gmail.com>
a0a22cf1 KC	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
	10
	11	#include <linux/clk.h>
	12	#include <linux/clk-provider.h>
	13	#include <linux/cpu.h>
	14	#include <linux/cpufreq.h>
	15	#include <linux/delay.h>
	16	#include <linux/module.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/slab.h>
	19
30ad29bb HC	20	#include <cpufreq.h>
30ad29bb HC	21	#include <loongson1.h>
a0a22cf1 KC	22
	23	static struct {
	24	struct device *dev;
	25	struct clk clk; / CPU clk */
	26	struct clk mux_clk; / MUX of CPU clk */
	27	struct clk pll_clk; / PLL clk */
	28	struct clk osc_clk; / OSC clk */
	29	unsigned int max_freq;
	30	unsigned int min_freq;
	31	} ls1x_cpufreq;
	32
	33	static int ls1x_cpufreq_notifier(struct notifier_block *nb,
	34	unsigned long val, void *data)
	35	{
	36	if (val == CPUFREQ_POSTCHANGE)
	37	current_cpu_data.udelay_val = loops_per_jiffy;
	38
	39	return NOTIFY_OK;
	40	}
	41
	42	static struct notifier_block ls1x_cpufreq_notifier_block = {
	43	.notifier_call = ls1x_cpufreq_notifier
	44	};
	45
	46	static int ls1x_cpufreq_target(struct cpufreq_policy *policy,
	47	unsigned int index)
	48	{
	49	unsigned int old_freq, new_freq;
	50
	51	old_freq = policy->cur;
	52	new_freq = policy->freq_table[index].frequency;
	53
	54	/*
	55	* The procedure of reconfiguring CPU clk is as below.
	56	*
	57	* - Reparent CPU clk to OSC clk
	58	* - Reset CPU clock (very important)
	59	* - Reconfigure CPU DIV
	60	* - Reparent CPU clk back to CPU DIV clk
	61	*/
	62
	63	dev_dbg(ls1x_cpufreq.dev, "%u KHz --> %u KHz\n", old_freq, new_freq);
	64	clk_set_parent(policy->clk, ls1x_cpufreq.osc_clk);
	65	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) \| RST_CPU_EN \| RST_CPU,
	66	LS1X_CLK_PLL_DIV);
	67	__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN \| RST_CPU),
	68	LS1X_CLK_PLL_DIV);
	69	clk_set_rate(ls1x_cpufreq.mux_clk, new_freq * 1000);
	70	clk_set_parent(policy->clk, ls1x_cpufreq.mux_clk);
	71
	72	return 0;
	73	}
	74
	75	static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
	76	{
	77	struct cpufreq_frequency_table *freq_tbl;
	78	unsigned int pll_freq, freq;
	79	int steps, i, ret;
	80
	81	pll_freq = clk_get_rate(ls1x_cpufreq.pll_clk) / 1000;
	82
	83	steps = 1 << DIV_CPU_WIDTH;
379e38a7 KC	84	freq_tbl = kcalloc(steps, sizeof(*freq_tbl), GFP_KERNEL);
	85	if (!freq_tbl)
	86	return -ENOMEM;
a0a22cf1 KC	87
	88	for (i = 0; i < (steps - 1); i++) {
	89	freq = pll_freq / (i + 1);
	90	if ((freq < ls1x_cpufreq.min_freq) \|\|
	91	(freq > ls1x_cpufreq.max_freq))
	92	freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID;
	93	else
	94	freq_tbl[i].frequency = freq;
	95	dev_dbg(ls1x_cpufreq.dev,
	96	"cpufreq table: index %d: frequency %d\n", i,
	97	freq_tbl[i].frequency);
	98	}
	99	freq_tbl[i].frequency = CPUFREQ_TABLE_END;
	100
	101	policy->clk = ls1x_cpufreq.clk;
	102	ret = cpufreq_generic_init(policy, freq_tbl, 0);
	103	if (ret)
	104	kfree(freq_tbl);
379e38a7	105
a0a22cf1 KC	106	return ret;
	107	}
	108
	109	static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
	110	{
	111	kfree(policy->freq_table);
	112	return 0;
	113	}
	114
	115	static struct cpufreq_driver ls1x_cpufreq_driver = {
	116	.name = "cpufreq-ls1x",
	117	.flags = CPUFREQ_STICKY \| CPUFREQ_NEED_INITIAL_FREQ_CHECK,
	118	.verify = cpufreq_generic_frequency_table_verify,
	119	.target_index = ls1x_cpufreq_target,
	120	.get = cpufreq_generic_get,
	121	.init = ls1x_cpufreq_init,
	122	.exit = ls1x_cpufreq_exit,
	123	.attr = cpufreq_generic_attr,
	124	};
	125
	126	static int ls1x_cpufreq_remove(struct platform_device *pdev)
	127	{
	128	cpufreq_unregister_notifier(&ls1x_cpufreq_notifier_block,
	129	CPUFREQ_TRANSITION_NOTIFIER);
	130	cpufreq_unregister_driver(&ls1x_cpufreq_driver);
	131
	132	return 0;
	133	}
	134
	135	static int ls1x_cpufreq_probe(struct platform_device *pdev)
	136	{
	137	struct plat_ls1x_cpufreq *pdata = pdev->dev.platform_data;
	138	struct clk *clk;
	139	int ret;
	140
	141	if (!pdata \|\| !pdata->clk_name \|\| !pdata->osc_clk_name)
	142	return -EINVAL;
	143
	144	ls1x_cpufreq.dev = &pdev->dev;
	145
	146	clk = devm_clk_get(&pdev->dev, pdata->clk_name);
	147	if (IS_ERR(clk)) {
	148	dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
	149	pdata->clk_name);
	150	ret = PTR_ERR(clk);
	151	goto out;
	152	}
	153	ls1x_cpufreq.clk = clk;
	154
	155	clk = clk_get_parent(clk);
	156	if (IS_ERR(clk)) {
	157	dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
	158	__clk_get_name(ls1x_cpufreq.clk));
	159	ret = PTR_ERR(clk);
	160	goto out;
	161	}
	162	ls1x_cpufreq.mux_clk = clk;
	163
	164	clk = clk_get_parent(clk);
	165	if (IS_ERR(clk)) {
	166	dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
	167	__clk_get_name(ls1x_cpufreq.mux_clk));
	168	ret = PTR_ERR(clk);
	169	goto out;
170	}
171	ls1x_cpufreq.pll_clk = clk;
172
173	clk = devm_clk_get(&pdev->dev, pdata->osc_clk_name);
174	if (IS_ERR(clk)) {
175	dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
176	pdata->osc_clk_name);
177	ret = PTR_ERR(clk);
178	goto out;
179	}
180	ls1x_cpufreq.osc_clk = clk;
181
182	ls1x_cpufreq.max_freq = pdata->max_freq;
183	ls1x_cpufreq.min_freq = pdata->min_freq;
184
185	ret = cpufreq_register_driver(&ls1x_cpufreq_driver);
186	if (ret) {
187	dev_err(ls1x_cpufreq.dev,
188	"failed to register cpufreq driver: %d\n", ret);
189	goto out;
190	}
191
192	ret = cpufreq_register_notifier(&ls1x_cpufreq_notifier_block,
193	CPUFREQ_TRANSITION_NOTIFIER);
194
195	if (!ret)
196	goto out;
197
198	dev_err(ls1x_cpufreq.dev, "failed to register cpufreq notifier: %d\n",
199	ret);
200
201	cpufreq_unregister_driver(&ls1x_cpufreq_driver);
202	out:
203	return ret;
204	}
205
206	static struct platform_driver ls1x_cpufreq_platdrv = {
6a1d55cc KC	207	.probe = ls1x_cpufreq_probe,
	208	.remove = ls1x_cpufreq_remove,
	209	.driver = {
a0a22cf1	210	.name = "ls1x-cpufreq",
a0a22cf1	211	},
a0a22cf1 KC	212	};
	213
	214	module_platform_driver(ls1x_cpufreq_platdrv);
	215
	216	MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>");
6a1d55cc	217	MODULE_DESCRIPTION("Loongson1 CPUFreq driver");
a0a22cf1	218	MODULE_LICENSE("GPL");