[mirror_ubuntu-artful-kernel.git] / drivers / cpufreq / omap-cpufreq.c

/*
 *  CPU frequency scaling for OMAP using OPP information
 *
 *  Copyright (C) 2005 Nokia Corporation
 *  Written by Tony Lindgren <tony@atomide.com>
 *
 *  Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
 *
 * Copyright (C) 2007-2011 Texas Instruments, Inc.
 * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/opp.h>
#include <linux/cpu.h>

#include <asm/system.h>
#include <asm/smp_plat.h>
#include <asm/cpu.h>

#include <plat/clock.h>
#include <plat/omap-pm.h>
#include <plat/common.h>

#include <mach/hardware.h>

#ifdef CONFIG_SMP
struct lpj_info {
	unsigned long	ref;
	unsigned int	freq;
};

static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
static struct lpj_info global_lpj_ref;
#endif

static struct cpufreq_frequency_table *freq_table;
static atomic_t freq_table_users = ATOMIC_INIT(0);
static struct clk *mpu_clk;
static char *mpu_clk_name;
static struct device *mpu_dev;

static int omap_verify_speed(struct cpufreq_policy *policy)
{
	if (!freq_table)
		return -EINVAL;
	return cpufreq_frequency_table_verify(policy, freq_table);
}

static unsigned int omap_getspeed(unsigned int cpu)
{
	unsigned long rate;

	if (cpu >= NR_CPUS)
		return 0;

	rate = clk_get_rate(mpu_clk) / 1000;
	return rate;
}

static int omap_target(struct cpufreq_policy *policy,
		       unsigned int target_freq,
		       unsigned int relation)
{
	unsigned int i;
	int ret = 0;
	struct cpufreq_freqs freqs;

	if (!freq_table) {
		dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
				policy->cpu);
		return -EINVAL;
	}

	ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
			relation, &i);
	if (ret) {
		dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
			__func__, policy->cpu, target_freq, ret);
		return ret;
	}
	freqs.new = freq_table[i].frequency;
	if (!freqs.new) {
		dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
			policy->cpu, target_freq);
		return -EINVAL;
	}

	freqs.old = omap_getspeed(policy->cpu);
	freqs.cpu = policy->cpu;

	if (freqs.old == freqs.new && policy->cur == freqs.new)
		return ret;

	/* notifiers */
	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	}

#ifdef CONFIG_CPU_FREQ_DEBUG
	pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
#endif

	ret = clk_set_rate(mpu_clk, freqs.new * 1000);
	freqs.new = omap_getspeed(policy->cpu);

#ifdef CONFIG_SMP
	/*
	 * Note that loops_per_jiffy is not updated on SMP systems in
	 * cpufreq driver. So, update the per-CPU loops_per_jiffy value
	 * on frequency transition. We need to update all dependent CPUs.
	 */
	for_each_cpu(i, policy->cpus) {
		struct lpj_info *lpj = &per_cpu(lpj_ref, i);
		if (!lpj->freq) {
			lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
			lpj->freq = freqs.old;
		}

		per_cpu(cpu_data, i).loops_per_jiffy =
			cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
	}

	/* And don't forget to adjust the global one */
	if (!global_lpj_ref.freq) {
		global_lpj_ref.ref = loops_per_jiffy;
		global_lpj_ref.freq = freqs.old;
	}
	loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
					freqs.new);
#endif

	/* notifiers */
	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	}

	return ret;
}

static inline void freq_table_free(void)
{
	if (atomic_dec_and_test(&freq_table_users))
		opp_free_cpufreq_table(mpu_dev, &freq_table);
}

static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
{
	int result = 0;

	mpu_clk = clk_get(NULL, mpu_clk_name);
	if (IS_ERR(mpu_clk))
		return PTR_ERR(mpu_clk);

	if (policy->cpu >= NR_CPUS) {
		result = -EINVAL;
		goto fail_ck;
	}

	policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);

	if (atomic_inc_return(&freq_table_users) == 1)
		result = opp_init_cpufreq_table(mpu_dev, &freq_table);

	if (result) {
		dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
				__func__, policy->cpu, result);
		goto fail_ck;
	}

	result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
	if (result)
		goto fail_table;

	cpufreq_frequency_table_get_attr(freq_table, policy->cpu);

	policy->min = policy->cpuinfo.min_freq;
	policy->max = policy->cpuinfo.max_freq;
	policy->cur = omap_getspeed(policy->cpu);

	/*
	 * On OMAP SMP configuartion, both processors share the voltage
	 * and clock. So both CPUs needs to be scaled together and hence
	 * needs software co-ordination. Use cpufreq affected_cpus
	 * interface to handle this scenario. Additional is_smp() check
	 * is to keep SMP_ON_UP build working.
	 */
	if (is_smp()) {
		policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
		cpumask_setall(policy->cpus);
	}

	/* FIXME: what's the actual transition time? */
	policy->cpuinfo.transition_latency = 300 * 1000;

	return 0;

fail_table:
	freq_table_free();
fail_ck:
	clk_put(mpu_clk);
	return result;
}

static int omap_cpu_exit(struct cpufreq_policy *policy)
{
	freq_table_free();
	clk_put(mpu_clk);
	return 0;
}

static struct freq_attr *omap_cpufreq_attr[] = {
	&cpufreq_freq_attr_scaling_available_freqs,
	NULL,
};

static struct cpufreq_driver omap_driver = {
	.flags		= CPUFREQ_STICKY,
	.verify		= omap_verify_speed,
	.target		= omap_target,
	.get		= omap_getspeed,
	.init		= omap_cpu_init,
	.exit		= omap_cpu_exit,
	.name		= "omap",
	.attr		= omap_cpufreq_attr,
};

static int __init omap_cpufreq_init(void)
{
	if (cpu_is_omap24xx())
		mpu_clk_name = "virt_prcm_set";
	else if (cpu_is_omap34xx())
		mpu_clk_name = "dpll1_ck";
	else if (cpu_is_omap44xx())
		mpu_clk_name = "dpll_mpu_ck";

	if (!mpu_clk_name) {
		pr_err("%s: unsupported Silicon?\n", __func__);
		return -EINVAL;
	}

	mpu_dev = omap2_get_mpuss_device();
	if (!mpu_dev) {
		pr_warning("%s: unable to get the mpu device\n", __func__);
		return -EINVAL;
	}

	return cpufreq_register_driver(&omap_driver);
}

static void __exit omap_cpufreq_exit(void)
{
	cpufreq_unregister_driver(&omap_driver);
}

MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
MODULE_LICENSE("GPL");
module_init(omap_cpufreq_init);
module_exit(omap_cpufreq_exit);
Commit	Line	Data
ec6bced6	1	/*
ffe4f0f1	2	* CPU frequency scaling for OMAP using OPP information
ec6bced6 TL	3	*
	4	* Copyright (C) 2005 Nokia Corporation
	5	* Written by Tony Lindgren <tony@atomide.com>
	6	*
	7	* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
	8	*
731e0cc6 SS	9	* Copyright (C) 2007-2011 Texas Instruments, Inc.
	10	* - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
	11	*
ec6bced6 TL	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16	#include <linux/types.h>
	17	#include <linux/kernel.h>
	18	#include <linux/sched.h>
	19	#include <linux/cpufreq.h>
	20	#include <linux/delay.h>
	21	#include <linux/init.h>
	22	#include <linux/err.h>
f8ce2547	23	#include <linux/clk.h>
fced80c7	24	#include <linux/io.h>
731e0cc6	25	#include <linux/opp.h>
46c12216	26	#include <linux/cpu.h>
ec6bced6	27
ec6bced6	28	#include <asm/system.h>
731e0cc6	29	#include <asm/smp_plat.h>
46c12216	30	#include <asm/cpu.h>
ec6bced6	31
731e0cc6 SS	32	#include <plat/clock.h>
	33	#include <plat/omap-pm.h>
	34	#include <plat/common.h>
a7ca9d2b	35
731e0cc6	36	#include <mach/hardware.h>
aeec2990	37
46c12216 RK	38	#ifdef CONFIG_SMP
	39	struct lpj_info {
	40	unsigned long ref;
	41	unsigned int freq;
	42	};
	43
	44	static DEFINE_PER_CPU(struct lpj_info, lpj_ref);
	45	static struct lpj_info global_lpj_ref;
	46	#endif
	47
731e0cc6	48	static struct cpufreq_frequency_table *freq_table;
1c78217f	49	static atomic_t freq_table_users = ATOMIC_INIT(0);
b8488fbe	50	static struct clk *mpu_clk;
08ca3e3b	51	static char *mpu_clk_name;
a820ffa8	52	static struct device *mpu_dev;
b8488fbe	53
b0a330dc	54	static int omap_verify_speed(struct cpufreq_policy *policy)
ec6bced6	55	{
bf2a359d	56	if (!freq_table)
ec6bced6	57	return -EINVAL;
bf2a359d	58	return cpufreq_frequency_table_verify(policy, freq_table);
ec6bced6 TL	59	}
ec6bced6 TL	60
b0a330dc	61	static unsigned int omap_getspeed(unsigned int cpu)
ec6bced6	62	{
ec6bced6 TL	63	unsigned long rate;
ec6bced6 TL	64
46c12216	65	if (cpu >= NR_CPUS)
ec6bced6 TL	66	return 0;
ec6bced6 TL	67
ec6bced6	68	rate = clk_get_rate(mpu_clk) / 1000;
ec6bced6 TL	69	return rate;
	70	}
	71
	72	static int omap_target(struct cpufreq_policy *policy,
	73	unsigned int target_freq,
	74	unsigned int relation)
	75	{
bf2a359d NM	76	unsigned int i;
bf2a359d NM	77	int ret = 0;
731e0cc6	78	struct cpufreq_freqs freqs;
ec6bced6	79
bf2a359d NM	80	if (!freq_table) {
	81	dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__,
	82	policy->cpu);
	83	return -EINVAL;
	84	}
	85
	86	ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
	87	relation, &i);
	88	if (ret) {
	89	dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n",
	90	__func__, policy->cpu, target_freq, ret);
	91	return ret;
	92	}
	93	freqs.new = freq_table[i].frequency;
	94	if (!freqs.new) {
	95	dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__,
	96	policy->cpu, target_freq);
	97	return -EINVAL;
	98	}
aeec2990	99
46c12216	100	freqs.old = omap_getspeed(policy->cpu);
46c12216	101	freqs.cpu = policy->cpu;
ec6bced6	102
022ac03b	103	if (freqs.old == freqs.new && policy->cur == freqs.new)
aeec2990 KH	104	return ret;
aeec2990 KH	105
46c12216 RK	106	/* notifiers */
	107	for_each_cpu(i, policy->cpus) {
	108	freqs.cpu = i;
	109	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	110	}
731e0cc6	111
aeec2990	112	#ifdef CONFIG_CPU_FREQ_DEBUG
731e0cc6	113	pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
aeec2990	114	#endif
731e0cc6	115
aeec2990	116	ret = clk_set_rate(mpu_clk, freqs.new * 1000);
46c12216 RK	117	freqs.new = omap_getspeed(policy->cpu);
	118
	119	#ifdef CONFIG_SMP
	120	/*
	121	* Note that loops_per_jiffy is not updated on SMP systems in
	122	* cpufreq driver. So, update the per-CPU loops_per_jiffy value
	123	* on frequency transition. We need to update all dependent CPUs.
	124	*/
	125	for_each_cpu(i, policy->cpus) {
	126	struct lpj_info *lpj = &per_cpu(lpj_ref, i);
	127	if (!lpj->freq) {
	128	lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy;
	129	lpj->freq = freqs.old;
	130	}
	131
	132	per_cpu(cpu_data, i).loops_per_jiffy =
	133	cpufreq_scale(lpj->ref, lpj->freq, freqs.new);
	134	}
731e0cc6	135
46c12216 RK	136	/* And don't forget to adjust the global one */
	137	if (!global_lpj_ref.freq) {
	138	global_lpj_ref.ref = loops_per_jiffy;
	139	global_lpj_ref.freq = freqs.old;
	140	}
	141	loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq,
	142	freqs.new);
	143	#endif
	144
	145	/* notifiers */
	146	for_each_cpu(i, policy->cpus) {
	147	freqs.cpu = i;
	148	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	149	}
ec6bced6 TL	150
	151	return ret;
	152	}
	153
1c78217f NM	154	static inline void freq_table_free(void)
	155	{
	156	if (atomic_dec_and_test(&freq_table_users))
	157	opp_free_cpufreq_table(mpu_dev, &freq_table);
	158	}
	159
790ab7e9	160	static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
ec6bced6	161	{
aeec2990	162	int result = 0;
731e0cc6	163
08ca3e3b	164	mpu_clk = clk_get(NULL, mpu_clk_name);
ec6bced6 TL	165	if (IS_ERR(mpu_clk))
	166	return PTR_ERR(mpu_clk);
	167
11e04fdd NM	168	if (policy->cpu >= NR_CPUS) {
	169	result = -EINVAL;
	170	goto fail_ck;
	171	}
aeec2990	172
46c12216	173	policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
1c78217f NM	174
	175	if (atomic_inc_return(&freq_table_users) == 1)
	176	result = opp_init_cpufreq_table(mpu_dev, &freq_table);
bf2a359d NM	177
	178	if (result) {
	179	dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n",
	180	__func__, policy->cpu, result);
11e04fdd	181	goto fail_ck;
aeec2990 KH	182	}
aeec2990 KH	183
bf2a359d	184	result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
1c78217f NM	185	if (result)
	186	goto fail_table;
	187
	188	cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
bf2a359d	189
731e0cc6 SS	190	policy->min = policy->cpuinfo.min_freq;
731e0cc6 SS	191	policy->max = policy->cpuinfo.max_freq;
46c12216 RK	192	policy->cur = omap_getspeed(policy->cpu);
	193
	194	/*
	195	* On OMAP SMP configuartion, both processors share the voltage
	196	* and clock. So both CPUs needs to be scaled together and hence
	197	* needs software co-ordination. Use cpufreq affected_cpus
	198	* interface to handle this scenario. Additional is_smp() check
	199	* is to keep SMP_ON_UP build working.
	200	*/
	201	if (is_smp()) {
	202	policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
ed8ce00c	203	cpumask_setall(policy->cpus);
46c12216	204	}
731e0cc6	205
aeec2990	206	/* FIXME: what's the actual transition time? */
b029839c	207	policy->cpuinfo.transition_latency = 300 * 1000;
ec6bced6 TL	208
ec6bced6 TL	209	return 0;
11e04fdd	210
1c78217f NM	211	fail_table:
1c78217f NM	212	freq_table_free();
11e04fdd NM	213	fail_ck:
	214	clk_put(mpu_clk);
	215	return result;
ec6bced6 TL	216	}
ec6bced6 TL	217
b8488fbe HD	218	static int omap_cpu_exit(struct cpufreq_policy *policy)
b8488fbe HD	219	{
1c78217f	220	freq_table_free();
b8488fbe HD	221	clk_put(mpu_clk);
	222	return 0;
	223	}
	224
aeec2990 KH	225	static struct freq_attr *omap_cpufreq_attr[] = {
	226	&cpufreq_freq_attr_scaling_available_freqs,
	227	NULL,
	228	};
	229
ec6bced6 TL	230	static struct cpufreq_driver omap_driver = {
	231	.flags = CPUFREQ_STICKY,
	232	.verify = omap_verify_speed,
	233	.target = omap_target,
	234	.get = omap_getspeed,
	235	.init = omap_cpu_init,
b8488fbe	236	.exit = omap_cpu_exit,
ec6bced6	237	.name = "omap",
aeec2990	238	.attr = omap_cpufreq_attr,
ec6bced6 TL	239	};
	240
	241	static int __init omap_cpufreq_init(void)
	242	{
08ca3e3b NM	243	if (cpu_is_omap24xx())
	244	mpu_clk_name = "virt_prcm_set";
	245	else if (cpu_is_omap34xx())
	246	mpu_clk_name = "dpll1_ck";
	247	else if (cpu_is_omap44xx())
	248	mpu_clk_name = "dpll_mpu_ck";
	249
	250	if (!mpu_clk_name) {
	251	pr_err("%s: unsupported Silicon?\n", __func__);
	252	return -EINVAL;
	253	}
a820ffa8 NM	254
	255	mpu_dev = omap2_get_mpuss_device();
	256	if (!mpu_dev) {
	257	pr_warning("%s: unable to get the mpu device\n", __func__);
	258	return -EINVAL;
	259	}
	260
ec6bced6 TL	261	return cpufreq_register_driver(&omap_driver);
	262	}
	263
731e0cc6 SS	264	static void __exit omap_cpufreq_exit(void)
	265	{
	266	cpufreq_unregister_driver(&omap_driver);
	267	}
aeec2990	268
731e0cc6 SS	269	MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
	270	MODULE_LICENSE("GPL");
	271	module_init(omap_cpufreq_init);
	272	module_exit(omap_cpufreq_exit);