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cpufreq: conservative: set requested_freq to policy max when it is over policy max
[mirror_ubuntu-zesty-kernel.git] / drivers / cpufreq / omap-cpufreq.c
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ec6bced6 1/*
ffe4f0f1 2 * CPU frequency scaling for OMAP using OPP information
ec6bced6
TL
3 *
4 * Copyright (C) 2005 Nokia Corporation
5 * Written by Tony Lindgren <tony@atomide.com>
6 *
7 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
8 *
731e0cc6
SS
9 * Copyright (C) 2007-2011 Texas Instruments, Inc.
10 * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
11 *
ec6bced6
TL
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <linux/sched.h>
19#include <linux/cpufreq.h>
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/err.h>
f8ce2547 23#include <linux/clk.h>
fced80c7 24#include <linux/io.h>
e4db1c74 25#include <linux/pm_opp.h>
46c12216 26#include <linux/cpu.h>
c1b547bc 27#include <linux/module.h>
49ded525 28#include <linux/platform_device.h>
53dfe8a8 29#include <linux/regulator/consumer.h>
ec6bced6 30
731e0cc6 31#include <asm/smp_plat.h>
46c12216 32#include <asm/cpu.h>
ec6bced6 33
42daffd2
AM
34/* OPP tolerance in percentage */
35#define OPP_TOLERANCE 4
36
731e0cc6 37static struct cpufreq_frequency_table *freq_table;
1c78217f 38static atomic_t freq_table_users = ATOMIC_INIT(0);
b8488fbe 39static struct clk *mpu_clk;
a820ffa8 40static struct device *mpu_dev;
53dfe8a8 41static struct regulator *mpu_reg;
b8488fbe 42
b0a330dc 43static unsigned int omap_getspeed(unsigned int cpu)
ec6bced6 44{
ec6bced6
TL
45 unsigned long rate;
46
46c12216 47 if (cpu >= NR_CPUS)
ec6bced6
TL
48 return 0;
49
ec6bced6 50 rate = clk_get_rate(mpu_clk) / 1000;
ec6bced6
TL
51 return rate;
52}
53
9c0ebcf7 54static int omap_target(struct cpufreq_policy *policy, unsigned int index)
ec6bced6 55{
47d43ba7 56 struct dev_pm_opp *opp;
42daffd2 57 unsigned long freq, volt = 0, volt_old = 0, tol = 0;
d4019f0a 58 unsigned int old_freq, new_freq;
ec6bced6 59
d4019f0a
VK
60 old_freq = omap_getspeed(policy->cpu);
61 new_freq = freq_table[index].frequency;
aeec2990 62
d4019f0a 63 freq = new_freq * 1000;
8df0a663
KH
64 ret = clk_round_rate(mpu_clk, freq);
65 if (IS_ERR_VALUE(ret)) {
66 dev_warn(mpu_dev,
67 "CPUfreq: Cannot find matching frequency for %lu\n",
68 freq);
69 return ret;
70 }
71 freq = ret;
53dfe8a8
KH
72
73 if (mpu_reg) {
f44d188a 74 rcu_read_lock();
5d4879cd 75 opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq);
53dfe8a8 76 if (IS_ERR(opp)) {
f44d188a 77 rcu_read_unlock();
53dfe8a8 78 dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
d4019f0a 79 __func__, new_freq);
53dfe8a8
KH
80 return -EINVAL;
81 }
5d4879cd 82 volt = dev_pm_opp_get_voltage(opp);
f44d188a 83 rcu_read_unlock();
42daffd2 84 tol = volt * OPP_TOLERANCE / 100;
53dfe8a8
KH
85 volt_old = regulator_get_voltage(mpu_reg);
86 }
87
88 dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
d4019f0a
VK
89 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
90 new_freq / 1000, volt ? volt / 1000 : -1);
44a49a23 91
53dfe8a8 92 /* scaling up? scale voltage before frequency */
d4019f0a 93 if (mpu_reg && (new_freq > old_freq)) {
42daffd2 94 r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
53dfe8a8
KH
95 if (r < 0) {
96 dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
97 __func__);
d4019f0a 98 return r;
53dfe8a8
KH
99 }
100 }
731e0cc6 101
d4019f0a 102 ret = clk_set_rate(mpu_clk, new_freq * 1000);
46c12216 103
53dfe8a8 104 /* scaling down? scale voltage after frequency */
d4019f0a 105 if (mpu_reg && (new_freq < old_freq)) {
42daffd2 106 r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
53dfe8a8
KH
107 if (r < 0) {
108 dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
109 __func__);
d4019f0a
VK
110 clk_set_rate(mpu_clk, old_freq * 1000);
111 return r;
53dfe8a8
KH
112 }
113 }
114
ec6bced6
TL
115 return ret;
116}
117
1c78217f
NM
118static inline void freq_table_free(void)
119{
120 if (atomic_dec_and_test(&freq_table_users))
5d4879cd 121 dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table);
1c78217f
NM
122}
123
2760984f 124static int omap_cpu_init(struct cpufreq_policy *policy)
ec6bced6 125{
982bce11 126 int result;
731e0cc6 127
e2ee1b4d 128 mpu_clk = clk_get(NULL, "cpufreq_ck");
ec6bced6
TL
129 if (IS_ERR(mpu_clk))
130 return PTR_ERR(mpu_clk);
131
982bce11 132 if (!freq_table) {
5d4879cd 133 result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table);
982bce11
VK
134 if (result) {
135 dev_err(mpu_dev,
136 "%s: cpu%d: failed creating freq table[%d]\n",
bf2a359d 137 __func__, policy->cpu, result);
982bce11
VK
138 goto fail;
139 }
aeec2990
KH
140 }
141
1b865214
RN
142 atomic_inc_return(&freq_table_users);
143
aeec2990 144 /* FIXME: what's the actual transition time? */
982bce11
VK
145 result = cpufreq_generic_init(policy, freq_table, 300 * 1000);
146 if (!result)
147 return 0;
11e04fdd 148
1c78217f 149 freq_table_free();
982bce11 150fail:
11e04fdd
NM
151 clk_put(mpu_clk);
152 return result;
ec6bced6
TL
153}
154
b8488fbe
HD
155static int omap_cpu_exit(struct cpufreq_policy *policy)
156{
42a4df00 157 cpufreq_frequency_table_put_attr(policy->cpu);
1c78217f 158 freq_table_free();
b8488fbe
HD
159 clk_put(mpu_clk);
160 return 0;
161}
162
ec6bced6
TL
163static struct cpufreq_driver omap_driver = {
164 .flags = CPUFREQ_STICKY,
d5ca1649 165 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 166 .target_index = omap_target,
ec6bced6
TL
167 .get = omap_getspeed,
168 .init = omap_cpu_init,
b8488fbe 169 .exit = omap_cpu_exit,
ec6bced6 170 .name = "omap",
d5ca1649 171 .attr = cpufreq_generic_attr,
ec6bced6
TL
172};
173
49ded525 174static int omap_cpufreq_probe(struct platform_device *pdev)
ec6bced6 175{
747a7f64
KH
176 mpu_dev = get_cpu_device(0);
177 if (!mpu_dev) {
a820ffa8 178 pr_warning("%s: unable to get the mpu device\n", __func__);
747a7f64 179 return -EINVAL;
a820ffa8
NM
180 }
181
53dfe8a8
KH
182 mpu_reg = regulator_get(mpu_dev, "vcc");
183 if (IS_ERR(mpu_reg)) {
184 pr_warning("%s: unable to get MPU regulator\n", __func__);
185 mpu_reg = NULL;
186 } else {
187 /*
188 * Ensure physical regulator is present.
189 * (e.g. could be dummy regulator.)
190 */
191 if (regulator_get_voltage(mpu_reg) < 0) {
192 pr_warn("%s: physical regulator not present for MPU\n",
193 __func__);
194 regulator_put(mpu_reg);
195 mpu_reg = NULL;
196 }
197 }
198
ec6bced6
TL
199 return cpufreq_register_driver(&omap_driver);
200}
201
49ded525 202static int omap_cpufreq_remove(struct platform_device *pdev)
731e0cc6 203{
49ded525 204 return cpufreq_unregister_driver(&omap_driver);
731e0cc6 205}
aeec2990 206
49ded525
NM
207static struct platform_driver omap_cpufreq_platdrv = {
208 .driver = {
209 .name = "omap-cpufreq",
210 .owner = THIS_MODULE,
211 },
212 .probe = omap_cpufreq_probe,
213 .remove = omap_cpufreq_remove,
214};
215module_platform_driver(omap_cpufreq_platdrv);
216
731e0cc6
SS
217MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
218MODULE_LICENSE("GPL");