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Commit | Line | Data |
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ec6bced6 | 1 | /* |
ffe4f0f1 | 2 | * CPU frequency scaling for OMAP using OPP information |
ec6bced6 TL |
3 | * |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Written by Tony Lindgren <tony@atomide.com> | |
6 | * | |
7 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | |
8 | * | |
731e0cc6 SS |
9 | * Copyright (C) 2007-2011 Texas Instruments, Inc. |
10 | * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar | |
11 | * | |
ec6bced6 TL |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | #include <linux/types.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/cpufreq.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/err.h> | |
f8ce2547 | 23 | #include <linux/clk.h> |
fced80c7 | 24 | #include <linux/io.h> |
e4db1c74 | 25 | #include <linux/pm_opp.h> |
46c12216 | 26 | #include <linux/cpu.h> |
c1b547bc | 27 | #include <linux/module.h> |
49ded525 | 28 | #include <linux/platform_device.h> |
53dfe8a8 | 29 | #include <linux/regulator/consumer.h> |
ec6bced6 | 30 | |
731e0cc6 | 31 | #include <asm/smp_plat.h> |
46c12216 | 32 | #include <asm/cpu.h> |
ec6bced6 | 33 | |
42daffd2 AM |
34 | /* OPP tolerance in percentage */ |
35 | #define OPP_TOLERANCE 4 | |
36 | ||
731e0cc6 | 37 | static struct cpufreq_frequency_table *freq_table; |
1c78217f | 38 | static atomic_t freq_table_users = ATOMIC_INIT(0); |
b8488fbe | 39 | static struct clk *mpu_clk; |
a820ffa8 | 40 | static struct device *mpu_dev; |
53dfe8a8 | 41 | static struct regulator *mpu_reg; |
b8488fbe | 42 | |
b0a330dc | 43 | static unsigned int omap_getspeed(unsigned int cpu) |
ec6bced6 | 44 | { |
ec6bced6 TL |
45 | unsigned long rate; |
46 | ||
46c12216 | 47 | if (cpu >= NR_CPUS) |
ec6bced6 TL |
48 | return 0; |
49 | ||
ec6bced6 | 50 | rate = clk_get_rate(mpu_clk) / 1000; |
ec6bced6 TL |
51 | return rate; |
52 | } | |
53 | ||
9c0ebcf7 | 54 | static int omap_target(struct cpufreq_policy *policy, unsigned int index) |
ec6bced6 | 55 | { |
53dfe8a8 | 56 | int r, ret = 0; |
731e0cc6 | 57 | struct cpufreq_freqs freqs; |
47d43ba7 | 58 | struct dev_pm_opp *opp; |
42daffd2 | 59 | unsigned long freq, volt = 0, volt_old = 0, tol = 0; |
ec6bced6 | 60 | |
46c12216 | 61 | freqs.old = omap_getspeed(policy->cpu); |
9c0ebcf7 | 62 | freqs.new = freq_table[index].frequency; |
aeec2990 | 63 | |
53dfe8a8 | 64 | freq = freqs.new * 1000; |
8df0a663 KH |
65 | ret = clk_round_rate(mpu_clk, freq); |
66 | if (IS_ERR_VALUE(ret)) { | |
67 | dev_warn(mpu_dev, | |
68 | "CPUfreq: Cannot find matching frequency for %lu\n", | |
69 | freq); | |
70 | return ret; | |
71 | } | |
72 | freq = ret; | |
53dfe8a8 KH |
73 | |
74 | if (mpu_reg) { | |
f44d188a | 75 | rcu_read_lock(); |
5d4879cd | 76 | opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq); |
53dfe8a8 | 77 | if (IS_ERR(opp)) { |
f44d188a | 78 | rcu_read_unlock(); |
53dfe8a8 KH |
79 | dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", |
80 | __func__, freqs.new); | |
81 | return -EINVAL; | |
82 | } | |
5d4879cd | 83 | volt = dev_pm_opp_get_voltage(opp); |
f44d188a | 84 | rcu_read_unlock(); |
42daffd2 | 85 | tol = volt * OPP_TOLERANCE / 100; |
53dfe8a8 KH |
86 | volt_old = regulator_get_voltage(mpu_reg); |
87 | } | |
88 | ||
89 | dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", | |
90 | freqs.old / 1000, volt_old ? volt_old / 1000 : -1, | |
91 | freqs.new / 1000, volt ? volt / 1000 : -1); | |
92 | ||
44a49a23 VK |
93 | /* notifiers */ |
94 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); | |
95 | ||
53dfe8a8 KH |
96 | /* scaling up? scale voltage before frequency */ |
97 | if (mpu_reg && (freqs.new > freqs.old)) { | |
42daffd2 | 98 | r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); |
53dfe8a8 KH |
99 | if (r < 0) { |
100 | dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", | |
101 | __func__); | |
102 | freqs.new = freqs.old; | |
103 | goto done; | |
104 | } | |
105 | } | |
731e0cc6 | 106 | |
aeec2990 | 107 | ret = clk_set_rate(mpu_clk, freqs.new * 1000); |
46c12216 | 108 | |
53dfe8a8 KH |
109 | /* scaling down? scale voltage after frequency */ |
110 | if (mpu_reg && (freqs.new < freqs.old)) { | |
42daffd2 | 111 | r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); |
53dfe8a8 KH |
112 | if (r < 0) { |
113 | dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", | |
114 | __func__); | |
115 | ret = clk_set_rate(mpu_clk, freqs.old * 1000); | |
116 | freqs.new = freqs.old; | |
117 | goto done; | |
118 | } | |
119 | } | |
120 | ||
121 | freqs.new = omap_getspeed(policy->cpu); | |
46c12216 | 122 | |
53dfe8a8 | 123 | done: |
46c12216 | 124 | /* notifiers */ |
b43a7ffb | 125 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
ec6bced6 TL |
126 | |
127 | return ret; | |
128 | } | |
129 | ||
1c78217f NM |
130 | static inline void freq_table_free(void) |
131 | { | |
132 | if (atomic_dec_and_test(&freq_table_users)) | |
5d4879cd | 133 | dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table); |
1c78217f NM |
134 | } |
135 | ||
2760984f | 136 | static int omap_cpu_init(struct cpufreq_policy *policy) |
ec6bced6 | 137 | { |
982bce11 | 138 | int result; |
731e0cc6 | 139 | |
e2ee1b4d | 140 | mpu_clk = clk_get(NULL, "cpufreq_ck"); |
ec6bced6 TL |
141 | if (IS_ERR(mpu_clk)) |
142 | return PTR_ERR(mpu_clk); | |
143 | ||
982bce11 | 144 | if (!freq_table) { |
5d4879cd | 145 | result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table); |
982bce11 VK |
146 | if (result) { |
147 | dev_err(mpu_dev, | |
148 | "%s: cpu%d: failed creating freq table[%d]\n", | |
bf2a359d | 149 | __func__, policy->cpu, result); |
982bce11 VK |
150 | goto fail; |
151 | } | |
aeec2990 KH |
152 | } |
153 | ||
1b865214 RN |
154 | atomic_inc_return(&freq_table_users); |
155 | ||
aeec2990 | 156 | /* FIXME: what's the actual transition time? */ |
982bce11 VK |
157 | result = cpufreq_generic_init(policy, freq_table, 300 * 1000); |
158 | if (!result) | |
159 | return 0; | |
11e04fdd | 160 | |
1c78217f | 161 | freq_table_free(); |
982bce11 | 162 | fail: |
11e04fdd NM |
163 | clk_put(mpu_clk); |
164 | return result; | |
ec6bced6 TL |
165 | } |
166 | ||
b8488fbe HD |
167 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
168 | { | |
42a4df00 | 169 | cpufreq_frequency_table_put_attr(policy->cpu); |
1c78217f | 170 | freq_table_free(); |
b8488fbe HD |
171 | clk_put(mpu_clk); |
172 | return 0; | |
173 | } | |
174 | ||
ec6bced6 TL |
175 | static struct cpufreq_driver omap_driver = { |
176 | .flags = CPUFREQ_STICKY, | |
d5ca1649 | 177 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 178 | .target_index = omap_target, |
ec6bced6 TL |
179 | .get = omap_getspeed, |
180 | .init = omap_cpu_init, | |
b8488fbe | 181 | .exit = omap_cpu_exit, |
ec6bced6 | 182 | .name = "omap", |
d5ca1649 | 183 | .attr = cpufreq_generic_attr, |
ec6bced6 TL |
184 | }; |
185 | ||
49ded525 | 186 | static int omap_cpufreq_probe(struct platform_device *pdev) |
ec6bced6 | 187 | { |
747a7f64 KH |
188 | mpu_dev = get_cpu_device(0); |
189 | if (!mpu_dev) { | |
a820ffa8 | 190 | pr_warning("%s: unable to get the mpu device\n", __func__); |
747a7f64 | 191 | return -EINVAL; |
a820ffa8 NM |
192 | } |
193 | ||
53dfe8a8 KH |
194 | mpu_reg = regulator_get(mpu_dev, "vcc"); |
195 | if (IS_ERR(mpu_reg)) { | |
196 | pr_warning("%s: unable to get MPU regulator\n", __func__); | |
197 | mpu_reg = NULL; | |
198 | } else { | |
199 | /* | |
200 | * Ensure physical regulator is present. | |
201 | * (e.g. could be dummy regulator.) | |
202 | */ | |
203 | if (regulator_get_voltage(mpu_reg) < 0) { | |
204 | pr_warn("%s: physical regulator not present for MPU\n", | |
205 | __func__); | |
206 | regulator_put(mpu_reg); | |
207 | mpu_reg = NULL; | |
208 | } | |
209 | } | |
210 | ||
ec6bced6 TL |
211 | return cpufreq_register_driver(&omap_driver); |
212 | } | |
213 | ||
49ded525 | 214 | static int omap_cpufreq_remove(struct platform_device *pdev) |
731e0cc6 | 215 | { |
49ded525 | 216 | return cpufreq_unregister_driver(&omap_driver); |
731e0cc6 | 217 | } |
aeec2990 | 218 | |
49ded525 NM |
219 | static struct platform_driver omap_cpufreq_platdrv = { |
220 | .driver = { | |
221 | .name = "omap-cpufreq", | |
222 | .owner = THIS_MODULE, | |
223 | }, | |
224 | .probe = omap_cpufreq_probe, | |
225 | .remove = omap_cpufreq_remove, | |
226 | }; | |
227 | module_platform_driver(omap_cpufreq_platdrv); | |
228 | ||
731e0cc6 SS |
229 | MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); |
230 | MODULE_LICENSE("GPL"); |