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1da177e4 1/*
b2bd68e1 2 * (c) 2003-2012 Advanced Micro Devices, Inc.
1da177e4
LT
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
b2bd68e1 7 * Maintainer:
29c4bcdd 8 * Andreas Herrmann <herrmann.der.user@googlemail.com>
1da177e4
LT
9 *
10 * Based on the powernow-k7.c module written by Dave Jones.
f4432c5c 11 * (C) 2003 Dave Jones on behalf of SuSE Labs
1da177e4 12 * (C) 2004 Dominik Brodowski <linux@brodo.de>
a2531293 13 * (C) 2004 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
14 * Licensed under the terms of the GNU GPL License version 2.
15 * Based upon datasheets & sample CPUs kindly provided by AMD.
16 *
17 * Valuable input gratefully received from Dave Jones, Pavel Machek,
1f729e06 18 * Dominik Brodowski, Jacob Shin, and others.
065b807c 19 * Originally developed by Paul Devriendt.
1da177e4 20 *
b2bd68e1
AH
21 * Processor information obtained from Chapter 9 (Power and Thermal
22 * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
23 * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
24 * Power Management" in BKDGs for newer AMD CPU families.
25 *
26 * Tables for specific CPUs can be inferred from AMD's processor
27 * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
1da177e4
LT
28 */
29
30#include <linux/kernel.h>
31#include <linux/smp.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/string.h>
065b807c 37#include <linux/cpumask.h>
0e64a0c9
DJ
38#include <linux/io.h>
39#include <linux/delay.h>
1da177e4
LT
40
41#include <asm/msr.h>
fa8031ae 42#include <asm/cpu_device_id.h>
1da177e4 43
1da177e4 44#include <linux/acpi.h>
14cc3e2b 45#include <linux/mutex.h>
1da177e4 46#include <acpi/processor.h>
1da177e4
LT
47
48#define PFX "powernow-k8: "
c5829cd0 49#define VERSION "version 2.20.00"
1da177e4
LT
50#include "powernow-k8.h"
51
52/* serialize freq changes */
14cc3e2b 53static DEFINE_MUTEX(fidvid_mutex);
1da177e4 54
2c6b8c03 55static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
1da177e4 56
a2fed573
ML
57static struct cpufreq_driver cpufreq_amd64_driver;
58
065b807c 59#ifndef CONFIG_SMP
7ad728f9
RR
60static inline const struct cpumask *cpu_core_mask(int cpu)
61{
62 return cpumask_of(0);
63}
065b807c
DJ
64#endif
65
1da177e4
LT
66/* Return a frequency in MHz, given an input fid */
67static u32 find_freq_from_fid(u32 fid)
68{
69 return 800 + (fid * 100);
70}
71
72/* Return a frequency in KHz, given an input fid */
73static u32 find_khz_freq_from_fid(u32 fid)
74{
75 return 1000 * find_freq_from_fid(fid);
76}
77
1da177e4
LT
78/* Return the vco fid for an input fid
79 *
80 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
81 * only from corresponding high fids. This returns "high" fid corresponding to
82 * "low" one.
83 */
84static u32 convert_fid_to_vco_fid(u32 fid)
85{
32ee8c3e 86 if (fid < HI_FID_TABLE_BOTTOM)
1da177e4 87 return 8 + (2 * fid);
32ee8c3e 88 else
1da177e4 89 return fid;
1da177e4
LT
90}
91
92/*
93 * Return 1 if the pending bit is set. Unless we just instructed the processor
94 * to transition to a new state, seeing this bit set is really bad news.
95 */
96static int pending_bit_stuck(void)
97{
98 u32 lo, hi;
99
100 rdmsr(MSR_FIDVID_STATUS, lo, hi);
101 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
102}
103
104/*
105 * Update the global current fid / vid values from the status msr.
106 * Returns 1 on error.
107 */
108static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
109{
110 u32 lo, hi;
111 u32 i = 0;
112
7153d961 113 do {
0213df74 114 if (i++ > 10000) {
2d06d8c4 115 pr_debug("detected change pending stuck\n");
1da177e4
LT
116 return 1;
117 }
118 rdmsr(MSR_FIDVID_STATUS, lo, hi);
7153d961 119 } while (lo & MSR_S_LO_CHANGE_PENDING);
1da177e4
LT
120
121 data->currvid = hi & MSR_S_HI_CURRENT_VID;
122 data->currfid = lo & MSR_S_LO_CURRENT_FID;
123
124 return 0;
125}
126
127/* the isochronous relief time */
128static void count_off_irt(struct powernow_k8_data *data)
129{
130 udelay((1 << data->irt) * 10);
131 return;
132}
133
27b46d76 134/* the voltage stabilization time */
1da177e4
LT
135static void count_off_vst(struct powernow_k8_data *data)
136{
137 udelay(data->vstable * VST_UNITS_20US);
138 return;
139}
140
141/* need to init the control msr to a safe value (for each cpu) */
142static void fidvid_msr_init(void)
143{
144 u32 lo, hi;
145 u8 fid, vid;
146
147 rdmsr(MSR_FIDVID_STATUS, lo, hi);
148 vid = hi & MSR_S_HI_CURRENT_VID;
149 fid = lo & MSR_S_LO_CURRENT_FID;
150 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
151 hi = MSR_C_HI_STP_GNT_BENIGN;
2d06d8c4 152 pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
1da177e4
LT
153 wrmsr(MSR_FIDVID_CTL, lo, hi);
154}
155
1da177e4
LT
156/* write the new fid value along with the other control fields to the msr */
157static int write_new_fid(struct powernow_k8_data *data, u32 fid)
158{
159 u32 lo;
160 u32 savevid = data->currvid;
0213df74 161 u32 i = 0;
1da177e4
LT
162
163 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
164 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
165 return 1;
166 }
167
0e64a0c9
DJ
168 lo = fid;
169 lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
170 lo |= MSR_C_LO_INIT_FID_VID;
1da177e4 171
2d06d8c4 172 pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
1da177e4
LT
173 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
174
0213df74
DJ
175 do {
176 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
177 if (i++ > 100) {
0e64a0c9
DJ
178 printk(KERN_ERR PFX
179 "Hardware error - pending bit very stuck - "
180 "no further pstate changes possible\n");
63172cb3 181 return 1;
32ee8c3e 182 }
0213df74 183 } while (query_current_values_with_pending_wait(data));
1da177e4
LT
184
185 count_off_irt(data);
186
187 if (savevid != data->currvid) {
0e64a0c9
DJ
188 printk(KERN_ERR PFX
189 "vid change on fid trans, old 0x%x, new 0x%x\n",
190 savevid, data->currvid);
1da177e4
LT
191 return 1;
192 }
193
194 if (fid != data->currfid) {
0e64a0c9
DJ
195 printk(KERN_ERR PFX
196 "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
197 data->currfid);
1da177e4
LT
198 return 1;
199 }
200
201 return 0;
202}
203
204/* Write a new vid to the hardware */
205static int write_new_vid(struct powernow_k8_data *data, u32 vid)
206{
207 u32 lo;
208 u32 savefid = data->currfid;
0213df74 209 int i = 0;
1da177e4
LT
210
211 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
212 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
213 return 1;
214 }
215
0e64a0c9
DJ
216 lo = data->currfid;
217 lo |= (vid << MSR_C_LO_VID_SHIFT);
218 lo |= MSR_C_LO_INIT_FID_VID;
1da177e4 219
2d06d8c4 220 pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
1da177e4
LT
221 vid, lo, STOP_GRANT_5NS);
222
0213df74
DJ
223 do {
224 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
6df89006 225 if (i++ > 100) {
0e64a0c9
DJ
226 printk(KERN_ERR PFX "internal error - pending bit "
227 "very stuck - no further pstate "
228 "changes possible\n");
6df89006
DJ
229 return 1;
230 }
0213df74 231 } while (query_current_values_with_pending_wait(data));
1da177e4
LT
232
233 if (savefid != data->currfid) {
0e64a0c9
DJ
234 printk(KERN_ERR PFX "fid changed on vid trans, old "
235 "0x%x new 0x%x\n",
1da177e4
LT
236 savefid, data->currfid);
237 return 1;
238 }
239
240 if (vid != data->currvid) {
0e64a0c9
DJ
241 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
242 "curr 0x%x\n",
243 vid, data->currvid);
1da177e4
LT
244 return 1;
245 }
246
247 return 0;
248}
249
250/*
251 * Reduce the vid by the max of step or reqvid.
252 * Decreasing vid codes represent increasing voltages:
841e40b3 253 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
1da177e4 254 */
0e64a0c9
DJ
255static int decrease_vid_code_by_step(struct powernow_k8_data *data,
256 u32 reqvid, u32 step)
1da177e4
LT
257{
258 if ((data->currvid - reqvid) > step)
259 reqvid = data->currvid - step;
260
261 if (write_new_vid(data, reqvid))
262 return 1;
263
264 count_off_vst(data);
265
266 return 0;
267}
268
1f729e06 269/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
0e64a0c9
DJ
270static int transition_fid_vid(struct powernow_k8_data *data,
271 u32 reqfid, u32 reqvid)
1da177e4 272{
a2e1b4c3 273 if (core_voltage_pre_transition(data, reqvid, reqfid))
1da177e4
LT
274 return 1;
275
276 if (core_frequency_transition(data, reqfid))
277 return 1;
278
279 if (core_voltage_post_transition(data, reqvid))
280 return 1;
281
282 if (query_current_values_with_pending_wait(data))
283 return 1;
284
285 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
0e64a0c9
DJ
286 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
287 "curr 0x%x 0x%x\n",
1da177e4
LT
288 smp_processor_id(),
289 reqfid, reqvid, data->currfid, data->currvid);
290 return 1;
291 }
292
2d06d8c4 293 pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
1da177e4
LT
294 smp_processor_id(), data->currfid, data->currvid);
295
296 return 0;
297}
298
299/* Phase 1 - core voltage transition ... setup voltage */
0e64a0c9 300static int core_voltage_pre_transition(struct powernow_k8_data *data,
a2e1b4c3 301 u32 reqvid, u32 reqfid)
1da177e4
LT
302{
303 u32 rvosteps = data->rvo;
304 u32 savefid = data->currfid;
a2e1b4c3 305 u32 maxvid, lo, rvomult = 1;
1da177e4 306
2d06d8c4 307 pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
0e64a0c9 308 "reqvid 0x%x, rvo 0x%x\n",
1da177e4
LT
309 smp_processor_id(),
310 data->currfid, data->currvid, reqvid, data->rvo);
311
a2e1b4c3
ML
312 if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
313 rvomult = 2;
314 rvosteps *= rvomult;
065b807c
DJ
315 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
316 maxvid = 0x1f & (maxvid >> 16);
2d06d8c4 317 pr_debug("ph1 maxvid=0x%x\n", maxvid);
065b807c
DJ
318 if (reqvid < maxvid) /* lower numbers are higher voltages */
319 reqvid = maxvid;
320
1da177e4 321 while (data->currvid > reqvid) {
2d06d8c4 322 pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
1da177e4
LT
323 data->currvid, reqvid);
324 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
325 return 1;
326 }
327
a2e1b4c3
ML
328 while ((rvosteps > 0) &&
329 ((rvomult * data->rvo + data->currvid) > reqvid)) {
065b807c 330 if (data->currvid == maxvid) {
1da177e4
LT
331 rvosteps = 0;
332 } else {
2d06d8c4 333 pr_debug("ph1: changing vid for rvo, req 0x%x\n",
1da177e4 334 data->currvid - 1);
0e64a0c9 335 if (decrease_vid_code_by_step(data, data->currvid-1, 1))
1da177e4
LT
336 return 1;
337 rvosteps--;
338 }
339 }
340
341 if (query_current_values_with_pending_wait(data))
342 return 1;
343
344 if (savefid != data->currfid) {
0e64a0c9
DJ
345 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
346 data->currfid);
1da177e4
LT
347 return 1;
348 }
349
2d06d8c4 350 pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
1da177e4
LT
351 data->currfid, data->currvid);
352
353 return 0;
354}
355
356/* Phase 2 - core frequency transition */
357static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
358{
0e64a0c9
DJ
359 u32 vcoreqfid, vcocurrfid, vcofiddiff;
360 u32 fid_interval, savevid = data->currvid;
1da177e4 361
1da177e4 362 if (data->currfid == reqfid) {
0e64a0c9
DJ
363 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
364 data->currfid);
1da177e4
LT
365 return 0;
366 }
367
2d06d8c4 368 pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
0e64a0c9 369 "reqfid 0x%x\n",
1da177e4
LT
370 smp_processor_id(),
371 data->currfid, data->currvid, reqfid);
372
373 vcoreqfid = convert_fid_to_vco_fid(reqfid);
374 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
375 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
376 : vcoreqfid - vcocurrfid;
377
a2e1b4c3
ML
378 if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
379 vcofiddiff = 0;
380
1da177e4 381 while (vcofiddiff > 2) {
019a61b9
LM
382 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
383
1da177e4
LT
384 if (reqfid > data->currfid) {
385 if (data->currfid > LO_FID_TABLE_TOP) {
0e64a0c9
DJ
386 if (write_new_fid(data,
387 data->currfid + fid_interval))
1da177e4 388 return 1;
1da177e4
LT
389 } else {
390 if (write_new_fid
0e64a0c9
DJ
391 (data,
392 2 + convert_fid_to_vco_fid(data->currfid)))
1da177e4 393 return 1;
1da177e4
LT
394 }
395 } else {
019a61b9 396 if (write_new_fid(data, data->currfid - fid_interval))
1da177e4
LT
397 return 1;
398 }
399
400 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
401 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
402 : vcoreqfid - vcocurrfid;
403 }
404
405 if (write_new_fid(data, reqfid))
406 return 1;
407
408 if (query_current_values_with_pending_wait(data))
409 return 1;
410
411 if (data->currfid != reqfid) {
412 printk(KERN_ERR PFX
0e64a0c9
DJ
413 "ph2: mismatch, failed fid transition, "
414 "curr 0x%x, req 0x%x\n",
1da177e4
LT
415 data->currfid, reqfid);
416 return 1;
417 }
418
419 if (savevid != data->currvid) {
420 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
421 savevid, data->currvid);
422 return 1;
423 }
424
2d06d8c4 425 pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
1da177e4
LT
426 data->currfid, data->currvid);
427
428 return 0;
429}
430
431/* Phase 3 - core voltage transition flow ... jump to the final vid. */
0e64a0c9
DJ
432static int core_voltage_post_transition(struct powernow_k8_data *data,
433 u32 reqvid)
1da177e4
LT
434{
435 u32 savefid = data->currfid;
436 u32 savereqvid = reqvid;
437
2d06d8c4 438 pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
1da177e4
LT
439 smp_processor_id(),
440 data->currfid, data->currvid);
441
442 if (reqvid != data->currvid) {
443 if (write_new_vid(data, reqvid))
444 return 1;
445
446 if (savefid != data->currfid) {
447 printk(KERN_ERR PFX
448 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
449 savefid, data->currfid);
450 return 1;
451 }
452
453 if (data->currvid != reqvid) {
454 printk(KERN_ERR PFX
0e64a0c9
DJ
455 "ph3: failed vid transition\n, "
456 "req 0x%x, curr 0x%x",
1da177e4
LT
457 reqvid, data->currvid);
458 return 1;
459 }
460 }
461
462 if (query_current_values_with_pending_wait(data))
463 return 1;
464
465 if (savereqvid != data->currvid) {
2d06d8c4 466 pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
1da177e4
LT
467 return 1;
468 }
469
470 if (savefid != data->currfid) {
2d06d8c4 471 pr_debug("ph3 failed, currfid changed 0x%x\n",
1da177e4
LT
472 data->currfid);
473 return 1;
474 }
475
2d06d8c4 476 pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
1da177e4
LT
477 data->currfid, data->currvid);
478
479 return 0;
480}
481
fa8031ae
AK
482static const struct x86_cpu_id powernow_k8_ids[] = {
483 /* IO based frequency switching */
484 { X86_VENDOR_AMD, 0xf },
fa8031ae
AK
485 {}
486};
487MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
488
1ff6e97f 489static void check_supported_cpu(void *_rc)
1da177e4 490{
1da177e4 491 u32 eax, ebx, ecx, edx;
1ff6e97f 492 int *rc = _rc;
1da177e4 493
1ff6e97f 494 *rc = -ENODEV;
1da177e4 495
1da177e4 496 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
2c906ae6 497
1f729e06
DJ
498 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
499 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
99fbe1ac 500 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
0e64a0c9
DJ
501 printk(KERN_INFO PFX
502 "Processor cpuid %x not supported\n", eax);
1ff6e97f 503 return;
1f729e06 504 }
1da177e4 505
1f729e06
DJ
506 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
507 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
508 printk(KERN_INFO PFX
509 "No frequency change capabilities detected\n");
1ff6e97f 510 return;
1f729e06 511 }
1da177e4 512
1f729e06 513 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
0e64a0c9
DJ
514 if ((edx & P_STATE_TRANSITION_CAPABLE)
515 != P_STATE_TRANSITION_CAPABLE) {
516 printk(KERN_INFO PFX
517 "Power state transitions not supported\n");
1ff6e97f 518 return;
1f729e06 519 }
e1f0b8e9 520 *rc = 0;
1da177e4 521 }
1da177e4
LT
522}
523
0e64a0c9
DJ
524static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
525 u8 maxvid)
1da177e4
LT
526{
527 unsigned int j;
528 u8 lastfid = 0xff;
529
530 for (j = 0; j < data->numps; j++) {
531 if (pst[j].vid > LEAST_VID) {
2fd47094
TR
532 printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
533 j, pst[j].vid);
1da177e4
LT
534 return -EINVAL;
535 }
0e64a0c9
DJ
536 if (pst[j].vid < data->rvo) {
537 /* vid + rvo >= 0 */
2fd47094
TR
538 printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
539 " %d\n", j);
1da177e4
LT
540 return -ENODEV;
541 }
0e64a0c9
DJ
542 if (pst[j].vid < maxvid + data->rvo) {
543 /* vid + rvo >= maxvid */
2fd47094
TR
544 printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
545 " %d\n", j);
1da177e4
LT
546 return -ENODEV;
547 }
8aae8284 548 if (pst[j].fid > MAX_FID) {
2fd47094
TR
549 printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
550 " %d\n", j);
8aae8284
JS
551 return -ENODEV;
552 }
8aae8284 553 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
1da177e4 554 /* Only first fid is allowed to be in "low" range */
2fd47094
TR
555 printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
556 "0x%x\n", j, pst[j].fid);
1da177e4
LT
557 return -EINVAL;
558 }
559 if (pst[j].fid < lastfid)
560 lastfid = pst[j].fid;
561 }
562 if (lastfid & 1) {
2fd47094 563 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
1da177e4
LT
564 return -EINVAL;
565 }
566 if (lastfid > LO_FID_TABLE_TOP)
0e64a0c9
DJ
567 printk(KERN_INFO FW_BUG PFX
568 "first fid not from lo freq table\n");
1da177e4
LT
569
570 return 0;
571}
572
f0adb134
KR
573static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
574 unsigned int entry)
0e64a0c9 575{
f0adb134 576 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
0e64a0c9
DJ
577}
578
1da177e4
LT
579static void print_basics(struct powernow_k8_data *data)
580{
581 int j;
582 for (j = 0; j < data->numps; j++) {
0e64a0c9
DJ
583 if (data->powernow_table[j].frequency !=
584 CPUFREQ_ENTRY_INVALID) {
0e64a0c9 585 printk(KERN_INFO PFX
9e918695 586 "fid 0x%x (%d MHz), vid 0x%x\n",
50701588 587 data->powernow_table[j].driver_data & 0xff,
9a60ddbc 588 data->powernow_table[j].frequency/1000,
50701588 589 data->powernow_table[j].driver_data >> 8);
1f729e06 590 }
1da177e4
LT
591 }
592 if (data->batps)
0e64a0c9
DJ
593 printk(KERN_INFO PFX "Only %d pstates on battery\n",
594 data->batps);
1da177e4
LT
595}
596
0e64a0c9
DJ
597static int fill_powernow_table(struct powernow_k8_data *data,
598 struct pst_s *pst, u8 maxvid)
1da177e4
LT
599{
600 struct cpufreq_frequency_table *powernow_table;
601 unsigned int j;
602
0e64a0c9
DJ
603 if (data->batps) {
604 /* use ACPI support to get full speed on mains power */
605 printk(KERN_WARNING PFX
606 "Only %d pstates usable (use ACPI driver for full "
607 "range\n", data->batps);
1da177e4
LT
608 data->numps = data->batps;
609 }
610
0e64a0c9 611 for (j = 1; j < data->numps; j++) {
1da177e4
LT
612 if (pst[j-1].fid >= pst[j].fid) {
613 printk(KERN_ERR PFX "PST out of sequence\n");
614 return -EINVAL;
615 }
616 }
617
618 if (data->numps < 2) {
619 printk(KERN_ERR PFX "no p states to transition\n");
620 return -ENODEV;
621 }
622
623 if (check_pst_table(data, pst, maxvid))
624 return -EINVAL;
625
71508a1f 626 powernow_table = kzalloc((sizeof(*powernow_table)
1da177e4
LT
627 * (data->numps + 1)), GFP_KERNEL);
628 if (!powernow_table) {
629 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
630 return -ENOMEM;
631 }
632
633 for (j = 0; j < data->numps; j++) {
0e64a0c9 634 int freq;
50701588
VK
635 powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */
636 powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
0e64a0c9
DJ
637 freq = find_khz_freq_from_fid(pst[j].fid);
638 powernow_table[j].frequency = freq;
1da177e4
LT
639 }
640 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
50701588 641 powernow_table[data->numps].driver_data = 0;
1da177e4
LT
642
643 if (query_current_values_with_pending_wait(data)) {
644 kfree(powernow_table);
645 return -EIO;
646 }
647
2d06d8c4 648 pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
1da177e4 649 data->powernow_table = powernow_table;
7ad728f9 650 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
2e497620 651 print_basics(data);
1da177e4
LT
652
653 for (j = 0; j < data->numps; j++)
0e64a0c9
DJ
654 if ((pst[j].fid == data->currfid) &&
655 (pst[j].vid == data->currvid))
1da177e4
LT
656 return 0;
657
2d06d8c4 658 pr_debug("currfid/vid do not match PST, ignoring\n");
1da177e4
LT
659 return 0;
660}
661
662/* Find and validate the PSB/PST table in BIOS. */
663static int find_psb_table(struct powernow_k8_data *data)
664{
665 struct psb_s *psb;
666 unsigned int i;
667 u32 mvs;
668 u8 maxvid;
669 u32 cpst = 0;
670 u32 thiscpuid;
671
672 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
673 /* Scan BIOS looking for the signature. */
674 /* It can not be at ffff0 - it is too big. */
675
676 psb = phys_to_virt(i);
677 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
678 continue;
679
2d06d8c4 680 pr_debug("found PSB header at 0x%p\n", psb);
1da177e4 681
2d06d8c4 682 pr_debug("table vers: 0x%x\n", psb->tableversion);
1da177e4 683 if (psb->tableversion != PSB_VERSION_1_4) {
2fd47094 684 printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
1da177e4
LT
685 return -ENODEV;
686 }
687
2d06d8c4 688 pr_debug("flags: 0x%x\n", psb->flags1);
1da177e4 689 if (psb->flags1) {
2fd47094 690 printk(KERN_ERR FW_BUG PFX "unknown flags\n");
1da177e4
LT
691 return -ENODEV;
692 }
693
694 data->vstable = psb->vstable;
2d06d8c4 695 pr_debug("voltage stabilization time: %d(*20us)\n",
0e64a0c9 696 data->vstable);
1da177e4 697
2d06d8c4 698 pr_debug("flags2: 0x%x\n", psb->flags2);
1da177e4
LT
699 data->rvo = psb->flags2 & 3;
700 data->irt = ((psb->flags2) >> 2) & 3;
701 mvs = ((psb->flags2) >> 4) & 3;
702 data->vidmvs = 1 << mvs;
703 data->batps = ((psb->flags2) >> 6) & 3;
704
2d06d8c4
DB
705 pr_debug("ramp voltage offset: %d\n", data->rvo);
706 pr_debug("isochronous relief time: %d\n", data->irt);
707 pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
1da177e4 708
2d06d8c4 709 pr_debug("numpst: 0x%x\n", psb->num_tables);
1da177e4 710 cpst = psb->num_tables;
0e64a0c9
DJ
711 if ((psb->cpuid == 0x00000fc0) ||
712 (psb->cpuid == 0x00000fe0)) {
1da177e4 713 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
0e64a0c9
DJ
714 if ((thiscpuid == 0x00000fc0) ||
715 (thiscpuid == 0x00000fe0))
1da177e4 716 cpst = 1;
1da177e4
LT
717 }
718 if (cpst != 1) {
2fd47094 719 printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
1da177e4
LT
720 return -ENODEV;
721 }
722
723 data->plllock = psb->plllocktime;
2d06d8c4
DB
724 pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
725 pr_debug("maxfid: 0x%x\n", psb->maxfid);
726 pr_debug("maxvid: 0x%x\n", psb->maxvid);
1da177e4
LT
727 maxvid = psb->maxvid;
728
729 data->numps = psb->numps;
2d06d8c4 730 pr_debug("numpstates: 0x%x\n", data->numps);
0e64a0c9
DJ
731 return fill_powernow_table(data,
732 (struct pst_s *)(psb+1), maxvid);
1da177e4
LT
733 }
734 /*
735 * If you see this message, complain to BIOS manufacturer. If
736 * he tells you "we do not support Linux" or some similar
737 * nonsense, remember that Windows 2000 uses the same legacy
738 * mechanism that the old Linux PSB driver uses. Tell them it
739 * is broken with Windows 2000.
740 *
741 * The reference to the AMD documentation is chapter 9 in the
742 * BIOS and Kernel Developer's Guide, which is available on
743 * www.amd.com
744 */
79cc56af 745 printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
298decfb
MR
746 printk(KERN_ERR PFX "Make sure that your BIOS is up to date"
747 " and Cool'N'Quiet support is enabled in BIOS setup\n");
1da177e4
LT
748 return -ENODEV;
749}
750
0e64a0c9
DJ
751static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
752 unsigned int index)
1da177e4 753{
439913ff 754 u64 control;
0e64a0c9 755
e1f0b8e9 756 if (!data->acpi_data.state_count)
1da177e4
LT
757 return;
758
21335d02
LH
759 control = data->acpi_data.states[index].control;
760 data->irt = (control >> IRT_SHIFT) & IRT_MASK;
761 data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
762 data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
763 data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
764 data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
765 data->vstable = (control >> VST_SHIFT) & VST_MASK;
766}
1da177e4
LT
767
768static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
769{
1da177e4 770 struct cpufreq_frequency_table *powernow_table;
2fdf66b4 771 int ret_val = -ENODEV;
439913ff 772 u64 control, status;
1da177e4 773
f607e3a0 774 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
2d06d8c4 775 pr_debug("register performance failed: bad ACPI data\n");
1da177e4
LT
776 return -EIO;
777 }
778
779 /* verify the data contained in the ACPI structures */
f607e3a0 780 if (data->acpi_data.state_count <= 1) {
2d06d8c4 781 pr_debug("No ACPI P-States\n");
1da177e4
LT
782 goto err_out;
783 }
784
2c701b10
DJ
785 control = data->acpi_data.control_register.space_id;
786 status = data->acpi_data.status_register.space_id;
787
788 if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
789 (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
2d06d8c4 790 pr_debug("Invalid control/status registers (%llx - %llx)\n",
2c701b10 791 control, status);
1da177e4
LT
792 goto err_out;
793 }
794
795 /* fill in data->powernow_table */
71508a1f 796 powernow_table = kzalloc((sizeof(*powernow_table)
f607e3a0 797 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
1da177e4 798 if (!powernow_table) {
2d06d8c4 799 pr_debug("powernow_table memory alloc failure\n");
1da177e4
LT
800 goto err_out;
801 }
802
db39d552
ML
803 /* fill in data */
804 data->numps = data->acpi_data.state_count;
805 powernow_k8_acpi_pst_values(data, 0);
806
e1f0b8e9 807 ret_val = fill_powernow_table_fidvid(data, powernow_table);
1f729e06
DJ
808 if (ret_val)
809 goto err_out_mem;
810
0e64a0c9
DJ
811 powernow_table[data->acpi_data.state_count].frequency =
812 CPUFREQ_TABLE_END;
1f729e06
DJ
813 data->powernow_table = powernow_table;
814
7ad728f9 815 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
2e497620 816 print_basics(data);
1f729e06
DJ
817
818 /* notify BIOS that we exist */
819 acpi_processor_notify_smm(THIS_MODULE);
820
eaa95840 821 if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
2fdf66b4
RR
822 printk(KERN_ERR PFX
823 "unable to alloc powernow_k8_data cpumask\n");
824 ret_val = -ENOMEM;
825 goto err_out_mem;
826 }
827
1f729e06
DJ
828 return 0;
829
830err_out_mem:
831 kfree(powernow_table);
832
833err_out:
f607e3a0 834 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
1f729e06 835
0e64a0c9
DJ
836 /* data->acpi_data.state_count informs us at ->exit()
837 * whether ACPI was used */
f607e3a0 838 data->acpi_data.state_count = 0;
1f729e06 839
2fdf66b4 840 return ret_val;
1f729e06
DJ
841}
842
0e64a0c9
DJ
843static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
844 struct cpufreq_frequency_table *powernow_table)
1f729e06
DJ
845{
846 int i;
0e64a0c9 847
f607e3a0 848 for (i = 0; i < data->acpi_data.state_count; i++) {
094ce7fd
DJ
849 u32 fid;
850 u32 vid;
0e64a0c9 851 u32 freq, index;
439913ff 852 u64 status, control;
094ce7fd
DJ
853
854 if (data->exttype) {
0e64a0c9
DJ
855 status = data->acpi_data.states[i].status;
856 fid = status & EXT_FID_MASK;
857 vid = (status >> VID_SHIFT) & EXT_VID_MASK;
841e40b3 858 } else {
0e64a0c9
DJ
859 control = data->acpi_data.states[i].control;
860 fid = control & FID_MASK;
861 vid = (control >> VID_SHIFT) & VID_MASK;
841e40b3 862 }
1da177e4 863
2d06d8c4 864 pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
1da177e4 865
0e64a0c9 866 index = fid | (vid<<8);
50701588 867 powernow_table[i].driver_data = index;
0e64a0c9
DJ
868
869 freq = find_khz_freq_from_fid(fid);
870 powernow_table[i].frequency = freq;
1da177e4
LT
871
872 /* verify frequency is OK */
0e64a0c9 873 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
2d06d8c4 874 pr_debug("invalid freq %u kHz, ignoring\n", freq);
f0adb134 875 invalidate_entry(powernow_table, i);
1da177e4
LT
876 continue;
877 }
878
0e64a0c9
DJ
879 /* verify voltage is OK -
880 * BIOSs are using "off" to indicate invalid */
841e40b3 881 if (vid == VID_OFF) {
2d06d8c4 882 pr_debug("invalid vid %u, ignoring\n", vid);
f0adb134 883 invalidate_entry(powernow_table, i);
1da177e4
LT
884 continue;
885 }
886
0e64a0c9
DJ
887 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
888 printk(KERN_INFO PFX "invalid freq entries "
889 "%u kHz vs. %u kHz\n", freq,
890 (unsigned int)
891 (data->acpi_data.states[i].core_frequency
892 * 1000));
f0adb134 893 invalidate_entry(powernow_table, i);
1da177e4
LT
894 continue;
895 }
896 }
1da177e4 897 return 0;
1da177e4
LT
898}
899
900static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
901{
f607e3a0 902 if (data->acpi_data.state_count)
0e64a0c9
DJ
903 acpi_processor_unregister_performance(&data->acpi_data,
904 data->cpu);
2fdf66b4 905 free_cpumask_var(data->acpi_data.shared_cpu_map);
1da177e4
LT
906}
907
732553e5
ML
908static int get_transition_latency(struct powernow_k8_data *data)
909{
910 int max_latency = 0;
911 int i;
912 for (i = 0; i < data->acpi_data.state_count; i++) {
913 int cur_latency = data->acpi_data.states[i].transition_latency
914 + data->acpi_data.states[i].bus_master_latency;
915 if (cur_latency > max_latency)
916 max_latency = cur_latency;
917 }
86e13684 918 if (max_latency == 0) {
e1f0b8e9 919 pr_err(FW_WARN PFX "Invalid zero transition latency\n");
86e13684
TR
920 max_latency = 1;
921 }
732553e5
ML
922 /* value in usecs, needs to be in nanoseconds */
923 return 1000 * max_latency;
924}
925
1da177e4 926/* Take a frequency, and issue the fid/vid transition command */
0e64a0c9
DJ
927static int transition_frequency_fidvid(struct powernow_k8_data *data,
928 unsigned int index)
1da177e4 929{
b43a7ffb 930 struct cpufreq_policy *policy;
1f729e06
DJ
931 u32 fid = 0;
932 u32 vid = 0;
b43a7ffb 933 int res;
1da177e4
LT
934 struct cpufreq_freqs freqs;
935
2d06d8c4 936 pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
1da177e4 937
1f729e06 938 /* fid/vid correctness check for k8 */
1da177e4 939 /* fid are the lower 8 bits of the index we stored into
1f729e06
DJ
940 * the cpufreq frequency table in find_psb_table, vid
941 * are the upper 8 bits.
1da177e4 942 */
50701588
VK
943 fid = data->powernow_table[index].driver_data & 0xFF;
944 vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
1da177e4 945
2d06d8c4 946 pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
1da177e4
LT
947
948 if (query_current_values_with_pending_wait(data))
949 return 1;
950
951 if ((data->currvid == vid) && (data->currfid == fid)) {
2d06d8c4 952 pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
1da177e4
LT
953 fid, vid);
954 return 0;
955 }
956
2d06d8c4 957 pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
1da177e4 958 smp_processor_id(), fid, vid);
1da177e4
LT
959 freqs.old = find_khz_freq_from_fid(data->currfid);
960 freqs.new = find_khz_freq_from_fid(fid);
1f729e06 961
b43a7ffb
VK
962 policy = cpufreq_cpu_get(smp_processor_id());
963 cpufreq_cpu_put(policy);
964
8fec051e 965 cpufreq_freq_transition_begin(policy, &freqs);
1da177e4 966 res = transition_fid_vid(data, fid, vid);
8fec051e 967 cpufreq_freq_transition_end(policy, &freqs, res);
1f729e06 968
1f729e06
DJ
969 return res;
970}
971
6889125b
TH
972struct powernowk8_target_arg {
973 struct cpufreq_policy *pol;
9c0ebcf7 974 unsigned newstate;
6889125b
TH
975};
976
977static long powernowk8_target_fn(void *arg)
1da177e4 978{
6889125b
TH
979 struct powernowk8_target_arg *pta = arg;
980 struct cpufreq_policy *pol = pta->pol;
9c0ebcf7 981 unsigned newstate = pta->newstate;
2c6b8c03 982 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
9180053c
AB
983 u32 checkfid;
984 u32 checkvid;
6889125b 985 int ret;
1da177e4 986
4211a303
JS
987 if (!data)
988 return -EINVAL;
989
9180053c
AB
990 checkfid = data->currfid;
991 checkvid = data->currvid;
992
1da177e4
LT
993 if (pending_bit_stuck()) {
994 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
6889125b 995 return -EIO;
1da177e4
LT
996 }
997
9c0ebcf7
VK
998 pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n",
999 pol->cpu, data->powernow_table[newstate].frequency, pol->min,
1000 pol->max);
1da177e4 1001
83844510 1002 if (query_current_values_with_pending_wait(data))
6889125b 1003 return -EIO;
1da177e4 1004
e1f0b8e9
MG
1005 pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
1006 data->currfid, data->currvid);
1da177e4 1007
e1f0b8e9
MG
1008 if ((checkvid != data->currvid) ||
1009 (checkfid != data->currfid)) {
1010 pr_info(PFX
1011 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
1012 checkfid, data->currfid,
1013 checkvid, data->currvid);
1da177e4
LT
1014 }
1015
14cc3e2b 1016 mutex_lock(&fidvid_mutex);
065b807c 1017
1da177e4
LT
1018 powernow_k8_acpi_pst_values(data, newstate);
1019
e1f0b8e9
MG
1020 ret = transition_frequency_fidvid(data, newstate);
1021
1f729e06 1022 if (ret) {
1da177e4 1023 printk(KERN_ERR PFX "transition frequency failed\n");
14cc3e2b 1024 mutex_unlock(&fidvid_mutex);
6889125b 1025 return 1;
1da177e4 1026 }
14cc3e2b 1027 mutex_unlock(&fidvid_mutex);
065b807c 1028
e1f0b8e9 1029 pol->cur = find_khz_freq_from_fid(data->currfid);
1da177e4 1030
6889125b
TH
1031 return 0;
1032}
1033
1034/* Driver entry point to switch to the target frequency */
9c0ebcf7 1035static int powernowk8_target(struct cpufreq_policy *pol, unsigned index)
6889125b 1036{
9c0ebcf7 1037 struct powernowk8_target_arg pta = { .pol = pol, .newstate = index };
6889125b 1038
e4df1cbc 1039 return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
1da177e4
LT
1040}
1041
1ff6e97f
RR
1042struct init_on_cpu {
1043 struct powernow_k8_data *data;
1044 int rc;
1045};
1046
2760984f 1047static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1ff6e97f
RR
1048{
1049 struct init_on_cpu *init_on_cpu = _init_on_cpu;
1050
1051 if (pending_bit_stuck()) {
1052 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1053 init_on_cpu->rc = -ENODEV;
1054 return;
1055 }
1056
1057 if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1058 init_on_cpu->rc = -ENODEV;
1059 return;
1060 }
1061
e1f0b8e9 1062 fidvid_msr_init();
1ff6e97f
RR
1063
1064 init_on_cpu->rc = 0;
1065}
1066
56835e6c
BP
1067static const char missing_pss_msg[] =
1068 KERN_ERR
1069 FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
1070 FW_BUG PFX "First, make sure Cool'N'Quiet is enabled in the BIOS.\n"
1071 FW_BUG PFX "If that doesn't help, try upgrading your BIOS.\n";
1072
1da177e4 1073/* per CPU init entry point to the driver */
2760984f 1074static int powernowk8_cpu_init(struct cpufreq_policy *pol)
1da177e4
LT
1075{
1076 struct powernow_k8_data *data;
1ff6e97f 1077 struct init_on_cpu init_on_cpu;
c3274763 1078 int rc, cpu;
1da177e4 1079
1ff6e97f
RR
1080 smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1081 if (rc)
1da177e4
LT
1082 return -ENODEV;
1083
d5b73cd8 1084 data = kzalloc(sizeof(*data), GFP_KERNEL);
1da177e4
LT
1085 if (!data) {
1086 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1087 return -ENOMEM;
1088 }
1da177e4
LT
1089
1090 data->cpu = pol->cpu;
1091
a0abd520 1092 if (powernow_k8_cpu_init_acpi(data)) {
1da177e4 1093 /*
0d2eb44f 1094 * Use the PSB BIOS structure. This is only available on
1da177e4
LT
1095 * an UP version, and is deprecated by AMD.
1096 */
9ed059e1 1097 if (num_online_cpus() != 1) {
56835e6c 1098 printk_once(missing_pss_msg);
0cb8bc25 1099 goto err_out;
1da177e4
LT
1100 }
1101 if (pol->cpu != 0) {
2fd47094
TR
1102 printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1103 "CPU other than CPU0. Complain to your BIOS "
1104 "vendor.\n");
0cb8bc25 1105 goto err_out;
1da177e4
LT
1106 }
1107 rc = find_psb_table(data);
0cb8bc25
DJ
1108 if (rc)
1109 goto err_out;
1110
732553e5
ML
1111 /* Take a crude guess here.
1112 * That guess was in microseconds, so multiply with 1000 */
1113 pol->cpuinfo.transition_latency = (
1114 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1115 ((1 << data->irt) * 30)) * 1000;
1116 } else /* ACPI _PSS objects available */
1117 pol->cpuinfo.transition_latency = get_transition_latency(data);
1da177e4
LT
1118
1119 /* only run on specific CPU from here on */
1ff6e97f
RR
1120 init_on_cpu.data = data;
1121 smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1122 &init_on_cpu, 1);
1123 rc = init_on_cpu.rc;
1124 if (rc != 0)
1125 goto err_out_exit_acpi;
1da177e4 1126
e1f0b8e9 1127 cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
835481d9 1128 data->available_cores = pol->cpus;
1da177e4 1129
1da177e4 1130 /* min/max the cpu is capable of */
b147405a 1131 if (cpufreq_table_validate_and_show(pol, data->powernow_table)) {
2fd47094 1132 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1da177e4
LT
1133 powernow_k8_cpu_exit_acpi(data);
1134 kfree(data->powernow_table);
1135 kfree(data);
1136 return -EINVAL;
1137 }
1138
e1f0b8e9
MG
1139 pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1140 data->currfid, data->currvid);
1da177e4 1141
c3274763
SB
1142 /* Point all the CPUs in this policy to the same data */
1143 for_each_cpu(cpu, pol->cpus)
1144 per_cpu(powernow_data, cpu) = data;
1da177e4
LT
1145
1146 return 0;
1147
1ff6e97f 1148err_out_exit_acpi:
1da177e4
LT
1149 powernow_k8_cpu_exit_acpi(data);
1150
0cb8bc25 1151err_out:
1da177e4
LT
1152 kfree(data);
1153 return -ENODEV;
1154}
1155
c0e61cb1 1156static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
1da177e4 1157{
2c6b8c03 1158 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
c3274763 1159 int cpu;
1da177e4
LT
1160
1161 if (!data)
1162 return -EINVAL;
1163
1164 powernow_k8_cpu_exit_acpi(data);
1165
1da177e4
LT
1166 kfree(data->powernow_table);
1167 kfree(data);
c3274763
SB
1168 for_each_cpu(cpu, pol->cpus)
1169 per_cpu(powernow_data, cpu) = NULL;
1da177e4
LT
1170
1171 return 0;
1172}
1173
1ff6e97f
RR
1174static void query_values_on_cpu(void *_err)
1175{
1176 int *err = _err;
0a3aee0d 1177 struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1ff6e97f
RR
1178
1179 *err = query_current_values_with_pending_wait(data);
1180}
1181
0e64a0c9 1182static unsigned int powernowk8_get(unsigned int cpu)
1da177e4 1183{
e15bc455 1184 struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1da177e4 1185 unsigned int khz = 0;
1ff6e97f 1186 int err;
eef5167e
JS
1187
1188 if (!data)
557a701c 1189 return 0;
eef5167e 1190
1ff6e97f
RR
1191 smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1192 if (err)
1da177e4
LT
1193 goto out;
1194
e1f0b8e9 1195 khz = find_khz_freq_from_fid(data->currfid);
58389a86 1196
1da177e4 1197
b9111b7b 1198out:
1da177e4
LT
1199 return khz;
1200}
1201
221dee28 1202static struct cpufreq_driver cpufreq_amd64_driver = {
7dbf694d 1203 .flags = CPUFREQ_ASYNC_NOTIFICATION,
d63bd27f 1204 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 1205 .target_index = powernowk8_target,
e2f74f35
TR
1206 .bios_limit = acpi_processor_get_bios_limit,
1207 .init = powernowk8_cpu_init,
ce2650d4 1208 .exit = powernowk8_cpu_exit,
e2f74f35
TR
1209 .get = powernowk8_get,
1210 .name = "powernow-k8",
d63bd27f 1211 .attr = cpufreq_generic_attr,
1da177e4
LT
1212};
1213
4827ea6e
BP
1214static void __request_acpi_cpufreq(void)
1215{
1216 const char *cur_drv, *drv = "acpi-cpufreq";
1217
1218 cur_drv = cpufreq_get_current_driver();
1219 if (!cur_drv)
1220 goto request;
1221
1222 if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv))))
1223 pr_warn(PFX "WTF driver: %s\n", cur_drv);
1224
1225 return;
1226
1227 request:
1228 pr_warn(PFX "This CPU is not supported anymore, using acpi-cpufreq instead.\n");
1229 request_module(drv);
1230}
1231
1da177e4 1232/* driver entry point for init */
2760984f 1233static int powernowk8_init(void)
1da177e4 1234{
e1f0b8e9 1235 unsigned int i, supported_cpus = 0;
c0939e46 1236 int ret;
1da177e4 1237
e1f0b8e9 1238 if (static_cpu_has(X86_FEATURE_HW_PSTATE)) {
4827ea6e 1239 __request_acpi_cpufreq();
fa8031ae 1240 return -ENODEV;
e1f0b8e9 1241 }
fa8031ae 1242
fa8031ae
AK
1243 if (!x86_match_cpu(powernow_k8_ids))
1244 return -ENODEV;
1245
c0939e46 1246 get_online_cpus();
a7201156 1247 for_each_online_cpu(i) {
c0939e46
BP
1248 smp_call_function_single(i, check_supported_cpu, &ret, 1);
1249 if (!ret)
1da177e4
LT
1250 supported_cpus++;
1251 }
1252
c0939e46
BP
1253 if (supported_cpus != num_online_cpus()) {
1254 put_online_cpus();
73860c6b 1255 return -ENODEV;
c0939e46
BP
1256 }
1257 put_online_cpus();
73860c6b 1258
c0939e46
BP
1259 ret = cpufreq_register_driver(&cpufreq_amd64_driver);
1260 if (ret)
1261 return ret;
73860c6b 1262
c0939e46
BP
1263 pr_info(PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
1264 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
73860c6b 1265
c0939e46 1266 return ret;
1da177e4
LT
1267}
1268
1269/* driver entry point for term */
1270static void __exit powernowk8_exit(void)
1271{
2d06d8c4 1272 pr_debug("exit\n");
1da177e4
LT
1273
1274 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1275}
1276
0e64a0c9
DJ
1277MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
1278 "Mark Langsdorf <mark.langsdorf@amd.com>");
1da177e4
LT
1279MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1280MODULE_LICENSE("GPL");
1281
1282late_initcall(powernowk8_init);
1283module_exit(powernowk8_exit);