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1da177e4 | 1 | /* |
b2bd68e1 | 2 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
b2bd68e1 | 7 | * Maintainer: |
29c4bcdd | 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
1da177e4 LT |
9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 | 12 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
a2531293 | 13 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
14 | * Licensed under the terms of the GNU GPL License version 2. |
15 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
16 | * | |
17 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 18 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 19 | * Originally developed by Paul Devriendt. |
1da177e4 | 20 | * |
b2bd68e1 AH |
21 | * Processor information obtained from Chapter 9 (Power and Thermal |
22 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for | |
23 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x | |
24 | * Power Management" in BKDGs for newer AMD CPU families. | |
25 | * | |
26 | * Tables for specific CPUs can be inferred from AMD's processor | |
27 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) | |
1da177e4 LT |
28 | */ |
29 | ||
30 | #include <linux/kernel.h> | |
31 | #include <linux/smp.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/string.h> | |
065b807c | 37 | #include <linux/cpumask.h> |
0e64a0c9 DJ |
38 | #include <linux/io.h> |
39 | #include <linux/delay.h> | |
1da177e4 LT |
40 | |
41 | #include <asm/msr.h> | |
fa8031ae | 42 | #include <asm/cpu_device_id.h> |
1da177e4 | 43 | |
1da177e4 | 44 | #include <linux/acpi.h> |
14cc3e2b | 45 | #include <linux/mutex.h> |
1da177e4 | 46 | #include <acpi/processor.h> |
1da177e4 LT |
47 | |
48 | #define PFX "powernow-k8: " | |
c5829cd0 | 49 | #define VERSION "version 2.20.00" |
1da177e4 LT |
50 | #include "powernow-k8.h" |
51 | ||
52 | /* serialize freq changes */ | |
14cc3e2b | 53 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 54 | |
2c6b8c03 | 55 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 56 | |
a2fed573 ML |
57 | static struct cpufreq_driver cpufreq_amd64_driver; |
58 | ||
065b807c | 59 | #ifndef CONFIG_SMP |
7ad728f9 RR |
60 | static inline const struct cpumask *cpu_core_mask(int cpu) |
61 | { | |
62 | return cpumask_of(0); | |
63 | } | |
065b807c DJ |
64 | #endif |
65 | ||
1da177e4 LT |
66 | /* Return a frequency in MHz, given an input fid */ |
67 | static u32 find_freq_from_fid(u32 fid) | |
68 | { | |
69 | return 800 + (fid * 100); | |
70 | } | |
71 | ||
72 | /* Return a frequency in KHz, given an input fid */ | |
73 | static u32 find_khz_freq_from_fid(u32 fid) | |
74 | { | |
75 | return 1000 * find_freq_from_fid(fid); | |
76 | } | |
77 | ||
1da177e4 LT |
78 | /* Return the vco fid for an input fid |
79 | * | |
80 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
81 | * only from corresponding high fids. This returns "high" fid corresponding to | |
82 | * "low" one. | |
83 | */ | |
84 | static u32 convert_fid_to_vco_fid(u32 fid) | |
85 | { | |
32ee8c3e | 86 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 87 | return 8 + (2 * fid); |
32ee8c3e | 88 | else |
1da177e4 | 89 | return fid; |
1da177e4 LT |
90 | } |
91 | ||
92 | /* | |
93 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
94 | * to transition to a new state, seeing this bit set is really bad news. | |
95 | */ | |
96 | static int pending_bit_stuck(void) | |
97 | { | |
98 | u32 lo, hi; | |
99 | ||
100 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
101 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
102 | } | |
103 | ||
104 | /* | |
105 | * Update the global current fid / vid values from the status msr. | |
106 | * Returns 1 on error. | |
107 | */ | |
108 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
109 | { | |
110 | u32 lo, hi; | |
111 | u32 i = 0; | |
112 | ||
7153d961 | 113 | do { |
0213df74 | 114 | if (i++ > 10000) { |
2d06d8c4 | 115 | pr_debug("detected change pending stuck\n"); |
1da177e4 LT |
116 | return 1; |
117 | } | |
118 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 119 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
120 | |
121 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
122 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /* the isochronous relief time */ | |
128 | static void count_off_irt(struct powernow_k8_data *data) | |
129 | { | |
130 | udelay((1 << data->irt) * 10); | |
131 | return; | |
132 | } | |
133 | ||
27b46d76 | 134 | /* the voltage stabilization time */ |
1da177e4 LT |
135 | static void count_off_vst(struct powernow_k8_data *data) |
136 | { | |
137 | udelay(data->vstable * VST_UNITS_20US); | |
138 | return; | |
139 | } | |
140 | ||
141 | /* need to init the control msr to a safe value (for each cpu) */ | |
142 | static void fidvid_msr_init(void) | |
143 | { | |
144 | u32 lo, hi; | |
145 | u8 fid, vid; | |
146 | ||
147 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
148 | vid = hi & MSR_S_HI_CURRENT_VID; | |
149 | fid = lo & MSR_S_LO_CURRENT_FID; | |
150 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
151 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
2d06d8c4 | 152 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); |
1da177e4 LT |
153 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
154 | } | |
155 | ||
1da177e4 LT |
156 | /* write the new fid value along with the other control fields to the msr */ |
157 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
158 | { | |
159 | u32 lo; | |
160 | u32 savevid = data->currvid; | |
0213df74 | 161 | u32 i = 0; |
1da177e4 LT |
162 | |
163 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
164 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); | |
165 | return 1; | |
166 | } | |
167 | ||
0e64a0c9 DJ |
168 | lo = fid; |
169 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
170 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 171 | |
2d06d8c4 | 172 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
173 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
174 | ||
0213df74 DJ |
175 | do { |
176 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
177 | if (i++ > 100) { | |
0e64a0c9 DJ |
178 | printk(KERN_ERR PFX |
179 | "Hardware error - pending bit very stuck - " | |
180 | "no further pstate changes possible\n"); | |
63172cb3 | 181 | return 1; |
32ee8c3e | 182 | } |
0213df74 | 183 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
184 | |
185 | count_off_irt(data); | |
186 | ||
187 | if (savevid != data->currvid) { | |
0e64a0c9 DJ |
188 | printk(KERN_ERR PFX |
189 | "vid change on fid trans, old 0x%x, new 0x%x\n", | |
190 | savevid, data->currvid); | |
1da177e4 LT |
191 | return 1; |
192 | } | |
193 | ||
194 | if (fid != data->currfid) { | |
0e64a0c9 DJ |
195 | printk(KERN_ERR PFX |
196 | "fid trans failed, fid 0x%x, curr 0x%x\n", fid, | |
197 | data->currfid); | |
1da177e4 LT |
198 | return 1; |
199 | } | |
200 | ||
201 | return 0; | |
202 | } | |
203 | ||
204 | /* Write a new vid to the hardware */ | |
205 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
206 | { | |
207 | u32 lo; | |
208 | u32 savefid = data->currfid; | |
0213df74 | 209 | int i = 0; |
1da177e4 LT |
210 | |
211 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
212 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); | |
213 | return 1; | |
214 | } | |
215 | ||
0e64a0c9 DJ |
216 | lo = data->currfid; |
217 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
218 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 219 | |
2d06d8c4 | 220 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
221 | vid, lo, STOP_GRANT_5NS); |
222 | ||
0213df74 DJ |
223 | do { |
224 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 225 | if (i++ > 100) { |
0e64a0c9 DJ |
226 | printk(KERN_ERR PFX "internal error - pending bit " |
227 | "very stuck - no further pstate " | |
228 | "changes possible\n"); | |
6df89006 DJ |
229 | return 1; |
230 | } | |
0213df74 | 231 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
232 | |
233 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
234 | printk(KERN_ERR PFX "fid changed on vid trans, old " |
235 | "0x%x new 0x%x\n", | |
1da177e4 LT |
236 | savefid, data->currfid); |
237 | return 1; | |
238 | } | |
239 | ||
240 | if (vid != data->currvid) { | |
0e64a0c9 DJ |
241 | printk(KERN_ERR PFX "vid trans failed, vid 0x%x, " |
242 | "curr 0x%x\n", | |
243 | vid, data->currvid); | |
1da177e4 LT |
244 | return 1; |
245 | } | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | /* | |
251 | * Reduce the vid by the max of step or reqvid. | |
252 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 253 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 254 | */ |
0e64a0c9 DJ |
255 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
256 | u32 reqvid, u32 step) | |
1da177e4 LT |
257 | { |
258 | if ((data->currvid - reqvid) > step) | |
259 | reqvid = data->currvid - step; | |
260 | ||
261 | if (write_new_vid(data, reqvid)) | |
262 | return 1; | |
263 | ||
264 | count_off_vst(data); | |
265 | ||
266 | return 0; | |
267 | } | |
268 | ||
1f729e06 | 269 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
0e64a0c9 DJ |
270 | static int transition_fid_vid(struct powernow_k8_data *data, |
271 | u32 reqfid, u32 reqvid) | |
1da177e4 | 272 | { |
a2e1b4c3 | 273 | if (core_voltage_pre_transition(data, reqvid, reqfid)) |
1da177e4 LT |
274 | return 1; |
275 | ||
276 | if (core_frequency_transition(data, reqfid)) | |
277 | return 1; | |
278 | ||
279 | if (core_voltage_post_transition(data, reqvid)) | |
280 | return 1; | |
281 | ||
282 | if (query_current_values_with_pending_wait(data)) | |
283 | return 1; | |
284 | ||
285 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
0e64a0c9 DJ |
286 | printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, " |
287 | "curr 0x%x 0x%x\n", | |
1da177e4 LT |
288 | smp_processor_id(), |
289 | reqfid, reqvid, data->currfid, data->currvid); | |
290 | return 1; | |
291 | } | |
292 | ||
2d06d8c4 | 293 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
294 | smp_processor_id(), data->currfid, data->currvid); |
295 | ||
296 | return 0; | |
297 | } | |
298 | ||
299 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 | 300 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
a2e1b4c3 | 301 | u32 reqvid, u32 reqfid) |
1da177e4 LT |
302 | { |
303 | u32 rvosteps = data->rvo; | |
304 | u32 savefid = data->currfid; | |
a2e1b4c3 | 305 | u32 maxvid, lo, rvomult = 1; |
1da177e4 | 306 | |
2d06d8c4 | 307 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, " |
0e64a0c9 | 308 | "reqvid 0x%x, rvo 0x%x\n", |
1da177e4 LT |
309 | smp_processor_id(), |
310 | data->currfid, data->currvid, reqvid, data->rvo); | |
311 | ||
a2e1b4c3 ML |
312 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
313 | rvomult = 2; | |
314 | rvosteps *= rvomult; | |
065b807c DJ |
315 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
316 | maxvid = 0x1f & (maxvid >> 16); | |
2d06d8c4 | 317 | pr_debug("ph1 maxvid=0x%x\n", maxvid); |
065b807c DJ |
318 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
319 | reqvid = maxvid; | |
320 | ||
1da177e4 | 321 | while (data->currvid > reqvid) { |
2d06d8c4 | 322 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n", |
1da177e4 LT |
323 | data->currvid, reqvid); |
324 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
325 | return 1; | |
326 | } | |
327 | ||
a2e1b4c3 ML |
328 | while ((rvosteps > 0) && |
329 | ((rvomult * data->rvo + data->currvid) > reqvid)) { | |
065b807c | 330 | if (data->currvid == maxvid) { |
1da177e4 LT |
331 | rvosteps = 0; |
332 | } else { | |
2d06d8c4 | 333 | pr_debug("ph1: changing vid for rvo, req 0x%x\n", |
1da177e4 | 334 | data->currvid - 1); |
0e64a0c9 | 335 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
336 | return 1; |
337 | rvosteps--; | |
338 | } | |
339 | } | |
340 | ||
341 | if (query_current_values_with_pending_wait(data)) | |
342 | return 1; | |
343 | ||
344 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
345 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", |
346 | data->currfid); | |
1da177e4 LT |
347 | return 1; |
348 | } | |
349 | ||
2d06d8c4 | 350 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
351 | data->currfid, data->currvid); |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | /* Phase 2 - core frequency transition */ | |
357 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
358 | { | |
0e64a0c9 DJ |
359 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
360 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 361 | |
1da177e4 | 362 | if (data->currfid == reqfid) { |
0e64a0c9 DJ |
363 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", |
364 | data->currfid); | |
1da177e4 LT |
365 | return 0; |
366 | } | |
367 | ||
2d06d8c4 | 368 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, " |
0e64a0c9 | 369 | "reqfid 0x%x\n", |
1da177e4 LT |
370 | smp_processor_id(), |
371 | data->currfid, data->currvid, reqfid); | |
372 | ||
373 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
374 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
375 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
376 | : vcoreqfid - vcocurrfid; | |
377 | ||
a2e1b4c3 ML |
378 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
379 | vcofiddiff = 0; | |
380 | ||
1da177e4 | 381 | while (vcofiddiff > 2) { |
019a61b9 LM |
382 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
383 | ||
1da177e4 LT |
384 | if (reqfid > data->currfid) { |
385 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
386 | if (write_new_fid(data, |
387 | data->currfid + fid_interval)) | |
1da177e4 | 388 | return 1; |
1da177e4 LT |
389 | } else { |
390 | if (write_new_fid | |
0e64a0c9 DJ |
391 | (data, |
392 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 393 | return 1; |
1da177e4 LT |
394 | } |
395 | } else { | |
019a61b9 | 396 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
397 | return 1; |
398 | } | |
399 | ||
400 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
401 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
402 | : vcoreqfid - vcocurrfid; | |
403 | } | |
404 | ||
405 | if (write_new_fid(data, reqfid)) | |
406 | return 1; | |
407 | ||
408 | if (query_current_values_with_pending_wait(data)) | |
409 | return 1; | |
410 | ||
411 | if (data->currfid != reqfid) { | |
412 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
413 | "ph2: mismatch, failed fid transition, " |
414 | "curr 0x%x, req 0x%x\n", | |
1da177e4 LT |
415 | data->currfid, reqfid); |
416 | return 1; | |
417 | } | |
418 | ||
419 | if (savevid != data->currvid) { | |
420 | printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", | |
421 | savevid, data->currvid); | |
422 | return 1; | |
423 | } | |
424 | ||
2d06d8c4 | 425 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
426 | data->currfid, data->currvid); |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
431 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
432 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
433 | u32 reqvid) | |
1da177e4 LT |
434 | { |
435 | u32 savefid = data->currfid; | |
436 | u32 savereqvid = reqvid; | |
437 | ||
2d06d8c4 | 438 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
439 | smp_processor_id(), |
440 | data->currfid, data->currvid); | |
441 | ||
442 | if (reqvid != data->currvid) { | |
443 | if (write_new_vid(data, reqvid)) | |
444 | return 1; | |
445 | ||
446 | if (savefid != data->currfid) { | |
447 | printk(KERN_ERR PFX | |
448 | "ph3: bad fid change, save 0x%x, curr 0x%x\n", | |
449 | savefid, data->currfid); | |
450 | return 1; | |
451 | } | |
452 | ||
453 | if (data->currvid != reqvid) { | |
454 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
455 | "ph3: failed vid transition\n, " |
456 | "req 0x%x, curr 0x%x", | |
1da177e4 LT |
457 | reqvid, data->currvid); |
458 | return 1; | |
459 | } | |
460 | } | |
461 | ||
462 | if (query_current_values_with_pending_wait(data)) | |
463 | return 1; | |
464 | ||
465 | if (savereqvid != data->currvid) { | |
2d06d8c4 | 466 | pr_debug("ph3 failed, currvid 0x%x\n", data->currvid); |
1da177e4 LT |
467 | return 1; |
468 | } | |
469 | ||
470 | if (savefid != data->currfid) { | |
2d06d8c4 | 471 | pr_debug("ph3 failed, currfid changed 0x%x\n", |
1da177e4 LT |
472 | data->currfid); |
473 | return 1; | |
474 | } | |
475 | ||
2d06d8c4 | 476 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
477 | data->currfid, data->currvid); |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
fa8031ae AK |
482 | static const struct x86_cpu_id powernow_k8_ids[] = { |
483 | /* IO based frequency switching */ | |
484 | { X86_VENDOR_AMD, 0xf }, | |
fa8031ae AK |
485 | {} |
486 | }; | |
487 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); | |
488 | ||
1ff6e97f | 489 | static void check_supported_cpu(void *_rc) |
1da177e4 | 490 | { |
1da177e4 | 491 | u32 eax, ebx, ecx, edx; |
1ff6e97f | 492 | int *rc = _rc; |
1da177e4 | 493 | |
1ff6e97f | 494 | *rc = -ENODEV; |
1da177e4 | 495 | |
1da177e4 | 496 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
2c906ae6 | 497 | |
1f729e06 DJ |
498 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
499 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 500 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
0e64a0c9 DJ |
501 | printk(KERN_INFO PFX |
502 | "Processor cpuid %x not supported\n", eax); | |
1ff6e97f | 503 | return; |
1f729e06 | 504 | } |
1da177e4 | 505 | |
1f729e06 DJ |
506 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
507 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
508 | printk(KERN_INFO PFX | |
509 | "No frequency change capabilities detected\n"); | |
1ff6e97f | 510 | return; |
1f729e06 | 511 | } |
1da177e4 | 512 | |
1f729e06 | 513 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
514 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
515 | != P_STATE_TRANSITION_CAPABLE) { | |
516 | printk(KERN_INFO PFX | |
517 | "Power state transitions not supported\n"); | |
1ff6e97f | 518 | return; |
1f729e06 | 519 | } |
e1f0b8e9 | 520 | *rc = 0; |
1da177e4 | 521 | } |
1da177e4 LT |
522 | } |
523 | ||
0e64a0c9 DJ |
524 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
525 | u8 maxvid) | |
1da177e4 LT |
526 | { |
527 | unsigned int j; | |
528 | u8 lastfid = 0xff; | |
529 | ||
530 | for (j = 0; j < data->numps; j++) { | |
531 | if (pst[j].vid > LEAST_VID) { | |
2fd47094 TR |
532 | printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n", |
533 | j, pst[j].vid); | |
1da177e4 LT |
534 | return -EINVAL; |
535 | } | |
0e64a0c9 DJ |
536 | if (pst[j].vid < data->rvo) { |
537 | /* vid + rvo >= 0 */ | |
2fd47094 TR |
538 | printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate" |
539 | " %d\n", j); | |
1da177e4 LT |
540 | return -ENODEV; |
541 | } | |
0e64a0c9 DJ |
542 | if (pst[j].vid < maxvid + data->rvo) { |
543 | /* vid + rvo >= maxvid */ | |
2fd47094 TR |
544 | printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate" |
545 | " %d\n", j); | |
1da177e4 LT |
546 | return -ENODEV; |
547 | } | |
8aae8284 | 548 | if (pst[j].fid > MAX_FID) { |
2fd47094 TR |
549 | printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate" |
550 | " %d\n", j); | |
8aae8284 JS |
551 | return -ENODEV; |
552 | } | |
8aae8284 | 553 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 554 | /* Only first fid is allowed to be in "low" range */ |
2fd47094 TR |
555 | printk(KERN_ERR FW_BUG PFX "two low fids - %d : " |
556 | "0x%x\n", j, pst[j].fid); | |
1da177e4 LT |
557 | return -EINVAL; |
558 | } | |
559 | if (pst[j].fid < lastfid) | |
560 | lastfid = pst[j].fid; | |
561 | } | |
562 | if (lastfid & 1) { | |
2fd47094 | 563 | printk(KERN_ERR FW_BUG PFX "lastfid invalid\n"); |
1da177e4 LT |
564 | return -EINVAL; |
565 | } | |
566 | if (lastfid > LO_FID_TABLE_TOP) | |
0e64a0c9 DJ |
567 | printk(KERN_INFO FW_BUG PFX |
568 | "first fid not from lo freq table\n"); | |
1da177e4 LT |
569 | |
570 | return 0; | |
571 | } | |
572 | ||
f0adb134 KR |
573 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
574 | unsigned int entry) | |
0e64a0c9 | 575 | { |
f0adb134 | 576 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
0e64a0c9 DJ |
577 | } |
578 | ||
1da177e4 LT |
579 | static void print_basics(struct powernow_k8_data *data) |
580 | { | |
581 | int j; | |
582 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
583 | if (data->powernow_table[j].frequency != |
584 | CPUFREQ_ENTRY_INVALID) { | |
0e64a0c9 | 585 | printk(KERN_INFO PFX |
9e918695 | 586 | "fid 0x%x (%d MHz), vid 0x%x\n", |
9a60ddbc DJ |
587 | data->powernow_table[j].index & 0xff, |
588 | data->powernow_table[j].frequency/1000, | |
589 | data->powernow_table[j].index >> 8); | |
1f729e06 | 590 | } |
1da177e4 LT |
591 | } |
592 | if (data->batps) | |
0e64a0c9 DJ |
593 | printk(KERN_INFO PFX "Only %d pstates on battery\n", |
594 | data->batps); | |
1da177e4 LT |
595 | } |
596 | ||
0e64a0c9 DJ |
597 | static int fill_powernow_table(struct powernow_k8_data *data, |
598 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
599 | { |
600 | struct cpufreq_frequency_table *powernow_table; | |
601 | unsigned int j; | |
602 | ||
0e64a0c9 DJ |
603 | if (data->batps) { |
604 | /* use ACPI support to get full speed on mains power */ | |
605 | printk(KERN_WARNING PFX | |
606 | "Only %d pstates usable (use ACPI driver for full " | |
607 | "range\n", data->batps); | |
1da177e4 LT |
608 | data->numps = data->batps; |
609 | } | |
610 | ||
0e64a0c9 | 611 | for (j = 1; j < data->numps; j++) { |
1da177e4 LT |
612 | if (pst[j-1].fid >= pst[j].fid) { |
613 | printk(KERN_ERR PFX "PST out of sequence\n"); | |
614 | return -EINVAL; | |
615 | } | |
616 | } | |
617 | ||
618 | if (data->numps < 2) { | |
619 | printk(KERN_ERR PFX "no p states to transition\n"); | |
620 | return -ENODEV; | |
621 | } | |
622 | ||
623 | if (check_pst_table(data, pst, maxvid)) | |
624 | return -EINVAL; | |
625 | ||
626 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
627 | * (data->numps + 1)), GFP_KERNEL); | |
628 | if (!powernow_table) { | |
629 | printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); | |
630 | return -ENOMEM; | |
631 | } | |
632 | ||
633 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 634 | int freq; |
1da177e4 LT |
635 | powernow_table[j].index = pst[j].fid; /* lower 8 bits */ |
636 | powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
637 | freq = find_khz_freq_from_fid(pst[j].fid); |
638 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
639 | } |
640 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
641 | powernow_table[data->numps].index = 0; | |
642 | ||
643 | if (query_current_values_with_pending_wait(data)) { | |
644 | kfree(powernow_table); | |
645 | return -EIO; | |
646 | } | |
647 | ||
2d06d8c4 | 648 | pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); |
1da177e4 | 649 | data->powernow_table = powernow_table; |
7ad728f9 | 650 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 651 | print_basics(data); |
1da177e4 LT |
652 | |
653 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
654 | if ((pst[j].fid == data->currfid) && |
655 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
656 | return 0; |
657 | ||
2d06d8c4 | 658 | pr_debug("currfid/vid do not match PST, ignoring\n"); |
1da177e4 LT |
659 | return 0; |
660 | } | |
661 | ||
662 | /* Find and validate the PSB/PST table in BIOS. */ | |
663 | static int find_psb_table(struct powernow_k8_data *data) | |
664 | { | |
665 | struct psb_s *psb; | |
666 | unsigned int i; | |
667 | u32 mvs; | |
668 | u8 maxvid; | |
669 | u32 cpst = 0; | |
670 | u32 thiscpuid; | |
671 | ||
672 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
673 | /* Scan BIOS looking for the signature. */ | |
674 | /* It can not be at ffff0 - it is too big. */ | |
675 | ||
676 | psb = phys_to_virt(i); | |
677 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
678 | continue; | |
679 | ||
2d06d8c4 | 680 | pr_debug("found PSB header at 0x%p\n", psb); |
1da177e4 | 681 | |
2d06d8c4 | 682 | pr_debug("table vers: 0x%x\n", psb->tableversion); |
1da177e4 | 683 | if (psb->tableversion != PSB_VERSION_1_4) { |
2fd47094 | 684 | printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n"); |
1da177e4 LT |
685 | return -ENODEV; |
686 | } | |
687 | ||
2d06d8c4 | 688 | pr_debug("flags: 0x%x\n", psb->flags1); |
1da177e4 | 689 | if (psb->flags1) { |
2fd47094 | 690 | printk(KERN_ERR FW_BUG PFX "unknown flags\n"); |
1da177e4 LT |
691 | return -ENODEV; |
692 | } | |
693 | ||
694 | data->vstable = psb->vstable; | |
2d06d8c4 | 695 | pr_debug("voltage stabilization time: %d(*20us)\n", |
0e64a0c9 | 696 | data->vstable); |
1da177e4 | 697 | |
2d06d8c4 | 698 | pr_debug("flags2: 0x%x\n", psb->flags2); |
1da177e4 LT |
699 | data->rvo = psb->flags2 & 3; |
700 | data->irt = ((psb->flags2) >> 2) & 3; | |
701 | mvs = ((psb->flags2) >> 4) & 3; | |
702 | data->vidmvs = 1 << mvs; | |
703 | data->batps = ((psb->flags2) >> 6) & 3; | |
704 | ||
2d06d8c4 DB |
705 | pr_debug("ramp voltage offset: %d\n", data->rvo); |
706 | pr_debug("isochronous relief time: %d\n", data->irt); | |
707 | pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
1da177e4 | 708 | |
2d06d8c4 | 709 | pr_debug("numpst: 0x%x\n", psb->num_tables); |
1da177e4 | 710 | cpst = psb->num_tables; |
0e64a0c9 DJ |
711 | if ((psb->cpuid == 0x00000fc0) || |
712 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 713 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
714 | if ((thiscpuid == 0x00000fc0) || |
715 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 716 | cpst = 1; |
1da177e4 LT |
717 | } |
718 | if (cpst != 1) { | |
2fd47094 | 719 | printk(KERN_ERR FW_BUG PFX "numpst must be 1\n"); |
1da177e4 LT |
720 | return -ENODEV; |
721 | } | |
722 | ||
723 | data->plllock = psb->plllocktime; | |
2d06d8c4 DB |
724 | pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); |
725 | pr_debug("maxfid: 0x%x\n", psb->maxfid); | |
726 | pr_debug("maxvid: 0x%x\n", psb->maxvid); | |
1da177e4 LT |
727 | maxvid = psb->maxvid; |
728 | ||
729 | data->numps = psb->numps; | |
2d06d8c4 | 730 | pr_debug("numpstates: 0x%x\n", data->numps); |
0e64a0c9 DJ |
731 | return fill_powernow_table(data, |
732 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
733 | } |
734 | /* | |
735 | * If you see this message, complain to BIOS manufacturer. If | |
736 | * he tells you "we do not support Linux" or some similar | |
737 | * nonsense, remember that Windows 2000 uses the same legacy | |
738 | * mechanism that the old Linux PSB driver uses. Tell them it | |
739 | * is broken with Windows 2000. | |
740 | * | |
741 | * The reference to the AMD documentation is chapter 9 in the | |
742 | * BIOS and Kernel Developer's Guide, which is available on | |
743 | * www.amd.com | |
744 | */ | |
79cc56af | 745 | printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n"); |
298decfb MR |
746 | printk(KERN_ERR PFX "Make sure that your BIOS is up to date" |
747 | " and Cool'N'Quiet support is enabled in BIOS setup\n"); | |
1da177e4 LT |
748 | return -ENODEV; |
749 | } | |
750 | ||
0e64a0c9 DJ |
751 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
752 | unsigned int index) | |
1da177e4 | 753 | { |
439913ff | 754 | u64 control; |
0e64a0c9 | 755 | |
e1f0b8e9 | 756 | if (!data->acpi_data.state_count) |
1da177e4 LT |
757 | return; |
758 | ||
21335d02 LH |
759 | control = data->acpi_data.states[index].control; |
760 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; | |
761 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; | |
762 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
763 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; | |
764 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); | |
765 | data->vstable = (control >> VST_SHIFT) & VST_MASK; | |
766 | } | |
1da177e4 LT |
767 | |
768 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
769 | { | |
1da177e4 | 770 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 771 | int ret_val = -ENODEV; |
439913ff | 772 | u64 control, status; |
1da177e4 | 773 | |
f607e3a0 | 774 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
2d06d8c4 | 775 | pr_debug("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
776 | return -EIO; |
777 | } | |
778 | ||
779 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 780 | if (data->acpi_data.state_count <= 1) { |
2d06d8c4 | 781 | pr_debug("No ACPI P-States\n"); |
1da177e4 LT |
782 | goto err_out; |
783 | } | |
784 | ||
2c701b10 DJ |
785 | control = data->acpi_data.control_register.space_id; |
786 | status = data->acpi_data.status_register.space_id; | |
787 | ||
788 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
789 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
2d06d8c4 | 790 | pr_debug("Invalid control/status registers (%llx - %llx)\n", |
2c701b10 | 791 | control, status); |
1da177e4 LT |
792 | goto err_out; |
793 | } | |
794 | ||
795 | /* fill in data->powernow_table */ | |
796 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
f607e3a0 | 797 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 | 798 | if (!powernow_table) { |
2d06d8c4 | 799 | pr_debug("powernow_table memory alloc failure\n"); |
1da177e4 LT |
800 | goto err_out; |
801 | } | |
802 | ||
db39d552 ML |
803 | /* fill in data */ |
804 | data->numps = data->acpi_data.state_count; | |
805 | powernow_k8_acpi_pst_values(data, 0); | |
806 | ||
e1f0b8e9 | 807 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
1f729e06 DJ |
808 | if (ret_val) |
809 | goto err_out_mem; | |
810 | ||
0e64a0c9 DJ |
811 | powernow_table[data->acpi_data.state_count].frequency = |
812 | CPUFREQ_TABLE_END; | |
f607e3a0 | 813 | powernow_table[data->acpi_data.state_count].index = 0; |
1f729e06 DJ |
814 | data->powernow_table = powernow_table; |
815 | ||
7ad728f9 | 816 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 817 | print_basics(data); |
1f729e06 DJ |
818 | |
819 | /* notify BIOS that we exist */ | |
820 | acpi_processor_notify_smm(THIS_MODULE); | |
821 | ||
eaa95840 | 822 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
2fdf66b4 RR |
823 | printk(KERN_ERR PFX |
824 | "unable to alloc powernow_k8_data cpumask\n"); | |
825 | ret_val = -ENOMEM; | |
826 | goto err_out_mem; | |
827 | } | |
828 | ||
1f729e06 DJ |
829 | return 0; |
830 | ||
831 | err_out_mem: | |
832 | kfree(powernow_table); | |
833 | ||
834 | err_out: | |
f607e3a0 | 835 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
1f729e06 | 836 | |
0e64a0c9 DJ |
837 | /* data->acpi_data.state_count informs us at ->exit() |
838 | * whether ACPI was used */ | |
f607e3a0 | 839 | data->acpi_data.state_count = 0; |
1f729e06 | 840 | |
2fdf66b4 | 841 | return ret_val; |
1f729e06 DJ |
842 | } |
843 | ||
0e64a0c9 DJ |
844 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
845 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
846 | { |
847 | int i; | |
0e64a0c9 | 848 | |
f607e3a0 | 849 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
850 | u32 fid; |
851 | u32 vid; | |
0e64a0c9 | 852 | u32 freq, index; |
439913ff | 853 | u64 status, control; |
094ce7fd DJ |
854 | |
855 | if (data->exttype) { | |
0e64a0c9 DJ |
856 | status = data->acpi_data.states[i].status; |
857 | fid = status & EXT_FID_MASK; | |
858 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 859 | } else { |
0e64a0c9 DJ |
860 | control = data->acpi_data.states[i].control; |
861 | fid = control & FID_MASK; | |
862 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 863 | } |
1da177e4 | 864 | |
2d06d8c4 | 865 | pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); |
1da177e4 | 866 | |
0e64a0c9 DJ |
867 | index = fid | (vid<<8); |
868 | powernow_table[i].index = index; | |
869 | ||
870 | freq = find_khz_freq_from_fid(fid); | |
871 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
872 | |
873 | /* verify frequency is OK */ | |
0e64a0c9 | 874 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
2d06d8c4 | 875 | pr_debug("invalid freq %u kHz, ignoring\n", freq); |
f0adb134 | 876 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
877 | continue; |
878 | } | |
879 | ||
0e64a0c9 DJ |
880 | /* verify voltage is OK - |
881 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 882 | if (vid == VID_OFF) { |
2d06d8c4 | 883 | pr_debug("invalid vid %u, ignoring\n", vid); |
f0adb134 | 884 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
885 | continue; |
886 | } | |
887 | ||
0e64a0c9 DJ |
888 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
889 | printk(KERN_INFO PFX "invalid freq entries " | |
890 | "%u kHz vs. %u kHz\n", freq, | |
891 | (unsigned int) | |
892 | (data->acpi_data.states[i].core_frequency | |
893 | * 1000)); | |
f0adb134 | 894 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
895 | continue; |
896 | } | |
897 | } | |
1da177e4 | 898 | return 0; |
1da177e4 LT |
899 | } |
900 | ||
901 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
902 | { | |
f607e3a0 | 903 | if (data->acpi_data.state_count) |
0e64a0c9 DJ |
904 | acpi_processor_unregister_performance(&data->acpi_data, |
905 | data->cpu); | |
2fdf66b4 | 906 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
907 | } |
908 | ||
732553e5 ML |
909 | static int get_transition_latency(struct powernow_k8_data *data) |
910 | { | |
911 | int max_latency = 0; | |
912 | int i; | |
913 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
914 | int cur_latency = data->acpi_data.states[i].transition_latency | |
915 | + data->acpi_data.states[i].bus_master_latency; | |
916 | if (cur_latency > max_latency) | |
917 | max_latency = cur_latency; | |
918 | } | |
86e13684 | 919 | if (max_latency == 0) { |
e1f0b8e9 | 920 | pr_err(FW_WARN PFX "Invalid zero transition latency\n"); |
86e13684 TR |
921 | max_latency = 1; |
922 | } | |
732553e5 ML |
923 | /* value in usecs, needs to be in nanoseconds */ |
924 | return 1000 * max_latency; | |
925 | } | |
926 | ||
1da177e4 | 927 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 DJ |
928 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
929 | unsigned int index) | |
1da177e4 | 930 | { |
1f729e06 DJ |
931 | u32 fid = 0; |
932 | u32 vid = 0; | |
065b807c | 933 | int res, i; |
1da177e4 LT |
934 | struct cpufreq_freqs freqs; |
935 | ||
2d06d8c4 | 936 | pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index); |
1da177e4 | 937 | |
1f729e06 | 938 | /* fid/vid correctness check for k8 */ |
1da177e4 | 939 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
940 | * the cpufreq frequency table in find_psb_table, vid |
941 | * are the upper 8 bits. | |
1da177e4 | 942 | */ |
1da177e4 LT |
943 | fid = data->powernow_table[index].index & 0xFF; |
944 | vid = (data->powernow_table[index].index & 0xFF00) >> 8; | |
945 | ||
2d06d8c4 | 946 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); |
1da177e4 LT |
947 | |
948 | if (query_current_values_with_pending_wait(data)) | |
949 | return 1; | |
950 | ||
951 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
2d06d8c4 | 952 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n", |
1da177e4 LT |
953 | fid, vid); |
954 | return 0; | |
955 | } | |
956 | ||
2d06d8c4 | 957 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n", |
1da177e4 | 958 | smp_processor_id(), fid, vid); |
1da177e4 LT |
959 | freqs.old = find_khz_freq_from_fid(data->currfid); |
960 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 961 | |
8e7c2597 | 962 | for_each_cpu(i, data->available_cores) { |
065b807c DJ |
963 | freqs.cpu = i; |
964 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
965 | } | |
1da177e4 | 966 | |
1da177e4 | 967 | res = transition_fid_vid(data, fid, vid); |
a9d3d206 KRW |
968 | if (res) |
969 | return res; | |
970 | ||
1da177e4 | 971 | freqs.new = find_khz_freq_from_fid(data->currfid); |
1f729e06 | 972 | |
8e7c2597 | 973 | for_each_cpu(i, data->available_cores) { |
1f729e06 DJ |
974 | freqs.cpu = i; |
975 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
976 | } | |
977 | return res; | |
978 | } | |
979 | ||
6889125b TH |
980 | struct powernowk8_target_arg { |
981 | struct cpufreq_policy *pol; | |
982 | unsigned targfreq; | |
983 | unsigned relation; | |
984 | }; | |
985 | ||
986 | static long powernowk8_target_fn(void *arg) | |
1da177e4 | 987 | { |
6889125b TH |
988 | struct powernowk8_target_arg *pta = arg; |
989 | struct cpufreq_policy *pol = pta->pol; | |
990 | unsigned targfreq = pta->targfreq; | |
991 | unsigned relation = pta->relation; | |
2c6b8c03 | 992 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
993 | u32 checkfid; |
994 | u32 checkvid; | |
1da177e4 | 995 | unsigned int newstate; |
6889125b | 996 | int ret; |
1da177e4 | 997 | |
4211a303 JS |
998 | if (!data) |
999 | return -EINVAL; | |
1000 | ||
9180053c AB |
1001 | checkfid = data->currfid; |
1002 | checkvid = data->currvid; | |
1003 | ||
1da177e4 LT |
1004 | if (pending_bit_stuck()) { |
1005 | printk(KERN_ERR PFX "failing targ, change pending bit set\n"); | |
6889125b | 1006 | return -EIO; |
1da177e4 LT |
1007 | } |
1008 | ||
2d06d8c4 | 1009 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", |
1da177e4 LT |
1010 | pol->cpu, targfreq, pol->min, pol->max, relation); |
1011 | ||
83844510 | 1012 | if (query_current_values_with_pending_wait(data)) |
6889125b | 1013 | return -EIO; |
1da177e4 | 1014 | |
e1f0b8e9 MG |
1015 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n", |
1016 | data->currfid, data->currvid); | |
1da177e4 | 1017 | |
e1f0b8e9 MG |
1018 | if ((checkvid != data->currvid) || |
1019 | (checkfid != data->currfid)) { | |
1020 | pr_info(PFX | |
1021 | "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", | |
1022 | checkfid, data->currfid, | |
1023 | checkvid, data->currvid); | |
1da177e4 LT |
1024 | } |
1025 | ||
0e64a0c9 DJ |
1026 | if (cpufreq_frequency_table_target(pol, data->powernow_table, |
1027 | targfreq, relation, &newstate)) | |
6889125b | 1028 | return -EIO; |
1da177e4 | 1029 | |
14cc3e2b | 1030 | mutex_lock(&fidvid_mutex); |
065b807c | 1031 | |
1da177e4 LT |
1032 | powernow_k8_acpi_pst_values(data, newstate); |
1033 | ||
e1f0b8e9 MG |
1034 | ret = transition_frequency_fidvid(data, newstate); |
1035 | ||
1f729e06 | 1036 | if (ret) { |
1da177e4 | 1037 | printk(KERN_ERR PFX "transition frequency failed\n"); |
14cc3e2b | 1038 | mutex_unlock(&fidvid_mutex); |
6889125b | 1039 | return 1; |
1da177e4 | 1040 | } |
14cc3e2b | 1041 | mutex_unlock(&fidvid_mutex); |
065b807c | 1042 | |
e1f0b8e9 | 1043 | pol->cur = find_khz_freq_from_fid(data->currfid); |
1da177e4 | 1044 | |
6889125b TH |
1045 | return 0; |
1046 | } | |
1047 | ||
1048 | /* Driver entry point to switch to the target frequency */ | |
1049 | static int powernowk8_target(struct cpufreq_policy *pol, | |
1050 | unsigned targfreq, unsigned relation) | |
1051 | { | |
1052 | struct powernowk8_target_arg pta = { .pol = pol, .targfreq = targfreq, | |
1053 | .relation = relation }; | |
1054 | ||
e4df1cbc | 1055 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
1da177e4 LT |
1056 | } |
1057 | ||
1058 | /* Driver entry point to verify the policy and range of frequencies */ | |
1059 | static int powernowk8_verify(struct cpufreq_policy *pol) | |
1060 | { | |
2c6b8c03 | 1061 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 | 1062 | |
4211a303 JS |
1063 | if (!data) |
1064 | return -EINVAL; | |
1065 | ||
1da177e4 LT |
1066 | return cpufreq_frequency_table_verify(pol, data->powernow_table); |
1067 | } | |
1068 | ||
1ff6e97f RR |
1069 | struct init_on_cpu { |
1070 | struct powernow_k8_data *data; | |
1071 | int rc; | |
1072 | }; | |
1073 | ||
1074 | static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu) | |
1075 | { | |
1076 | struct init_on_cpu *init_on_cpu = _init_on_cpu; | |
1077 | ||
1078 | if (pending_bit_stuck()) { | |
1079 | printk(KERN_ERR PFX "failing init, change pending bit set\n"); | |
1080 | init_on_cpu->rc = -ENODEV; | |
1081 | return; | |
1082 | } | |
1083 | ||
1084 | if (query_current_values_with_pending_wait(init_on_cpu->data)) { | |
1085 | init_on_cpu->rc = -ENODEV; | |
1086 | return; | |
1087 | } | |
1088 | ||
e1f0b8e9 | 1089 | fidvid_msr_init(); |
1ff6e97f RR |
1090 | |
1091 | init_on_cpu->rc = 0; | |
1092 | } | |
1093 | ||
56835e6c BP |
1094 | static const char missing_pss_msg[] = |
1095 | KERN_ERR | |
1096 | FW_BUG PFX "No compatible ACPI _PSS objects found.\n" | |
1097 | FW_BUG PFX "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" | |
1098 | FW_BUG PFX "If that doesn't help, try upgrading your BIOS.\n"; | |
1099 | ||
1da177e4 | 1100 | /* per CPU init entry point to the driver */ |
aa41eb99 | 1101 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1102 | { |
1103 | struct powernow_k8_data *data; | |
1ff6e97f | 1104 | struct init_on_cpu init_on_cpu; |
d7fa706c | 1105 | int rc; |
1da177e4 | 1106 | |
8aae8284 JS |
1107 | if (!cpu_online(pol->cpu)) |
1108 | return -ENODEV; | |
1109 | ||
1ff6e97f RR |
1110 | smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); |
1111 | if (rc) | |
1da177e4 LT |
1112 | return -ENODEV; |
1113 | ||
bfdc708d | 1114 | data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); |
1da177e4 LT |
1115 | if (!data) { |
1116 | printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); | |
1117 | return -ENOMEM; | |
1118 | } | |
1da177e4 LT |
1119 | |
1120 | data->cpu = pol->cpu; | |
1121 | ||
a0abd520 | 1122 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 | 1123 | /* |
0d2eb44f | 1124 | * Use the PSB BIOS structure. This is only available on |
1da177e4 LT |
1125 | * an UP version, and is deprecated by AMD. |
1126 | */ | |
9ed059e1 | 1127 | if (num_online_cpus() != 1) { |
56835e6c | 1128 | printk_once(missing_pss_msg); |
0cb8bc25 | 1129 | goto err_out; |
1da177e4 LT |
1130 | } |
1131 | if (pol->cpu != 0) { | |
2fd47094 TR |
1132 | printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " |
1133 | "CPU other than CPU0. Complain to your BIOS " | |
1134 | "vendor.\n"); | |
0cb8bc25 | 1135 | goto err_out; |
1da177e4 LT |
1136 | } |
1137 | rc = find_psb_table(data); | |
0cb8bc25 DJ |
1138 | if (rc) |
1139 | goto err_out; | |
1140 | ||
732553e5 ML |
1141 | /* Take a crude guess here. |
1142 | * That guess was in microseconds, so multiply with 1000 */ | |
1143 | pol->cpuinfo.transition_latency = ( | |
1144 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1145 | ((1 << data->irt) * 30)) * 1000; | |
1146 | } else /* ACPI _PSS objects available */ | |
1147 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1148 | |
1149 | /* only run on specific CPU from here on */ | |
1ff6e97f RR |
1150 | init_on_cpu.data = data; |
1151 | smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, | |
1152 | &init_on_cpu, 1); | |
1153 | rc = init_on_cpu.rc; | |
1154 | if (rc != 0) | |
1155 | goto err_out_exit_acpi; | |
1da177e4 | 1156 | |
e1f0b8e9 | 1157 | cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu)); |
835481d9 | 1158 | data->available_cores = pol->cpus; |
1da177e4 | 1159 | |
e1f0b8e9 | 1160 | pol->cur = find_khz_freq_from_fid(data->currfid); |
2d06d8c4 | 1161 | pr_debug("policy current frequency %d kHz\n", pol->cur); |
1da177e4 LT |
1162 | |
1163 | /* min/max the cpu is capable of */ | |
1164 | if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { | |
2fd47094 | 1165 | printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n"); |
1da177e4 LT |
1166 | powernow_k8_cpu_exit_acpi(data); |
1167 | kfree(data->powernow_table); | |
1168 | kfree(data); | |
1169 | return -EINVAL; | |
1170 | } | |
1171 | ||
1172 | cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); | |
1173 | ||
e1f0b8e9 MG |
1174 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n", |
1175 | data->currfid, data->currvid); | |
1da177e4 | 1176 | |
2c6b8c03 | 1177 | per_cpu(powernow_data, pol->cpu) = data; |
1da177e4 LT |
1178 | |
1179 | return 0; | |
1180 | ||
1ff6e97f | 1181 | err_out_exit_acpi: |
1da177e4 LT |
1182 | powernow_k8_cpu_exit_acpi(data); |
1183 | ||
0cb8bc25 | 1184 | err_out: |
1da177e4 LT |
1185 | kfree(data); |
1186 | return -ENODEV; | |
1187 | } | |
1188 | ||
0e64a0c9 | 1189 | static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1190 | { |
2c6b8c03 | 1191 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 LT |
1192 | |
1193 | if (!data) | |
1194 | return -EINVAL; | |
1195 | ||
1196 | powernow_k8_cpu_exit_acpi(data); | |
1197 | ||
1198 | cpufreq_frequency_table_put_attr(pol->cpu); | |
1199 | ||
1200 | kfree(data->powernow_table); | |
1201 | kfree(data); | |
557a701c | 1202 | per_cpu(powernow_data, pol->cpu) = NULL; |
1da177e4 LT |
1203 | |
1204 | return 0; | |
1205 | } | |
1206 | ||
1ff6e97f RR |
1207 | static void query_values_on_cpu(void *_err) |
1208 | { | |
1209 | int *err = _err; | |
0a3aee0d | 1210 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
1ff6e97f RR |
1211 | |
1212 | *err = query_current_values_with_pending_wait(data); | |
1213 | } | |
1214 | ||
0e64a0c9 | 1215 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1216 | { |
e15bc455 | 1217 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1da177e4 | 1218 | unsigned int khz = 0; |
1ff6e97f | 1219 | int err; |
eef5167e JS |
1220 | |
1221 | if (!data) | |
557a701c | 1222 | return 0; |
eef5167e | 1223 | |
1ff6e97f RR |
1224 | smp_call_function_single(cpu, query_values_on_cpu, &err, true); |
1225 | if (err) | |
1da177e4 LT |
1226 | goto out; |
1227 | ||
e1f0b8e9 | 1228 | khz = find_khz_freq_from_fid(data->currfid); |
58389a86 | 1229 | |
1da177e4 | 1230 | |
b9111b7b | 1231 | out: |
1da177e4 LT |
1232 | return khz; |
1233 | } | |
1234 | ||
0e64a0c9 | 1235 | static struct freq_attr *powernow_k8_attr[] = { |
1da177e4 LT |
1236 | &cpufreq_freq_attr_scaling_available_freqs, |
1237 | NULL, | |
1238 | }; | |
1239 | ||
221dee28 | 1240 | static struct cpufreq_driver cpufreq_amd64_driver = { |
e2f74f35 TR |
1241 | .verify = powernowk8_verify, |
1242 | .target = powernowk8_target, | |
1243 | .bios_limit = acpi_processor_get_bios_limit, | |
1244 | .init = powernowk8_cpu_init, | |
1245 | .exit = __devexit_p(powernowk8_cpu_exit), | |
1246 | .get = powernowk8_get, | |
1247 | .name = "powernow-k8", | |
1248 | .owner = THIS_MODULE, | |
1249 | .attr = powernow_k8_attr, | |
1da177e4 LT |
1250 | }; |
1251 | ||
1252 | /* driver entry point for init */ | |
aa41eb99 | 1253 | static int __cpuinit powernowk8_init(void) |
1da177e4 | 1254 | { |
e1f0b8e9 | 1255 | unsigned int i, supported_cpus = 0; |
ac818314 | 1256 | int rv; |
1da177e4 | 1257 | |
e1f0b8e9 MG |
1258 | if (static_cpu_has(X86_FEATURE_HW_PSTATE)) { |
1259 | pr_warn(PFX "this CPU is not supported anymore, using acpi-cpufreq instead.\n"); | |
1260 | request_module("acpi-cpufreq"); | |
fa8031ae | 1261 | return -ENODEV; |
e1f0b8e9 | 1262 | } |
fa8031ae | 1263 | |
fa8031ae AK |
1264 | if (!x86_match_cpu(powernow_k8_ids)) |
1265 | return -ENODEV; | |
1266 | ||
a7201156 | 1267 | for_each_online_cpu(i) { |
1ff6e97f RR |
1268 | int rc; |
1269 | smp_call_function_single(i, check_supported_cpu, &rc, 1); | |
1270 | if (rc == 0) | |
1da177e4 LT |
1271 | supported_cpus++; |
1272 | } | |
1273 | ||
73860c6b BP |
1274 | if (supported_cpus != num_online_cpus()) |
1275 | return -ENODEV; | |
1276 | ||
ac818314 | 1277 | rv = cpufreq_register_driver(&cpufreq_amd64_driver); |
73860c6b | 1278 | |
a2060958 AP |
1279 | if (!rv) |
1280 | pr_info(PFX "Found %d %s (%d cpu cores) (" VERSION ")\n", | |
1281 | num_online_nodes(), boot_cpu_data.x86_model_id, | |
1282 | supported_cpus); | |
73860c6b | 1283 | |
ac818314 | 1284 | return rv; |
1da177e4 LT |
1285 | } |
1286 | ||
1287 | /* driver entry point for term */ | |
1288 | static void __exit powernowk8_exit(void) | |
1289 | { | |
2d06d8c4 | 1290 | pr_debug("exit\n"); |
1da177e4 LT |
1291 | |
1292 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1293 | } | |
1294 | ||
0e64a0c9 DJ |
1295 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and " |
1296 | "Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1297 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1298 | MODULE_LICENSE("GPL"); | |
1299 | ||
1300 | late_initcall(powernowk8_init); | |
1301 | module_exit(powernowk8_exit); |