[mirror_ubuntu-artful-kernel.git] / drivers / cpufreq / qoriq-cpufreq.c

/*
 * Copyright 2013 Freescale Semiconductor, Inc.
 *
 * CPU Frequency Scaling driver for Freescale QorIQ SoCs.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/cpufreq.h>
#include <linux/cpu_cooling.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/smp.h>

/**
 * struct cpu_data
 * @pclk: the parent clock of cpu
 * @table: frequency table
 */
struct cpu_data {
	struct clk **pclk;
	struct cpufreq_frequency_table *table;
	struct thermal_cooling_device *cdev;
};

/*
 * Don't use cpufreq on this SoC -- used when the SoC would have otherwise
 * matched a more generic compatible.
 */
#define SOC_BLACKLIST		1

/**
 * struct soc_data - SoC specific data
 * @flags: SOC_xxx
 */
struct soc_data {
	u32 flags;
};

static u32 get_bus_freq(void)
{
	struct device_node *soc;
	u32 sysfreq;

	soc = of_find_node_by_type(NULL, "soc");
	if (!soc)
		return 0;

	if (of_property_read_u32(soc, "bus-frequency", &sysfreq))
		sysfreq = 0;

	of_node_put(soc);

	return sysfreq;
}

static struct clk *cpu_to_clk(int cpu)
{
	struct device_node *np;
	struct clk *clk;

	if (!cpu_present(cpu))
		return NULL;

	np = of_get_cpu_node(cpu, NULL);
	if (!np)
		return NULL;

	clk = of_clk_get(np, 0);
	of_node_put(np);
	return clk;
}

/* traverse cpu nodes to get cpu mask of sharing clock wire */
static void set_affected_cpus(struct cpufreq_policy *policy)
{
	struct cpumask *dstp = policy->cpus;
	struct clk *clk;
	int i;

	for_each_present_cpu(i) {
		clk = cpu_to_clk(i);
		if (IS_ERR(clk)) {
			pr_err("%s: no clock for cpu %d\n", __func__, i);
			continue;
		}

		if (clk_is_match(policy->clk, clk))
			cpumask_set_cpu(i, dstp);
	}
}

/* reduce the duplicated frequencies in frequency table */
static void freq_table_redup(struct cpufreq_frequency_table *freq_table,
		int count)
{
	int i, j;

	for (i = 1; i < count; i++) {
		for (j = 0; j < i; j++) {
			if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID ||
					freq_table[j].frequency !=
					freq_table[i].frequency)
				continue;

			freq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
			break;
		}
	}
}

/* sort the frequencies in frequency table in descenting order */
static void freq_table_sort(struct cpufreq_frequency_table *freq_table,
		int count)
{
	int i, j, ind;
	unsigned int freq, max_freq;
	struct cpufreq_frequency_table table;

	for (i = 0; i < count - 1; i++) {
		max_freq = freq_table[i].frequency;
		ind = i;
		for (j = i + 1; j < count; j++) {
			freq = freq_table[j].frequency;
			if (freq == CPUFREQ_ENTRY_INVALID ||
					freq <= max_freq)
				continue;
			ind = j;
			max_freq = freq;
		}

		if (ind != i) {
			/* exchange the frequencies */
			table.driver_data = freq_table[i].driver_data;
			table.frequency = freq_table[i].frequency;
			freq_table[i].driver_data = freq_table[ind].driver_data;
			freq_table[i].frequency = freq_table[ind].frequency;
			freq_table[ind].driver_data = table.driver_data;
			freq_table[ind].frequency = table.frequency;
		}
	}
}

static int qoriq_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	struct device_node *np;
	int i, count, ret;
	u32 freq;
	struct clk *clk;
	const struct clk_hw *hwclk;
	struct cpufreq_frequency_table *table;
	struct cpu_data *data;
	unsigned int cpu = policy->cpu;
	u64 u64temp;

	np = of_get_cpu_node(cpu, NULL);
	if (!np)
		return -ENODEV;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		goto err_np;

	policy->clk = of_clk_get(np, 0);
	if (IS_ERR(policy->clk)) {
		pr_err("%s: no clock information\n", __func__);
		goto err_nomem2;
	}

	hwclk = __clk_get_hw(policy->clk);
	count = clk_hw_get_num_parents(hwclk);

	data->pclk = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
	if (!data->pclk) {
		pr_err("%s: no memory\n", __func__);
		goto err_nomem2;
	}

	table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
	if (!table) {
		pr_err("%s: no memory\n", __func__);
		goto err_pclk;
	}

	for (i = 0; i < count; i++) {
		clk = clk_hw_get_parent_by_index(hwclk, i)->clk;
		data->pclk[i] = clk;
		freq = clk_get_rate(clk);
		table[i].frequency = freq / 1000;
		table[i].driver_data = i;
	}
	freq_table_redup(table, count);
	freq_table_sort(table, count);
	table[i].frequency = CPUFREQ_TABLE_END;

	/* set the min and max frequency properly */
	ret = cpufreq_table_validate_and_show(policy, table);
	if (ret) {
		pr_err("invalid frequency table: %d\n", ret);
		goto err_nomem1;
	}

	data->table = table;

	/* update ->cpus if we have cluster, no harm if not */
	set_affected_cpus(policy);
	policy->driver_data = data;

	/* Minimum transition latency is 12 platform clocks */
	u64temp = 12ULL * NSEC_PER_SEC;
	do_div(u64temp, get_bus_freq());
	policy->cpuinfo.transition_latency = u64temp + 1;

	of_node_put(np);

	return 0;

err_nomem1:
	kfree(table);
err_pclk:
	kfree(data->pclk);
err_nomem2:
	kfree(data);
err_np:
	of_node_put(np);

	return -ENODEV;
}

static int qoriq_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{
	struct cpu_data *data = policy->driver_data;

	cpufreq_cooling_unregister(data->cdev);
	kfree(data->pclk);
	kfree(data->table);
	kfree(data);
	policy->driver_data = NULL;

	return 0;
}

static int qoriq_cpufreq_target(struct cpufreq_policy *policy,
		unsigned int index)
{
	struct clk *parent;
	struct cpu_data *data = policy->driver_data;

	parent = data->pclk[data->table[index].driver_data];
	return clk_set_parent(policy->clk, parent);
}


static void qoriq_cpufreq_ready(struct cpufreq_policy *policy)
{
	struct cpu_data *cpud = policy->driver_data;
	struct device_node *np = of_get_cpu_node(policy->cpu, NULL);

	if (of_find_property(np, "#cooling-cells", NULL)) {
		cpud->cdev = of_cpufreq_cooling_register(np,
							 policy->related_cpus);

		if (IS_ERR(cpud->cdev) && PTR_ERR(cpud->cdev) != -ENOSYS) {
			pr_err("cpu%d is not running as cooling device: %ld\n",
					policy->cpu, PTR_ERR(cpud->cdev));

			cpud->cdev = NULL;
		}
	}

	of_node_put(np);
}

static struct cpufreq_driver qoriq_cpufreq_driver = {
	.name		= "qoriq_cpufreq",
	.flags		= CPUFREQ_CONST_LOOPS,
	.init		= qoriq_cpufreq_cpu_init,
	.exit		= qoriq_cpufreq_cpu_exit,
	.verify		= cpufreq_generic_frequency_table_verify,
	.target_index	= qoriq_cpufreq_target,
	.get		= cpufreq_generic_get,
	.ready		= qoriq_cpufreq_ready,
	.attr		= cpufreq_generic_attr,
};

static const struct soc_data blacklist = {
	.flags = SOC_BLACKLIST,
};

static const struct of_device_id node_matches[] __initconst = {
	/* e6500 cannot use cpufreq due to erratum A-008083 */
	{ .compatible = "fsl,b4420-clockgen", &blacklist },
	{ .compatible = "fsl,b4860-clockgen", &blacklist },
	{ .compatible = "fsl,t2080-clockgen", &blacklist },
	{ .compatible = "fsl,t4240-clockgen", &blacklist },

	{ .compatible = "fsl,ls1012a-clockgen", },
	{ .compatible = "fsl,ls1021a-clockgen", },
	{ .compatible = "fsl,ls1043a-clockgen", },
	{ .compatible = "fsl,ls1046a-clockgen", },
	{ .compatible = "fsl,ls1088a-clockgen", },
	{ .compatible = "fsl,ls2080a-clockgen", },
	{ .compatible = "fsl,p4080-clockgen", },
	{ .compatible = "fsl,qoriq-clockgen-1.0", },
	{ .compatible = "fsl,qoriq-clockgen-2.0", },
	{}
};

static int __init qoriq_cpufreq_init(void)
{
	int ret;
	struct device_node  *np;
	const struct of_device_id *match;
	const struct soc_data *data;

	np = of_find_matching_node(NULL, node_matches);
	if (!np)
		return -ENODEV;

	match = of_match_node(node_matches, np);
	data = match->data;

	of_node_put(np);

	if (data && data->flags & SOC_BLACKLIST)
		return -ENODEV;

	ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
	if (!ret)
		pr_info("Freescale QorIQ CPU frequency scaling driver\n");

	return ret;
}
module_init(qoriq_cpufreq_init);

static void __exit qoriq_cpufreq_exit(void)
{
	cpufreq_unregister_driver(&qoriq_cpufreq_driver);
}
module_exit(qoriq_cpufreq_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
MODULE_DESCRIPTION("cpufreq driver for Freescale QorIQ series SoCs");
Commit	Line	Data
defa4c73 TY	1	/*
	2	* Copyright 2013 Freescale Semiconductor, Inc.
	3	*
a4f20742	4	* CPU Frequency Scaling driver for Freescale QorIQ SoCs.
defa4c73 TY	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	12
	13	#include <linux/clk.h>
b1e9a649	14	#include <linux/clk-provider.h>
defa4c73	15	#include <linux/cpufreq.h>
8ae1702a	16	#include <linux/cpu_cooling.h>
defa4c73	17	#include <linux/errno.h>
defa4c73 TY	18	#include <linux/init.h>
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/mutex.h>
	22	#include <linux/of.h>
	23	#include <linux/slab.h>
	24	#include <linux/smp.h>
	25
	26	/**
a4f20742	27	* struct cpu_data
8a95c144	28	* @pclk: the parent clock of cpu
defa4c73 TY	29	* @table: frequency table
	30	*/
	31	struct cpu_data {
8a95c144	32	struct clk **pclk;
defa4c73	33	struct cpufreq_frequency_table *table;
8ae1702a	34	struct thermal_cooling_device *cdev;
defa4c73 TY	35	};
defa4c73 TY	36
b1e9a649 TY	37	/*
	38	* Don't use cpufreq on this SoC -- used when the SoC would have otherwise
	39	* matched a more generic compatible.
	40	*/
	41	#define SOC_BLACKLIST 1
	42
defa4c73 TY	43	/**
defa4c73 TY	44	* struct soc_data - SoC specific data
b1e9a649	45	* @flags: SOC_xxx
defa4c73 TY	46	*/
defa4c73 TY	47	struct soc_data {
b1e9a649	48	u32 flags;
defa4c73 TY	49	};
defa4c73 TY	50
a4f20742 TY	51	static u32 get_bus_freq(void)
	52	{
	53	struct device_node *soc;
	54	u32 sysfreq;
	55
	56	soc = of_find_node_by_type(NULL, "soc");
	57	if (!soc)
	58	return 0;
	59
	60	if (of_property_read_u32(soc, "bus-frequency", &sysfreq))
	61	sysfreq = 0;
	62
	63	of_node_put(soc);
defa4c73	64
a4f20742 TY	65	return sysfreq;
a4f20742 TY	66	}
defa4c73	67
b1e9a649	68	static struct clk *cpu_to_clk(int cpu)
defa4c73	69	{
b1e9a649 TY	70	struct device_node *np;
b1e9a649 TY	71	struct clk *clk;
a4f20742 TY	72
	73	if (!cpu_present(cpu))
	74	return NULL;
	75
	76	np = of_get_cpu_node(cpu, NULL);
	77	if (!np)
	78	return NULL;
	79
b1e9a649	80	clk = of_clk_get(np, 0);
a4f20742	81	of_node_put(np);
b1e9a649	82	return clk;
a4f20742 TY	83	}
	84
	85	/* traverse cpu nodes to get cpu mask of sharing clock wire */
	86	static void set_affected_cpus(struct cpufreq_policy *policy)
	87	{
a4f20742	88	struct cpumask *dstp = policy->cpus;
b1e9a649	89	struct clk *clk;
a4f20742 TY	90	int i;
a4f20742 TY	91
a4f20742	92	for_each_present_cpu(i) {
b1e9a649 TY	93	clk = cpu_to_clk(i);
	94	if (IS_ERR(clk)) {
	95	pr_err("%s: no clock for cpu %d\n", __func__, i);
a4f20742	96	continue;
b1e9a649	97	}
a4f20742	98
b1e9a649	99	if (clk_is_match(policy->clk, clk))
a4f20742	100	cpumask_set_cpu(i, dstp);
a4f20742	101	}
defa4c73	102	}
defa4c73	103
defa4c73 TY	104	/* reduce the duplicated frequencies in frequency table */
	105	static void freq_table_redup(struct cpufreq_frequency_table *freq_table,
	106	int count)
	107	{
	108	int i, j;
	109
	110	for (i = 1; i < count; i++) {
	111	for (j = 0; j < i; j++) {
	112	if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID \|\|
	113	freq_table[j].frequency !=
	114	freq_table[i].frequency)
	115	continue;
	116
	117	freq_table[i].frequency = CPUFREQ_ENTRY_INVALID;
	118	break;
	119	}
	120	}
	121	}
	122
	123	/* sort the frequencies in frequency table in descenting order */
	124	static void freq_table_sort(struct cpufreq_frequency_table *freq_table,
	125	int count)
	126	{
	127	int i, j, ind;
	128	unsigned int freq, max_freq;
	129	struct cpufreq_frequency_table table;
a4f20742	130
defa4c73 TY	131	for (i = 0; i < count - 1; i++) {
	132	max_freq = freq_table[i].frequency;
	133	ind = i;
	134	for (j = i + 1; j < count; j++) {
	135	freq = freq_table[j].frequency;
	136	if (freq == CPUFREQ_ENTRY_INVALID \|\|
	137	freq <= max_freq)
	138	continue;
	139	ind = j;
	140	max_freq = freq;
	141	}
	142
	143	if (ind != i) {
	144	/* exchange the frequencies */
	145	table.driver_data = freq_table[i].driver_data;
	146	table.frequency = freq_table[i].frequency;
	147	freq_table[i].driver_data = freq_table[ind].driver_data;
	148	freq_table[i].frequency = freq_table[ind].frequency;
	149	freq_table[ind].driver_data = table.driver_data;
	150	freq_table[ind].frequency = table.frequency;
	151	}
	152	}
	153	}
	154
a4f20742	155	static int qoriq_cpufreq_cpu_init(struct cpufreq_policy *policy)
defa4c73	156	{
b1e9a649	157	struct device_node *np;
defa4c73	158	int i, count, ret;
b1e9a649	159	u32 freq;
defa4c73	160	struct clk *clk;
b1e9a649	161	const struct clk_hw *hwclk;
defa4c73 TY	162	struct cpufreq_frequency_table *table;
	163	struct cpu_data *data;
	164	unsigned int cpu = policy->cpu;
906fe033	165	u64 u64temp;
defa4c73 TY	166
	167	np = of_get_cpu_node(cpu, NULL);
	168	if (!np)
	169	return -ENODEV;
	170
	171	data = kzalloc(sizeof(*data), GFP_KERNEL);
a4f20742	172	if (!data)
defa4c73	173	goto err_np;
defa4c73	174
652ed95d VK	175	policy->clk = of_clk_get(np, 0);
652ed95d VK	176	if (IS_ERR(policy->clk)) {
defa4c73 TY	177	pr_err("%s: no clock information\n", __func__);
	178	goto err_nomem2;
	179	}
	180
b1e9a649 TY	181	hwclk = __clk_get_hw(policy->clk);
b1e9a649 TY	182	count = clk_hw_get_num_parents(hwclk);
defa4c73	183
8a95c144 TY	184	data->pclk = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
	185	if (!data->pclk) {
	186	pr_err("%s: no memory\n", __func__);
b1e9a649	187	goto err_nomem2;
8a95c144 TY	188	}
8a95c144 TY	189
defa4c73 TY	190	table = kcalloc(count + 1, sizeof(*table), GFP_KERNEL);
	191	if (!table) {
	192	pr_err("%s: no memory\n", __func__);
8a95c144	193	goto err_pclk;
defa4c73 TY	194	}
defa4c73 TY	195
defa4c73	196	for (i = 0; i < count; i++) {
b1e9a649	197	clk = clk_hw_get_parent_by_index(hwclk, i)->clk;
8a95c144	198	data->pclk[i] = clk;
defa4c73	199	freq = clk_get_rate(clk);
b1e9a649	200	table[i].frequency = freq / 1000;
defa4c73 TY	201	table[i].driver_data = i;
	202	}
	203	freq_table_redup(table, count);
	204	freq_table_sort(table, count);
	205	table[i].frequency = CPUFREQ_TABLE_END;
	206
	207	/* set the min and max frequency properly */
6b4147db	208	ret = cpufreq_table_validate_and_show(policy, table);
defa4c73 TY	209	if (ret) {
	210	pr_err("invalid frequency table: %d\n", ret);
	211	goto err_nomem1;
	212	}
	213
	214	data->table = table;
defa4c73 TY	215
defa4c73 TY	216	/* update ->cpus if we have cluster, no harm if not */
a4f20742 TY	217	set_affected_cpus(policy);
a4f20742 TY	218	policy->driver_data = data;
defa4c73	219
906fe033 ES	220	/* Minimum transition latency is 12 platform clocks */
906fe033 ES	221	u64temp = 12ULL * NSEC_PER_SEC;
a4f20742	222	do_div(u64temp, get_bus_freq());
906fe033	223	policy->cpuinfo.transition_latency = u64temp + 1;
6712d293	224
defa4c73 TY	225	of_node_put(np);
	226
	227	return 0;
	228
	229	err_nomem1:
	230	kfree(table);
8a95c144 TY	231	err_pclk:
8a95c144 TY	232	kfree(data->pclk);
defa4c73	233	err_nomem2:
defa4c73 TY	234	kfree(data);
	235	err_np:
	236	of_node_put(np);
	237
	238	return -ENODEV;
	239	}
	240
495c716f	241	static int qoriq_cpufreq_cpu_exit(struct cpufreq_policy *policy)
defa4c73	242	{
a4f20742	243	struct cpu_data *data = policy->driver_data;
defa4c73	244
394cb831	245	cpufreq_cooling_unregister(data->cdev);
8a95c144	246	kfree(data->pclk);
defa4c73 TY	247	kfree(data->table);
defa4c73 TY	248	kfree(data);
a4f20742	249	policy->driver_data = NULL;
defa4c73 TY	250
	251	return 0;
	252	}
	253
a4f20742	254	static int qoriq_cpufreq_target(struct cpufreq_policy *policy,
9c0ebcf7	255	unsigned int index)
defa4c73	256	{
defa4c73	257	struct clk *parent;
a4f20742	258	struct cpu_data *data = policy->driver_data;
defa4c73	259
8a95c144	260	parent = data->pclk[data->table[index].driver_data];
652ed95d	261	return clk_set_parent(policy->clk, parent);
defa4c73 TY	262	}
defa4c73 TY	263
8ae1702a HJ	264
	265	static void qoriq_cpufreq_ready(struct cpufreq_policy *policy)
	266	{
	267	struct cpu_data *cpud = policy->driver_data;
	268	struct device_node *np = of_get_cpu_node(policy->cpu, NULL);
	269
	270	if (of_find_property(np, "#cooling-cells", NULL)) {
	271	cpud->cdev = of_cpufreq_cooling_register(np,
	272	policy->related_cpus);
	273
27b8fe8d JH	274	if (IS_ERR(cpud->cdev) && PTR_ERR(cpud->cdev) != -ENOSYS) {
27b8fe8d JH	275	pr_err("cpu%d is not running as cooling device: %ld\n",
8ae1702a HJ	276	policy->cpu, PTR_ERR(cpud->cdev));
	277
	278	cpud->cdev = NULL;
	279	}
	280	}
	281
	282	of_node_put(np);
	283	}
	284
a4f20742 TY	285	static struct cpufreq_driver qoriq_cpufreq_driver = {
a4f20742 TY	286	.name = "qoriq_cpufreq",
defa4c73	287	.flags = CPUFREQ_CONST_LOOPS,
a4f20742	288	.init = qoriq_cpufreq_cpu_init,
495c716f	289	.exit = qoriq_cpufreq_cpu_exit,
dc2398d7	290	.verify = cpufreq_generic_frequency_table_verify,
a4f20742	291	.target_index = qoriq_cpufreq_target,
652ed95d	292	.get = cpufreq_generic_get,
8ae1702a	293	.ready = qoriq_cpufreq_ready,
dc2398d7	294	.attr = cpufreq_generic_attr,
defa4c73 TY	295	};
defa4c73 TY	296
b1e9a649 TY	297	static const struct soc_data blacklist = {
	298	.flags = SOC_BLACKLIST,
	299	};
	300
a4f20742	301	static const struct of_device_id node_matches[] __initconst = {
b1e9a649 TY	302	/* e6500 cannot use cpufreq due to erratum A-008083 */
	303	{ .compatible = "fsl,b4420-clockgen", &blacklist },
	304	{ .compatible = "fsl,b4860-clockgen", &blacklist },
	305	{ .compatible = "fsl,t2080-clockgen", &blacklist },
	306	{ .compatible = "fsl,t4240-clockgen", &blacklist },
	307
	308	{ .compatible = "fsl,ls1012a-clockgen", },
	309	{ .compatible = "fsl,ls1021a-clockgen", },
	310	{ .compatible = "fsl,ls1043a-clockgen", },
	311	{ .compatible = "fsl,ls1046a-clockgen", },
	312	{ .compatible = "fsl,ls1088a-clockgen", },
	313	{ .compatible = "fsl,ls2080a-clockgen", },
	314	{ .compatible = "fsl,p4080-clockgen", },
	315	{ .compatible = "fsl,qoriq-clockgen-1.0", },
defa4c73 TY	316	{ .compatible = "fsl,qoriq-clockgen-2.0", },
	317	{}
	318	};
	319
a4f20742	320	static int __init qoriq_cpufreq_init(void)
defa4c73 TY	321	{
	322	int ret;
	323	struct device_node *np;
	324	const struct of_device_id *match;
	325	const struct soc_data *data;
defa4c73 TY	326
	327	np = of_find_matching_node(NULL, node_matches);
	328	if (!np)
	329	return -ENODEV;
	330
defa4c73 TY	331	match = of_match_node(node_matches, np);
defa4c73 TY	332	data = match->data;
defa4c73 TY	333
	334	of_node_put(np);
	335
b1e9a649 TY	336	if (data && data->flags & SOC_BLACKLIST)
	337	return -ENODEV;
	338
a4f20742	339	ret = cpufreq_register_driver(&qoriq_cpufreq_driver);
defa4c73	340	if (!ret)
a4f20742	341	pr_info("Freescale QorIQ CPU frequency scaling driver\n");
defa4c73 TY	342
defa4c73 TY	343	return ret;
defa4c73	344	}
a4f20742	345	module_init(qoriq_cpufreq_init);
defa4c73	346
a4f20742	347	static void __exit qoriq_cpufreq_exit(void)
defa4c73	348	{
a4f20742	349	cpufreq_unregister_driver(&qoriq_cpufreq_driver);
defa4c73	350	}
a4f20742	351	module_exit(qoriq_cpufreq_exit);
defa4c73 TY	352
	353	MODULE_LICENSE("GPL");
	354	MODULE_AUTHOR("Tang Yuantian <Yuantian.Tang@freescale.com>");
a4f20742	355	MODULE_DESCRIPTION("cpufreq driver for Freescale QorIQ series SoCs");