[mirror_ubuntu-hirsute-kernel.git] / drivers / cpufreq / sc520_freq.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *	sc520_freq.c: cpufreq driver for the AMD Elan sc520
 *
 *	Copyright (C) 2005 Sean Young <sean@mess.org>
 *
 *	Based on elanfreq.c
 *
 *	2005-03-30: - initial revision
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>

#include <linux/delay.h>
#include <linux/cpufreq.h>
#include <linux/timex.h>
#include <linux/io.h>

#include <asm/cpu_device_id.h>
#include <asm/msr.h>

#define MMCR_BASE	0xfffef000	/* The default base address */
#define OFFS_CPUCTL	0x2   /* CPU Control Register */

static __u8 __iomem *cpuctl;

static struct cpufreq_frequency_table sc520_freq_table[] = {
	{0, 0x01,	100000},
	{0, 0x02,	133000},
	{0, 0,	CPUFREQ_TABLE_END},
};

static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
{
	u8 clockspeed_reg = *cpuctl;

	switch (clockspeed_reg & 0x03) {
	default:
		pr_err("error: cpuctl register has unexpected value %02x\n",
		       clockspeed_reg);
	case 0x01:
		return 100000;
	case 0x02:
		return 133000;
	}
}

static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
{

	u8 clockspeed_reg;

	local_irq_disable();

	clockspeed_reg = *cpuctl & ~0x03;
	*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;

	local_irq_enable();

	return 0;
}

/*
 *	Module init and exit code
 */

static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
{
	struct cpuinfo_x86 *c = &cpu_data(0);

	/* capability check */
	if (c->x86_vendor != X86_VENDOR_AMD ||
	    c->x86 != 4 || c->x86_model != 9)
		return -ENODEV;

	/* cpuinfo and default policy values */
	policy->cpuinfo.transition_latency = 1000000; /* 1ms */
	policy->freq_table = sc520_freq_table;

	return 0;
}


static struct cpufreq_driver sc520_freq_driver = {
	.get	= sc520_freq_get_cpu_frequency,
	.verify	= cpufreq_generic_frequency_table_verify,
	.target_index = sc520_freq_target,
	.init	= sc520_freq_cpu_init,
	.name	= "sc520_freq",
	.attr	= cpufreq_generic_attr,
};

static const struct x86_cpu_id sc520_ids[] = {
	X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 9, NULL),
	{}
};
MODULE_DEVICE_TABLE(x86cpu, sc520_ids);

static int __init sc520_freq_init(void)
{
	int err;

	if (!x86_match_cpu(sc520_ids))
		return -ENODEV;

	cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
	if (!cpuctl) {
		pr_err("sc520_freq: error: failed to remap memory\n");
		return -ENOMEM;
	}

	err = cpufreq_register_driver(&sc520_freq_driver);
	if (err)
		iounmap(cpuctl);

	return err;
}


static void __exit sc520_freq_exit(void)
{
	cpufreq_unregister_driver(&sc520_freq_driver);
	iounmap(cpuctl);
}


MODULE_LICENSE("GPL");
MODULE_AUTHOR("Sean Young <sean@mess.org>");
MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");

module_init(sc520_freq_init);
module_exit(sc520_freq_exit);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
bf6fc9fd DJ	2	/*
	3	* sc520_freq.c: cpufreq driver for the AMD Elan sc520
	4	*
	5	* Copyright (C) 2005 Sean Young <sean@mess.org>
	6	*
bf6fc9fd DJ	7	* Based on elanfreq.c
	8	*
	9	* 2005-03-30: - initial revision
	10	*/
	11
1c5864e2 JP	12	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1c5864e2 JP	13
bf6fc9fd DJ	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/init.h>
	17
	18	#include <linux/delay.h>
	19	#include <linux/cpufreq.h>
6072ace4 DJ	20	#include <linux/timex.h>
6072ace4 DJ	21	#include <linux/io.h>
bf6fc9fd	22
fa8031ae	23	#include <asm/cpu_device_id.h>
bf6fc9fd	24	#include <asm/msr.h>
bf6fc9fd DJ	25
	26	#define MMCR_BASE 0xfffef000 /* The default base address */
	27	#define OFFS_CPUCTL 0x2 /* CPU Control Register */
	28
	29	static __u8 __iomem *cpuctl;
	30
bf6fc9fd	31	static struct cpufreq_frequency_table sc520_freq_table[] = {
7f4b0461 VK	32	{0, 0x01, 100000},
	33	{0, 0x02, 133000},
	34	{0, 0, CPUFREQ_TABLE_END},
bf6fc9fd DJ	35	};
	36
	37	static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
	38	{
	39	u8 clockspeed_reg = *cpuctl;
	40
	41	switch (clockspeed_reg & 0x03) {
	42	default:
1c5864e2	43	pr_err("error: cpuctl register has unexpected value %02x\n",
b49c22a6	44	clockspeed_reg);
bf6fc9fd DJ	45	case 0x01:
	46	return 100000;
	47	case 0x02:
	48	return 133000;
	49	}
	50	}
	51
9c0ebcf7	52	static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
bf6fc9fd DJ	53	{
bf6fc9fd DJ	54
bf6fc9fd DJ	55	u8 clockspeed_reg;
bf6fc9fd DJ	56
bf6fc9fd DJ	57	local_irq_disable();
	58
	59	clockspeed_reg = *cpuctl & ~0x03;
50701588	60	*cpuctl = clockspeed_reg \| sc520_freq_table[state].driver_data;
bf6fc9fd DJ	61
	62	local_irq_enable();
	63
bf6fc9fd DJ	64	return 0;
	65	}
	66
bf6fc9fd DJ	67	/*
	68	* Module init and exit code
	69	*/
	70
	71	static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
	72	{
92cb7612	73	struct cpuinfo_x86 *c = &cpu_data(0);
bf6fc9fd DJ	74
	75	/* capability check */
	76	if (c->x86_vendor != X86_VENDOR_AMD \|\|
	77	c->x86 != 4 \|\| c->x86_model != 9)
	78	return -ENODEV;
	79
	80	/* cpuinfo and default policy values */
bf6fc9fd	81	policy->cpuinfo.transition_latency = 1000000; /* 1ms */
f35750c8	82	policy->freq_table = sc520_freq_table;
bf6fc9fd	83
f35750c8	84	return 0;
bf6fc9fd DJ	85	}
	86
	87
221dee28	88	static struct cpufreq_driver sc520_freq_driver = {
bf6fc9fd	89	.get = sc520_freq_get_cpu_frequency,
a823c4ae	90	.verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7	91	.target_index = sc520_freq_target,
bf6fc9fd	92	.init = sc520_freq_cpu_init,
bf6fc9fd	93	.name = "sc520_freq",
a823c4ae	94	.attr = cpufreq_generic_attr,
bf6fc9fd DJ	95	};
bf6fc9fd DJ	96
fa8031ae	97	static const struct x86_cpu_id sc520_ids[] = {
b11d77fa	98	X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 9, NULL),
fa8031ae AK	99	{}
	100	};
	101	MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
bf6fc9fd DJ	102
	103	static int __init sc520_freq_init(void)
	104	{
3e74341c	105	int err;
bf6fc9fd	106
fa8031ae	107	if (!x86_match_cpu(sc520_ids))
bf6fc9fd	108	return -ENODEV;
fa8031ae	109
bf6fc9fd	110	cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
6072ace4	111	if (!cpuctl) {
b49c22a6	112	pr_err("sc520_freq: error: failed to remap memory\n");
bf6fc9fd DJ	113	return -ENOMEM;
	114	}
	115
3e74341c AL	116	err = cpufreq_register_driver(&sc520_freq_driver);
	117	if (err)
	118	iounmap(cpuctl);
	119
	120	return err;
bf6fc9fd DJ	121	}
	122
	123
	124	static void __exit sc520_freq_exit(void)
	125	{
	126	cpufreq_unregister_driver(&sc520_freq_driver);
	127	iounmap(cpuctl);
	128	}
	129
	130
	131	MODULE_LICENSE("GPL");
	132	MODULE_AUTHOR("Sean Young <sean@mess.org>");
	133	MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
	134
	135	module_init(sc520_freq_init);
	136	module_exit(sc520_freq_exit);
	137