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42099322 DS |
1 | /* |
2 | * drivers/cpufreq/spear-cpufreq.c | |
3 | * | |
4 | * CPU Frequency Scaling for SPEAr platform | |
5 | * | |
6 | * Copyright (C) 2012 ST Microelectronics | |
7 | * Deepak Sikri <deepak.sikri@st.com> | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/clk.h> | |
17 | #include <linux/cpufreq.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/module.h> | |
c0e46948 | 21 | #include <linux/of_device.h> |
42099322 DS |
22 | #include <linux/slab.h> |
23 | #include <linux/types.h> | |
24 | ||
25 | /* SPEAr CPUFreq driver data structure */ | |
26 | static struct { | |
27 | struct clk *clk; | |
28 | unsigned int transition_latency; | |
29 | struct cpufreq_frequency_table *freq_tbl; | |
30 | u32 cnt; | |
31 | } spear_cpufreq; | |
32 | ||
42099322 DS |
33 | static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq) |
34 | { | |
35 | struct clk *sys_pclk; | |
36 | int pclk; | |
37 | /* | |
38 | * In SPEAr1340, cpu clk's parent sys clk can take input from | |
39 | * following sources | |
40 | */ | |
41 | const char *sys_clk_src[] = { | |
42 | "sys_syn_clk", | |
43 | "pll1_clk", | |
44 | "pll2_clk", | |
45 | "pll3_clk", | |
46 | }; | |
47 | ||
48 | /* | |
49 | * As sys clk can have multiple source with their own range | |
50 | * limitation so we choose possible sources accordingly | |
51 | */ | |
52 | if (newfreq <= 300000000) | |
53 | pclk = 0; /* src is sys_syn_clk */ | |
54 | else if (newfreq > 300000000 && newfreq <= 500000000) | |
55 | pclk = 3; /* src is pll3_clk */ | |
56 | else if (newfreq == 600000000) | |
57 | pclk = 1; /* src is pll1_clk */ | |
58 | else | |
59 | return ERR_PTR(-EINVAL); | |
60 | ||
61 | /* Get parent to sys clock */ | |
62 | sys_pclk = clk_get(NULL, sys_clk_src[pclk]); | |
63 | if (IS_ERR(sys_pclk)) | |
64 | pr_err("Failed to get %s clock\n", sys_clk_src[pclk]); | |
65 | ||
66 | return sys_pclk; | |
67 | } | |
68 | ||
69 | /* | |
70 | * In SPEAr1340, we cannot use newfreq directly because we need to actually | |
71 | * access a source clock (clk) which might not be ancestor of cpu at present. | |
72 | * Hence in SPEAr1340 we would operate on source clock directly before switching | |
73 | * cpu clock to it. | |
74 | */ | |
75 | static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq) | |
76 | { | |
77 | struct clk *sys_clk; | |
78 | int ret = 0; | |
79 | ||
80 | sys_clk = clk_get_parent(spear_cpufreq.clk); | |
81 | if (IS_ERR(sys_clk)) { | |
82 | pr_err("failed to get cpu's parent (sys) clock\n"); | |
83 | return PTR_ERR(sys_clk); | |
84 | } | |
85 | ||
86 | /* Set the rate of the source clock before changing the parent */ | |
87 | ret = clk_set_rate(sys_pclk, newfreq); | |
88 | if (ret) { | |
89 | pr_err("Failed to set sys clk rate to %lu\n", newfreq); | |
90 | return ret; | |
91 | } | |
92 | ||
93 | ret = clk_set_parent(sys_clk, sys_pclk); | |
94 | if (ret) { | |
95 | pr_err("Failed to set sys clk parent\n"); | |
96 | return ret; | |
97 | } | |
98 | ||
99 | return 0; | |
100 | } | |
101 | ||
102 | static int spear_cpufreq_target(struct cpufreq_policy *policy, | |
9c0ebcf7 | 103 | unsigned int index) |
42099322 | 104 | { |
bb25f13a | 105 | long newfreq; |
42099322 | 106 | struct clk *srcclk; |
9c0ebcf7 | 107 | int ret, mult = 1; |
42099322 | 108 | |
42099322 | 109 | newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000; |
9c0ebcf7 | 110 | |
42099322 DS |
111 | if (of_machine_is_compatible("st,spear1340")) { |
112 | /* | |
113 | * SPEAr1340 is special in the sense that due to the possibility | |
114 | * of multiple clock sources for cpu clk's parent we can have | |
115 | * different clock source for different frequency of cpu clk. | |
116 | * Hence we need to choose one from amongst these possible clock | |
117 | * sources. | |
118 | */ | |
119 | srcclk = spear1340_cpu_get_possible_parent(newfreq); | |
120 | if (IS_ERR(srcclk)) { | |
121 | pr_err("Failed to get src clk\n"); | |
122 | return PTR_ERR(srcclk); | |
123 | } | |
124 | ||
125 | /* SPEAr1340: src clk is always 2 * intended cpu clk */ | |
126 | mult = 2; | |
127 | } else { | |
128 | /* | |
129 | * src clock to be altered is ancestor of cpu clock. Hence we | |
130 | * can directly work on cpu clk | |
131 | */ | |
132 | srcclk = spear_cpufreq.clk; | |
133 | } | |
134 | ||
135 | newfreq = clk_round_rate(srcclk, newfreq * mult); | |
189c9b8d | 136 | if (newfreq <= 0) { |
42099322 DS |
137 | pr_err("clk_round_rate failed for cpu src clock\n"); |
138 | return newfreq; | |
139 | } | |
140 | ||
42099322 DS |
141 | if (mult == 2) |
142 | ret = spear1340_set_cpu_rate(srcclk, newfreq); | |
143 | else | |
144 | ret = clk_set_rate(spear_cpufreq.clk, newfreq); | |
145 | ||
d4019f0a | 146 | if (ret) |
42099322 | 147 | pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret); |
42099322 | 148 | |
42099322 DS |
149 | return ret; |
150 | } | |
151 | ||
152 | static int spear_cpufreq_init(struct cpufreq_policy *policy) | |
153 | { | |
652ed95d | 154 | policy->clk = spear_cpufreq.clk; |
7a936bd0 VK |
155 | return cpufreq_generic_init(policy, spear_cpufreq.freq_tbl, |
156 | spear_cpufreq.transition_latency); | |
42099322 DS |
157 | } |
158 | ||
42099322 DS |
159 | static struct cpufreq_driver spear_cpufreq_driver = { |
160 | .name = "cpufreq-spear", | |
ae6b4271 | 161 | .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, |
e2132fa6 | 162 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 163 | .target_index = spear_cpufreq_target, |
652ed95d | 164 | .get = cpufreq_generic_get, |
42099322 | 165 | .init = spear_cpufreq_init, |
e2132fa6 | 166 | .attr = cpufreq_generic_attr, |
42099322 DS |
167 | }; |
168 | ||
169 | static int spear_cpufreq_driver_init(void) | |
170 | { | |
171 | struct device_node *np; | |
172 | const struct property *prop; | |
173 | struct cpufreq_frequency_table *freq_tbl; | |
174 | const __be32 *val; | |
175 | int cnt, i, ret; | |
176 | ||
c0e46948 | 177 | np = of_cpu_device_node_get(0); |
42099322 DS |
178 | if (!np) { |
179 | pr_err("No cpu node found"); | |
180 | return -ENODEV; | |
181 | } | |
182 | ||
183 | if (of_property_read_u32(np, "clock-latency", | |
184 | &spear_cpufreq.transition_latency)) | |
185 | spear_cpufreq.transition_latency = CPUFREQ_ETERNAL; | |
186 | ||
187 | prop = of_find_property(np, "cpufreq_tbl", NULL); | |
188 | if (!prop || !prop->value) { | |
189 | pr_err("Invalid cpufreq_tbl"); | |
190 | ret = -ENODEV; | |
191 | goto out_put_node; | |
192 | } | |
193 | ||
194 | cnt = prop->length / sizeof(u32); | |
195 | val = prop->value; | |
196 | ||
197 | freq_tbl = kmalloc(sizeof(*freq_tbl) * (cnt + 1), GFP_KERNEL); | |
198 | if (!freq_tbl) { | |
199 | ret = -ENOMEM; | |
200 | goto out_put_node; | |
201 | } | |
202 | ||
203 | for (i = 0; i < cnt; i++) { | |
50701588 | 204 | freq_tbl[i].driver_data = i; |
42099322 DS |
205 | freq_tbl[i].frequency = be32_to_cpup(val++); |
206 | } | |
207 | ||
50701588 | 208 | freq_tbl[i].driver_data = i; |
42099322 DS |
209 | freq_tbl[i].frequency = CPUFREQ_TABLE_END; |
210 | ||
211 | spear_cpufreq.freq_tbl = freq_tbl; | |
212 | ||
213 | of_node_put(np); | |
214 | ||
215 | spear_cpufreq.clk = clk_get(NULL, "cpu_clk"); | |
216 | if (IS_ERR(spear_cpufreq.clk)) { | |
217 | pr_err("Unable to get CPU clock\n"); | |
218 | ret = PTR_ERR(spear_cpufreq.clk); | |
219 | goto out_put_mem; | |
220 | } | |
221 | ||
222 | ret = cpufreq_register_driver(&spear_cpufreq_driver); | |
223 | if (!ret) | |
224 | return 0; | |
225 | ||
226 | pr_err("failed register driver: %d\n", ret); | |
227 | clk_put(spear_cpufreq.clk); | |
228 | ||
229 | out_put_mem: | |
230 | kfree(freq_tbl); | |
231 | return ret; | |
232 | ||
233 | out_put_node: | |
234 | of_node_put(np); | |
235 | return ret; | |
236 | } | |
237 | late_initcall(spear_cpufreq_driver_init); | |
238 | ||
239 | MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>"); | |
240 | MODULE_DESCRIPTION("SPEAr CPUFreq driver"); | |
241 | MODULE_LICENSE("GPL"); |