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Commit | Line | Data |
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b511431d JE |
1 | |
2 | menuconfig CRYPTO_HW | |
3 | bool "Hardware crypto devices" | |
4 | default y | |
06bfb7eb JE |
5 | ---help--- |
6 | Say Y here to get to see options for hardware crypto devices and | |
7 | processors. This option alone does not add any kernel code. | |
8 | ||
9 | If you say N, all options in this submenu will be skipped and disabled. | |
b511431d JE |
10 | |
11 | if CRYPTO_HW | |
1da177e4 LT |
12 | |
13 | config CRYPTO_DEV_PADLOCK | |
d158325e | 14 | tristate "Support for VIA PadLock ACE" |
2f817418 | 15 | depends on X86 && !UML |
1da177e4 LT |
16 | help |
17 | Some VIA processors come with an integrated crypto engine | |
18 | (so called VIA PadLock ACE, Advanced Cryptography Engine) | |
1191f0a4 ML |
19 | that provides instructions for very fast cryptographic |
20 | operations with supported algorithms. | |
1da177e4 LT |
21 | |
22 | The instructions are used only when the CPU supports them. | |
5644bda5 ML |
23 | Otherwise software encryption is used. |
24 | ||
1da177e4 | 25 | config CRYPTO_DEV_PADLOCK_AES |
1191f0a4 | 26 | tristate "PadLock driver for AES algorithm" |
1da177e4 | 27 | depends on CRYPTO_DEV_PADLOCK |
28ce728a | 28 | select CRYPTO_BLKCIPHER |
7dc748e4 | 29 | select CRYPTO_AES |
1da177e4 LT |
30 | help |
31 | Use VIA PadLock for AES algorithm. | |
32 | ||
1191f0a4 ML |
33 | Available in VIA C3 and newer CPUs. |
34 | ||
35 | If unsure say M. The compiled module will be | |
4737f097 | 36 | called padlock-aes. |
1191f0a4 | 37 | |
6c833275 ML |
38 | config CRYPTO_DEV_PADLOCK_SHA |
39 | tristate "PadLock driver for SHA1 and SHA256 algorithms" | |
40 | depends on CRYPTO_DEV_PADLOCK | |
bbbee467 | 41 | select CRYPTO_HASH |
6c833275 ML |
42 | select CRYPTO_SHA1 |
43 | select CRYPTO_SHA256 | |
6c833275 ML |
44 | help |
45 | Use VIA PadLock for SHA1/SHA256 algorithms. | |
46 | ||
47 | Available in VIA C7 and newer processors. | |
48 | ||
49 | If unsure say M. The compiled module will be | |
4737f097 | 50 | called padlock-sha. |
6c833275 | 51 | |
9fe757b0 JC |
52 | config CRYPTO_DEV_GEODE |
53 | tristate "Support for the Geode LX AES engine" | |
f6259dea | 54 | depends on X86_32 && PCI |
9fe757b0 JC |
55 | select CRYPTO_ALGAPI |
56 | select CRYPTO_BLKCIPHER | |
9fe757b0 JC |
57 | help |
58 | Say 'Y' here to use the AMD Geode LX processor on-board AES | |
3dde6ad8 | 59 | engine for the CryptoAPI AES algorithm. |
9fe757b0 JC |
60 | |
61 | To compile this driver as a module, choose M here: the module | |
62 | will be called geode-aes. | |
63 | ||
61d48c2c | 64 | config ZCRYPT |
a3358e3d | 65 | tristate "Support for s390 cryptographic adapters" |
61d48c2c | 66 | depends on S390 |
2f7c8bd6 | 67 | select HW_RANDOM |
61d48c2c | 68 | help |
a3358e3d HF |
69 | Select this option if you want to enable support for |
70 | s390 cryptographic adapters like: | |
61d48c2c | 71 | + PCI-X Cryptographic Coprocessor (PCIXCC) |
a3358e3d HF |
72 | + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) |
73 | + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) | |
74 | + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) | |
61d48c2c | 75 | |
00fab235 HF |
76 | config ZCRYPT_MULTIDEVNODES |
77 | bool "Support for multiple zcrypt device nodes" | |
78 | default y | |
79 | depends on S390 | |
80 | depends on ZCRYPT | |
81 | help | |
82 | With this option enabled the zcrypt device driver can | |
83 | provide multiple devices nodes in /dev. Each device | |
84 | node can get customized to limit access and narrow | |
85 | down the use of the available crypto hardware. | |
86 | ||
e80d4af0 HF |
87 | config PKEY |
88 | tristate "Kernel API for protected key handling" | |
89 | depends on S390 | |
90 | depends on ZCRYPT | |
91 | help | |
92 | With this option enabled the pkey kernel module provides an API | |
93 | for creation and handling of protected keys. Other parts of the | |
94 | kernel or userspace applications may use these functions. | |
95 | ||
96 | Select this option if you want to enable the kernel and userspace | |
97 | API for proteced key handling. | |
98 | ||
99 | Please note that creation of protected keys from secure keys | |
100 | requires to have at least one CEX card in coprocessor mode | |
101 | available at runtime. | |
61d48c2c | 102 | |
c4684f98 HF |
103 | config CRYPTO_PAES_S390 |
104 | tristate "PAES cipher algorithms" | |
105 | depends on S390 | |
106 | depends on ZCRYPT | |
107 | depends on PKEY | |
108 | select CRYPTO_ALGAPI | |
109 | select CRYPTO_BLKCIPHER | |
110 | help | |
111 | This is the s390 hardware accelerated implementation of the | |
112 | AES cipher algorithms for use with protected key. | |
113 | ||
114 | Select this option if you want to use the paes cipher | |
115 | for example to use protected key encrypted devices. | |
116 | ||
3f5615e0 JG |
117 | config CRYPTO_SHA1_S390 |
118 | tristate "SHA1 digest algorithm" | |
119 | depends on S390 | |
563f346d | 120 | select CRYPTO_HASH |
3f5615e0 JG |
121 | help |
122 | This is the s390 hardware accelerated implementation of the | |
123 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). | |
124 | ||
d393d9b8 JG |
125 | It is available as of z990. |
126 | ||
3f5615e0 JG |
127 | config CRYPTO_SHA256_S390 |
128 | tristate "SHA256 digest algorithm" | |
129 | depends on S390 | |
563f346d | 130 | select CRYPTO_HASH |
3f5615e0 JG |
131 | help |
132 | This is the s390 hardware accelerated implementation of the | |
133 | SHA256 secure hash standard (DFIPS 180-2). | |
134 | ||
d393d9b8 | 135 | It is available as of z9. |
3f5615e0 | 136 | |
291dc7c0 | 137 | config CRYPTO_SHA512_S390 |
4e2c6d7f | 138 | tristate "SHA384 and SHA512 digest algorithm" |
291dc7c0 | 139 | depends on S390 |
563f346d | 140 | select CRYPTO_HASH |
291dc7c0 JG |
141 | help |
142 | This is the s390 hardware accelerated implementation of the | |
143 | SHA512 secure hash standard. | |
144 | ||
d393d9b8 | 145 | It is available as of z10. |
291dc7c0 | 146 | |
3f5615e0 JG |
147 | config CRYPTO_DES_S390 |
148 | tristate "DES and Triple DES cipher algorithms" | |
149 | depends on S390 | |
150 | select CRYPTO_ALGAPI | |
151 | select CRYPTO_BLKCIPHER | |
63291d40 | 152 | select CRYPTO_DES |
3f5615e0 | 153 | help |
0200f3ec | 154 | This is the s390 hardware accelerated implementation of the |
3f5615e0 JG |
155 | DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). |
156 | ||
0200f3ec GS |
157 | As of z990 the ECB and CBC mode are hardware accelerated. |
158 | As of z196 the CTR mode is hardware accelerated. | |
159 | ||
3f5615e0 JG |
160 | config CRYPTO_AES_S390 |
161 | tristate "AES cipher algorithms" | |
162 | depends on S390 | |
163 | select CRYPTO_ALGAPI | |
164 | select CRYPTO_BLKCIPHER | |
165 | help | |
166 | This is the s390 hardware accelerated implementation of the | |
99d97222 GS |
167 | AES cipher algorithms (FIPS-197). |
168 | ||
169 | As of z9 the ECB and CBC modes are hardware accelerated | |
170 | for 128 bit keys. | |
171 | As of z10 the ECB and CBC modes are hardware accelerated | |
172 | for all AES key sizes. | |
0200f3ec GS |
173 | As of z196 the CTR mode is hardware accelerated for all AES |
174 | key sizes and XTS mode is hardware accelerated for 256 and | |
99d97222 | 175 | 512 bit keys. |
3f5615e0 JG |
176 | |
177 | config S390_PRNG | |
178 | tristate "Pseudo random number generator device driver" | |
179 | depends on S390 | |
180 | default "m" | |
181 | help | |
182 | Select this option if you want to use the s390 pseudo random number | |
183 | generator. The PRNG is part of the cryptographic processor functions | |
184 | and uses triple-DES to generate secure random numbers like the | |
d393d9b8 JG |
185 | ANSI X9.17 standard. User-space programs access the |
186 | pseudo-random-number device through the char device /dev/prandom. | |
187 | ||
188 | It is available as of z9. | |
3f5615e0 | 189 | |
df1309ce GS |
190 | config CRYPTO_GHASH_S390 |
191 | tristate "GHASH digest algorithm" | |
192 | depends on S390 | |
193 | select CRYPTO_HASH | |
194 | help | |
195 | This is the s390 hardware accelerated implementation of the | |
196 | GHASH message digest algorithm for GCM (Galois/Counter Mode). | |
197 | ||
198 | It is available as of z196. | |
199 | ||
f848dbd3 HB |
200 | config CRYPTO_CRC32_S390 |
201 | tristate "CRC-32 algorithms" | |
202 | depends on S390 | |
203 | select CRYPTO_HASH | |
204 | select CRC32 | |
205 | help | |
206 | Select this option if you want to use hardware accelerated | |
207 | implementations of CRC algorithms. With this option, you | |
208 | can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) | |
209 | and CRC-32C (Castagnoli). | |
210 | ||
211 | It is available with IBM z13 or later. | |
212 | ||
f63601fd | 213 | config CRYPTO_DEV_MARVELL_CESA |
27b43fd9 | 214 | tristate "Marvell's Cryptographic Engine driver" |
fe55dfdc | 215 | depends on PLAT_ORION || ARCH_MVEBU |
f63601fd BB |
216 | select CRYPTO_AES |
217 | select CRYPTO_DES | |
218 | select CRYPTO_BLKCIPHER | |
219 | select CRYPTO_HASH | |
220 | select SRAM | |
221 | help | |
222 | This driver allows you to utilize the Cryptographic Engines and | |
27b43fd9 BB |
223 | Security Accelerator (CESA) which can be found on MVEBU and ORION |
224 | platforms. | |
db509a45 | 225 | This driver supports CPU offload through DMA transfers. |
f63601fd | 226 | |
0a625fd2 DM |
227 | config CRYPTO_DEV_NIAGARA2 |
228 | tristate "Niagara2 Stream Processing Unit driver" | |
50e78161 | 229 | select CRYPTO_DES |
596103cf HX |
230 | select CRYPTO_BLKCIPHER |
231 | select CRYPTO_HASH | |
8054b800 LC |
232 | select CRYPTO_MD5 |
233 | select CRYPTO_SHA1 | |
234 | select CRYPTO_SHA256 | |
0a625fd2 DM |
235 | depends on SPARC64 |
236 | help | |
237 | Each core of a Niagara2 processor contains a Stream | |
238 | Processing Unit, which itself contains several cryptographic | |
239 | sub-units. One set provides the Modular Arithmetic Unit, | |
240 | used for SSL offload. The other set provides the Cipher | |
241 | Group, which can perform encryption, decryption, hashing, | |
242 | checksumming, and raw copies. | |
243 | ||
f7d0561e EP |
244 | config CRYPTO_DEV_HIFN_795X |
245 | tristate "Driver HIFN 795x crypto accelerator chips" | |
c3041f9c | 246 | select CRYPTO_DES |
653ebd9c | 247 | select CRYPTO_BLKCIPHER |
946fef4e | 248 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG |
2707b937 | 249 | depends on PCI |
75b76625 | 250 | depends on !ARCH_DMA_ADDR_T_64BIT |
f7d0561e EP |
251 | help |
252 | This option allows you to have support for HIFN 795x crypto adapters. | |
253 | ||
946fef4e HX |
254 | config CRYPTO_DEV_HIFN_795X_RNG |
255 | bool "HIFN 795x random number generator" | |
256 | depends on CRYPTO_DEV_HIFN_795X | |
257 | help | |
258 | Select this option if you want to enable the random number generator | |
259 | on the HIFN 795x crypto adapters. | |
f7d0561e | 260 | |
8e8ec596 KP |
261 | source drivers/crypto/caam/Kconfig |
262 | ||
9c4a7965 KP |
263 | config CRYPTO_DEV_TALITOS |
264 | tristate "Talitos Freescale Security Engine (SEC)" | |
596103cf | 265 | select CRYPTO_AEAD |
9c4a7965 | 266 | select CRYPTO_AUTHENC |
596103cf HX |
267 | select CRYPTO_BLKCIPHER |
268 | select CRYPTO_HASH | |
9c4a7965 KP |
269 | select HW_RANDOM |
270 | depends on FSL_SOC | |
271 | help | |
272 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
273 | to offload cryptographic algorithm computation. | |
274 | ||
275 | The Freescale SEC is present on PowerQUICC 'E' processors, such | |
276 | as the MPC8349E and MPC8548E. | |
277 | ||
278 | To compile this driver as a module, choose M here: the module | |
279 | will be called talitos. | |
280 | ||
5b841a65 LC |
281 | config CRYPTO_DEV_TALITOS1 |
282 | bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" | |
283 | depends on CRYPTO_DEV_TALITOS | |
284 | depends on PPC_8xx || PPC_82xx | |
285 | default y | |
286 | help | |
287 | Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 | |
288 | found on MPC82xx or the Freescale Security Engine (SEC Lite) | |
289 | version 1.2 found on MPC8xx | |
290 | ||
291 | config CRYPTO_DEV_TALITOS2 | |
292 | bool "SEC2+ (SEC version 2.0 or upper)" | |
293 | depends on CRYPTO_DEV_TALITOS | |
294 | default y if !PPC_8xx | |
295 | help | |
296 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
297 | version 2 and following as found on MPC83xx, MPC85xx, etc ... | |
298 | ||
81bef015 CH |
299 | config CRYPTO_DEV_IXP4XX |
300 | tristate "Driver for IXP4xx crypto hardware acceleration" | |
9665c52b | 301 | depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE |
81bef015 | 302 | select CRYPTO_DES |
596103cf | 303 | select CRYPTO_AEAD |
090657e4 | 304 | select CRYPTO_AUTHENC |
81bef015 CH |
305 | select CRYPTO_BLKCIPHER |
306 | help | |
307 | Driver for the IXP4xx NPE crypto engine. | |
308 | ||
049359d6 JH |
309 | config CRYPTO_DEV_PPC4XX |
310 | tristate "Driver AMCC PPC4xx crypto accelerator" | |
311 | depends on PPC && 4xx | |
312 | select CRYPTO_HASH | |
a0aae821 CL |
313 | select CRYPTO_AEAD |
314 | select CRYPTO_AES | |
315 | select CRYPTO_CCM | |
98e87e3d | 316 | select CRYPTO_CTR |
a0aae821 | 317 | select CRYPTO_GCM |
049359d6 JH |
318 | select CRYPTO_BLKCIPHER |
319 | help | |
320 | This option allows you to have support for AMCC crypto acceleration. | |
321 | ||
5343e674 CL |
322 | config HW_RANDOM_PPC4XX |
323 | bool "PowerPC 4xx generic true random number generator support" | |
324 | depends on CRYPTO_DEV_PPC4XX && HW_RANDOM | |
325 | default y | |
326 | ---help--- | |
327 | This option provides the kernel-side support for the TRNG hardware | |
328 | found in the security function of some PowerPC 4xx SoCs. | |
329 | ||
74ed87e7 TK |
330 | config CRYPTO_DEV_OMAP |
331 | tristate "Support for OMAP crypto HW accelerators" | |
332 | depends on ARCH_OMAP2PLUS | |
333 | help | |
334 | OMAP processors have various crypto HW accelerators. Select this if | |
335 | you want to use the OMAP modules for any of the crypto algorithms. | |
336 | ||
337 | if CRYPTO_DEV_OMAP | |
338 | ||
8628e7c8 | 339 | config CRYPTO_DEV_OMAP_SHAM |
eaef7e3f LV |
340 | tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" |
341 | depends on ARCH_OMAP2PLUS | |
8628e7c8 DK |
342 | select CRYPTO_SHA1 |
343 | select CRYPTO_MD5 | |
eaef7e3f LV |
344 | select CRYPTO_SHA256 |
345 | select CRYPTO_SHA512 | |
346 | select CRYPTO_HMAC | |
8628e7c8 | 347 | help |
eaef7e3f LV |
348 | OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you |
349 | want to use the OMAP module for MD5/SHA1/SHA2 algorithms. | |
8628e7c8 | 350 | |
537559a5 DK |
351 | config CRYPTO_DEV_OMAP_AES |
352 | tristate "Support for OMAP AES hw engine" | |
1bbf6437 | 353 | depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS |
537559a5 | 354 | select CRYPTO_AES |
596103cf | 355 | select CRYPTO_BLKCIPHER |
0529900a | 356 | select CRYPTO_ENGINE |
9fcb191a LV |
357 | select CRYPTO_CBC |
358 | select CRYPTO_ECB | |
359 | select CRYPTO_CTR | |
ad18cc9d | 360 | select CRYPTO_AEAD |
537559a5 DK |
361 | help |
362 | OMAP processors have AES module accelerator. Select this if you | |
363 | want to use the OMAP module for AES algorithms. | |
364 | ||
701d0f19 | 365 | config CRYPTO_DEV_OMAP_DES |
97ee7ed3 | 366 | tristate "Support for OMAP DES/3DES hw engine" |
701d0f19 JF |
367 | depends on ARCH_OMAP2PLUS |
368 | select CRYPTO_DES | |
596103cf | 369 | select CRYPTO_BLKCIPHER |
f1b77aac | 370 | select CRYPTO_ENGINE |
701d0f19 JF |
371 | help |
372 | OMAP processors have DES/3DES module accelerator. Select this if you | |
373 | want to use the OMAP module for DES and 3DES algorithms. Currently | |
97ee7ed3 PM |
374 | the ECB and CBC modes of operation are supported by the driver. Also |
375 | accesses made on unaligned boundaries are supported. | |
701d0f19 | 376 | |
74ed87e7 TK |
377 | endif # CRYPTO_DEV_OMAP |
378 | ||
ce921368 JI |
379 | config CRYPTO_DEV_PICOXCELL |
380 | tristate "Support for picoXcell IPSEC and Layer2 crypto engines" | |
4f44d86d | 381 | depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK |
596103cf | 382 | select CRYPTO_AEAD |
ce921368 JI |
383 | select CRYPTO_AES |
384 | select CRYPTO_AUTHENC | |
596103cf | 385 | select CRYPTO_BLKCIPHER |
ce921368 JI |
386 | select CRYPTO_DES |
387 | select CRYPTO_CBC | |
388 | select CRYPTO_ECB | |
389 | select CRYPTO_SEQIV | |
390 | help | |
391 | This option enables support for the hardware offload engines in the | |
392 | Picochip picoXcell SoC devices. Select this for IPSEC ESP offload | |
393 | and for 3gpp Layer 2 ciphering support. | |
394 | ||
395 | Saying m here will build a module named pipcoxcell_crypto. | |
396 | ||
5de88752 JM |
397 | config CRYPTO_DEV_SAHARA |
398 | tristate "Support for SAHARA crypto accelerator" | |
74d24d83 | 399 | depends on ARCH_MXC && OF |
5de88752 JM |
400 | select CRYPTO_BLKCIPHER |
401 | select CRYPTO_AES | |
402 | select CRYPTO_ECB | |
403 | help | |
404 | This option enables support for the SAHARA HW crypto accelerator | |
405 | found in some Freescale i.MX chips. | |
406 | ||
d293b640 ST |
407 | config CRYPTO_DEV_MXC_SCC |
408 | tristate "Support for Freescale Security Controller (SCC)" | |
409 | depends on ARCH_MXC && OF | |
410 | select CRYPTO_BLKCIPHER | |
411 | select CRYPTO_DES | |
412 | help | |
413 | This option enables support for the Security Controller (SCC) | |
414 | found in Freescale i.MX25 chips. | |
415 | ||
c46ea13f KK |
416 | config CRYPTO_DEV_EXYNOS_RNG |
417 | tristate "EXYNOS HW pseudo random number generator support" | |
418 | depends on ARCH_EXYNOS || COMPILE_TEST | |
419 | depends on HAS_IOMEM | |
420 | select CRYPTO_RNG | |
421 | ---help--- | |
422 | This driver provides kernel-side support through the | |
423 | cryptographic API for the pseudo random number generator hardware | |
424 | found on Exynos SoCs. | |
425 | ||
426 | To compile this driver as a module, choose M here: the | |
427 | module will be called exynos-rng. | |
428 | ||
429 | If unsure, say Y. | |
430 | ||
a49e490c | 431 | config CRYPTO_DEV_S5P |
e922e96f | 432 | tristate "Support for Samsung S5PV210/Exynos crypto accelerator" |
dc1d9dee | 433 | depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST |
ee1b23d1 | 434 | depends on HAS_IOMEM |
a49e490c | 435 | select CRYPTO_AES |
a49e490c VZ |
436 | select CRYPTO_BLKCIPHER |
437 | help | |
438 | This option allows you to have support for S5P crypto acceleration. | |
e922e96f | 439 | Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES |
a49e490c VZ |
440 | algorithms execution. |
441 | ||
c2afad6c KK |
442 | config CRYPTO_DEV_EXYNOS_HASH |
443 | bool "Support for Samsung Exynos HASH accelerator" | |
444 | depends on CRYPTO_DEV_S5P | |
445 | depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m | |
446 | select CRYPTO_SHA1 | |
447 | select CRYPTO_MD5 | |
448 | select CRYPTO_SHA256 | |
449 | help | |
450 | Select this to offload Exynos from HASH MD5/SHA1/SHA256. | |
451 | This will select software SHA1, MD5 and SHA256 as they are | |
452 | needed for small and zero-size messages. | |
453 | HASH algorithms will be disabled if EXYNOS_RNG | |
454 | is enabled due to hw conflict. | |
455 | ||
aef7b31c | 456 | config CRYPTO_DEV_NX |
7011a122 DS |
457 | bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" |
458 | depends on PPC64 | |
aef7b31c | 459 | help |
7011a122 DS |
460 | This enables support for the NX hardware cryptographic accelerator |
461 | coprocessor that is in IBM PowerPC P7+ or later processors. This | |
462 | does not actually enable any drivers, it only allows you to select | |
463 | which acceleration type (encryption and/or compression) to enable. | |
322cacce SJ |
464 | |
465 | if CRYPTO_DEV_NX | |
466 | source "drivers/crypto/nx/Kconfig" | |
467 | endif | |
aef7b31c | 468 | |
2789c08f AW |
469 | config CRYPTO_DEV_UX500 |
470 | tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" | |
471 | depends on ARCH_U8500 | |
2789c08f AW |
472 | help |
473 | Driver for ST-Ericsson UX500 crypto engine. | |
474 | ||
475 | if CRYPTO_DEV_UX500 | |
476 | source "drivers/crypto/ux500/Kconfig" | |
477 | endif # if CRYPTO_DEV_UX500 | |
478 | ||
89a82ef8 CP |
479 | config CRYPTO_DEV_ATMEL_AUTHENC |
480 | tristate "Support for Atmel IPSEC/SSL hw accelerator" | |
ceb4afb3 | 481 | depends on ARCH_AT91 || COMPILE_TEST |
89a82ef8 CP |
482 | select CRYPTO_AUTHENC |
483 | select CRYPTO_DEV_ATMEL_AES | |
484 | select CRYPTO_DEV_ATMEL_SHA | |
485 | help | |
486 | Some Atmel processors can combine the AES and SHA hw accelerators | |
487 | to enhance support of IPSEC/SSL. | |
488 | Select this if you want to use the Atmel modules for | |
489 | authenc(hmac(shaX),Y(cbc)) algorithms. | |
490 | ||
bd3c7b5c NR |
491 | config CRYPTO_DEV_ATMEL_AES |
492 | tristate "Support for Atmel AES hw accelerator" | |
ceb4afb3 | 493 | depends on ARCH_AT91 || COMPILE_TEST |
bd3c7b5c | 494 | select CRYPTO_AES |
d4419548 | 495 | select CRYPTO_AEAD |
bd3c7b5c | 496 | select CRYPTO_BLKCIPHER |
bd3c7b5c NR |
497 | help |
498 | Some Atmel processors have AES hw accelerator. | |
499 | Select this if you want to use the Atmel module for | |
500 | AES algorithms. | |
501 | ||
502 | To compile this driver as a module, choose M here: the module | |
503 | will be called atmel-aes. | |
504 | ||
13802005 NR |
505 | config CRYPTO_DEV_ATMEL_TDES |
506 | tristate "Support for Atmel DES/TDES hw accelerator" | |
ceb4afb3 | 507 | depends on ARCH_AT91 || COMPILE_TEST |
13802005 | 508 | select CRYPTO_DES |
13802005 NR |
509 | select CRYPTO_BLKCIPHER |
510 | help | |
511 | Some Atmel processors have DES/TDES hw accelerator. | |
512 | Select this if you want to use the Atmel module for | |
513 | DES/TDES algorithms. | |
514 | ||
515 | To compile this driver as a module, choose M here: the module | |
516 | will be called atmel-tdes. | |
517 | ||
ebc82efa | 518 | config CRYPTO_DEV_ATMEL_SHA |
d4905b38 | 519 | tristate "Support for Atmel SHA hw accelerator" |
ceb4afb3 | 520 | depends on ARCH_AT91 || COMPILE_TEST |
596103cf | 521 | select CRYPTO_HASH |
ebc82efa | 522 | help |
d4905b38 NR |
523 | Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 |
524 | hw accelerator. | |
ebc82efa | 525 | Select this if you want to use the Atmel module for |
d4905b38 | 526 | SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. |
ebc82efa NR |
527 | |
528 | To compile this driver as a module, choose M here: the module | |
529 | will be called atmel-sha. | |
530 | ||
11105693 TDA |
531 | config CRYPTO_DEV_ATMEL_ECC |
532 | tristate "Support for Microchip / Atmel ECC hw accelerator" | |
533 | depends on ARCH_AT91 || COMPILE_TEST | |
534 | depends on I2C | |
535 | select CRYPTO_ECDH | |
536 | select CRC16 | |
537 | help | |
538 | Microhip / Atmel ECC hw accelerator. | |
539 | Select this if you want to use the Microchip / Atmel module for | |
540 | ECDH algorithm. | |
541 | ||
542 | To compile this driver as a module, choose M here: the module | |
543 | will be called atmel-ecc. | |
544 | ||
f1147660 | 545 | config CRYPTO_DEV_CCP |
720419f0 | 546 | bool "Support for AMD Secure Processor" |
6c506343 | 547 | depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM |
f1147660 | 548 | help |
720419f0 BS |
549 | The AMD Secure Processor provides support for the Cryptographic Coprocessor |
550 | (CCP) and the Platform Security Processor (PSP) devices. | |
f1147660 TL |
551 | |
552 | if CRYPTO_DEV_CCP | |
553 | source "drivers/crypto/ccp/Kconfig" | |
554 | endif | |
555 | ||
15b59e7c MV |
556 | config CRYPTO_DEV_MXS_DCP |
557 | tristate "Support for Freescale MXS DCP" | |
a2712e6c | 558 | depends on (ARCH_MXS || ARCH_MXC) |
dc97fa02 | 559 | select STMP_DEVICE |
15b59e7c MV |
560 | select CRYPTO_CBC |
561 | select CRYPTO_ECB | |
562 | select CRYPTO_AES | |
563 | select CRYPTO_BLKCIPHER | |
596103cf | 564 | select CRYPTO_HASH |
15b59e7c MV |
565 | help |
566 | The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB | |
567 | co-processor on the die. | |
568 | ||
569 | To compile this driver as a module, choose M here: the module | |
570 | will be called mxs-dcp. | |
571 | ||
cea4001a | 572 | source "drivers/crypto/qat/Kconfig" |
62ad8b5c | 573 | source "drivers/crypto/cavium/cpt/Kconfig" |
14fa93cd | 574 | source "drivers/crypto/cavium/nitrox/Kconfig" |
c672752d | 575 | |
640035a2 MC |
576 | config CRYPTO_DEV_CAVIUM_ZIP |
577 | tristate "Cavium ZIP driver" | |
578 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | |
579 | ---help--- | |
580 | Select this option if you want to enable compression/decompression | |
581 | acceleration on Cavium's ARM based SoCs | |
582 | ||
c672752d SV |
583 | config CRYPTO_DEV_QCE |
584 | tristate "Qualcomm crypto engine accelerator" | |
ee1b23d1 GU |
585 | depends on ARCH_QCOM || COMPILE_TEST |
586 | depends on HAS_IOMEM | |
c672752d SV |
587 | select CRYPTO_AES |
588 | select CRYPTO_DES | |
589 | select CRYPTO_ECB | |
590 | select CRYPTO_CBC | |
591 | select CRYPTO_XTS | |
592 | select CRYPTO_CTR | |
c672752d SV |
593 | select CRYPTO_BLKCIPHER |
594 | help | |
595 | This driver supports Qualcomm crypto engine accelerator | |
596 | hardware. To compile this driver as a module, choose M here. The | |
597 | module will be called qcrypto. | |
598 | ||
ceec5f5b VK |
599 | config CRYPTO_DEV_QCOM_RNG |
600 | tristate "Qualcomm Random Number Generator Driver" | |
601 | depends on ARCH_QCOM || COMPILE_TEST | |
602 | select CRYPTO_RNG | |
603 | help | |
604 | This driver provides support for the Random Number | |
605 | Generator hardware found on Qualcomm SoCs. | |
606 | ||
607 | To compile this driver as a module, choose M here. The | |
608 | module will be called qcom-rng. If unsure, say N. | |
609 | ||
d2e3ae6f LB |
610 | config CRYPTO_DEV_VMX |
611 | bool "Support for VMX cryptographic acceleration instructions" | |
f1ab4287 | 612 | depends on PPC64 && VSX |
d2e3ae6f LB |
613 | help |
614 | Support for VMX cryptographic acceleration instructions. | |
615 | ||
616 | source "drivers/crypto/vmx/Kconfig" | |
617 | ||
d358f1ab | 618 | config CRYPTO_DEV_IMGTEC_HASH |
d358f1ab | 619 | tristate "Imagination Technologies hardware hash accelerator" |
8c98ebd7 | 620 | depends on MIPS || COMPILE_TEST |
d358f1ab JH |
621 | select CRYPTO_MD5 |
622 | select CRYPTO_SHA1 | |
d358f1ab JH |
623 | select CRYPTO_SHA256 |
624 | select CRYPTO_HASH | |
625 | help | |
626 | This driver interfaces with the Imagination Technologies | |
627 | hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 | |
628 | hashing algorithms. | |
629 | ||
6298e948 LC |
630 | config CRYPTO_DEV_SUN4I_SS |
631 | tristate "Support for Allwinner Security System cryptographic accelerator" | |
f823ab93 | 632 | depends on ARCH_SUNXI && !64BIT |
6298e948 LC |
633 | select CRYPTO_MD5 |
634 | select CRYPTO_SHA1 | |
635 | select CRYPTO_AES | |
636 | select CRYPTO_DES | |
637 | select CRYPTO_BLKCIPHER | |
638 | help | |
639 | Some Allwinner SoC have a crypto accelerator named | |
640 | Security System. Select this if you want to use it. | |
641 | The Security System handle AES/DES/3DES ciphers in CBC mode | |
642 | and SHA1 and MD5 hash algorithms. | |
643 | ||
644 | To compile this driver as a module, choose M here: the module | |
645 | will be called sun4i-ss. | |
646 | ||
b8ae5c73 CL |
647 | config CRYPTO_DEV_SUN4I_SS_PRNG |
648 | bool "Support for Allwinner Security System PRNG" | |
649 | depends on CRYPTO_DEV_SUN4I_SS | |
650 | select CRYPTO_RNG | |
651 | help | |
652 | Select this option if you want to provide kernel-side support for | |
653 | the Pseudo-Random Number Generator found in the Security System. | |
654 | ||
433cd2c6 ZW |
655 | config CRYPTO_DEV_ROCKCHIP |
656 | tristate "Rockchip's Cryptographic Engine driver" | |
657 | depends on OF && ARCH_ROCKCHIP | |
658 | select CRYPTO_AES | |
659 | select CRYPTO_DES | |
bfd927ff ZW |
660 | select CRYPTO_MD5 |
661 | select CRYPTO_SHA1 | |
662 | select CRYPTO_SHA256 | |
663 | select CRYPTO_HASH | |
433cd2c6 ZW |
664 | select CRYPTO_BLKCIPHER |
665 | ||
666 | help | |
667 | This driver interfaces with the hardware crypto accelerator. | |
668 | Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. | |
669 | ||
785e5c61 RL |
670 | config CRYPTO_DEV_MEDIATEK |
671 | tristate "MediaTek's EIP97 Cryptographic Engine driver" | |
7dee9f61 | 672 | depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST |
785e5c61 | 673 | select CRYPTO_AES |
d03f7b0d | 674 | select CRYPTO_AEAD |
785e5c61 | 675 | select CRYPTO_BLKCIPHER |
d03f7b0d | 676 | select CRYPTO_CTR |
7dee9f61 AB |
677 | select CRYPTO_SHA1 |
678 | select CRYPTO_SHA256 | |
679 | select CRYPTO_SHA512 | |
785e5c61 RL |
680 | select CRYPTO_HMAC |
681 | help | |
682 | This driver allows you to utilize the hardware crypto accelerator | |
683 | EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... | |
684 | Select this if you want to use it for AES/SHA1/SHA2 algorithms. | |
685 | ||
02038fd6 HS |
686 | source "drivers/crypto/chelsio/Kconfig" |
687 | ||
dbaf0624 G |
688 | source "drivers/crypto/virtio/Kconfig" |
689 | ||
9d12ba86 RR |
690 | config CRYPTO_DEV_BCM_SPU |
691 | tristate "Broadcom symmetric crypto/hash acceleration support" | |
692 | depends on ARCH_BCM_IPROC | |
efc856ed | 693 | depends on MAILBOX |
9d12ba86 RR |
694 | default m |
695 | select CRYPTO_DES | |
696 | select CRYPTO_MD5 | |
697 | select CRYPTO_SHA1 | |
698 | select CRYPTO_SHA256 | |
699 | select CRYPTO_SHA512 | |
700 | help | |
701 | This driver provides support for Broadcom crypto acceleration using the | |
702 | Secure Processing Unit (SPU). The SPU driver registers ablkcipher, | |
703 | ahash, and aead algorithms with the kernel cryptographic API. | |
704 | ||
b51dbe90 FD |
705 | source "drivers/crypto/stm32/Kconfig" |
706 | ||
1b44c5a6 AT |
707 | config CRYPTO_DEV_SAFEXCEL |
708 | tristate "Inside Secure's SafeXcel cryptographic engine driver" | |
ee1b23d1 | 709 | depends on OF |
1b44c5a6 AT |
710 | depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT) |
711 | select CRYPTO_AES | |
f6beaea3 | 712 | select CRYPTO_AUTHENC |
1b44c5a6 | 713 | select CRYPTO_BLKCIPHER |
a7dea8c0 | 714 | select CRYPTO_DES |
1b44c5a6 AT |
715 | select CRYPTO_HASH |
716 | select CRYPTO_HMAC | |
293f89cf | 717 | select CRYPTO_MD5 |
1b44c5a6 AT |
718 | select CRYPTO_SHA1 |
719 | select CRYPTO_SHA256 | |
720 | select CRYPTO_SHA512 | |
721 | help | |
722 | This driver interfaces with the SafeXcel EIP-197 cryptographic engine | |
723 | designed by Inside Secure. Select this if you want to use CBC/ECB | |
724 | chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash | |
725 | algorithms. | |
726 | ||
a21eb94f LP |
727 | config CRYPTO_DEV_ARTPEC6 |
728 | tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." | |
729 | depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) | |
a21eb94f LP |
730 | depends on OF |
731 | select CRYPTO_AEAD | |
732 | select CRYPTO_AES | |
733 | select CRYPTO_ALGAPI | |
734 | select CRYPTO_BLKCIPHER | |
735 | select CRYPTO_CTR | |
736 | select CRYPTO_HASH | |
737 | select CRYPTO_SHA1 | |
738 | select CRYPTO_SHA256 | |
a21eb94f LP |
739 | select CRYPTO_SHA512 |
740 | help | |
741 | Enables the driver for the on-chip crypto accelerator | |
742 | of Axis ARTPEC SoCs. | |
743 | ||
744 | To compile this driver as a module, choose M here. | |
745 | ||
4c3f9727 GBY |
746 | config CRYPTO_DEV_CCREE |
747 | tristate "Support for ARM TrustZone CryptoCell family of security processors" | |
748 | depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA | |
749 | default n | |
750 | select CRYPTO_HASH | |
751 | select CRYPTO_BLKCIPHER | |
752 | select CRYPTO_DES | |
753 | select CRYPTO_AEAD | |
754 | select CRYPTO_AUTHENC | |
755 | select CRYPTO_SHA1 | |
756 | select CRYPTO_MD5 | |
757 | select CRYPTO_SHA256 | |
758 | select CRYPTO_SHA512 | |
759 | select CRYPTO_HMAC | |
760 | select CRYPTO_AES | |
761 | select CRYPTO_CBC | |
762 | select CRYPTO_ECB | |
763 | select CRYPTO_CTR | |
764 | select CRYPTO_XTS | |
9b8d51f8 | 765 | select CRYPTO_SM4 |
927574e0 | 766 | select CRYPTO_SM3 |
4c3f9727 | 767 | help |
27b3b22d GBY |
768 | Say 'Y' to enable a driver for the REE interface of the Arm |
769 | TrustZone CryptoCell family of processors. Currently the | |
1c876a90 | 770 | CryptoCell 713, 703, 712, 710 and 630 are supported. |
4c3f9727 GBY |
771 | Choose this if you wish to use hardware acceleration of |
772 | cryptographic operations on the system REE. | |
773 | If unsure say Y. | |
774 | ||
915e4e84 JC |
775 | source "drivers/crypto/hisilicon/Kconfig" |
776 | ||
b511431d | 777 | endif # CRYPTO_HW |