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1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
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5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
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10
11if CRYPTO_HW
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LT
12
13config CRYPTO_DEV_PADLOCK
d158325e 14 tristate "Support for VIA PadLock ACE"
2f817418 15 depends on X86 && !UML
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16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
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ML
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
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LT
21
22 The instructions are used only when the CPU supports them.
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23 Otherwise software encryption is used.
24
1da177e4 25config CRYPTO_DEV_PADLOCK_AES
1191f0a4 26 tristate "PadLock driver for AES algorithm"
1da177e4 27 depends on CRYPTO_DEV_PADLOCK
28ce728a 28 select CRYPTO_BLKCIPHER
7dc748e4 29 select CRYPTO_AES
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LT
30 help
31 Use VIA PadLock for AES algorithm.
32
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33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
4737f097 36 called padlock-aes.
1191f0a4 37
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38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
bbbee467 41 select CRYPTO_HASH
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ML
42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
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ML
44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
4737f097 50 called padlock-sha.
6c833275 51
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52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
f6259dea 54 depends on X86_32 && PCI
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55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
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57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 59 engine for the CryptoAPI AES algorithm.
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60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
61d48c2c 64config ZCRYPT
a3358e3d 65 tristate "Support for s390 cryptographic adapters"
61d48c2c 66 depends on S390
2f7c8bd6 67 select HW_RANDOM
61d48c2c 68 help
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69 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
61d48c2c 71 + PCI-X Cryptographic Coprocessor (PCIXCC)
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72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
61d48c2c 75
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76config PKEY
77 tristate "Kernel API for protected key handling"
78 depends on S390
79 depends on ZCRYPT
80 help
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
84
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
87
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
90 available at runtime.
61d48c2c 91
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92config CRYPTO_SHA1_S390
93 tristate "SHA1 digest algorithm"
94 depends on S390
563f346d 95 select CRYPTO_HASH
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96 help
97 This is the s390 hardware accelerated implementation of the
98 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
99
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100 It is available as of z990.
101
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102config CRYPTO_SHA256_S390
103 tristate "SHA256 digest algorithm"
104 depends on S390
563f346d 105 select CRYPTO_HASH
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106 help
107 This is the s390 hardware accelerated implementation of the
108 SHA256 secure hash standard (DFIPS 180-2).
109
d393d9b8 110 It is available as of z9.
3f5615e0 111
291dc7c0 112config CRYPTO_SHA512_S390
4e2c6d7f 113 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 114 depends on S390
563f346d 115 select CRYPTO_HASH
291dc7c0
JG
116 help
117 This is the s390 hardware accelerated implementation of the
118 SHA512 secure hash standard.
119
d393d9b8 120 It is available as of z10.
291dc7c0 121
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122config CRYPTO_DES_S390
123 tristate "DES and Triple DES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
63291d40 127 select CRYPTO_DES
3f5615e0 128 help
0200f3ec 129 This is the s390 hardware accelerated implementation of the
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130 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
131
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132 As of z990 the ECB and CBC mode are hardware accelerated.
133 As of z196 the CTR mode is hardware accelerated.
134
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135config CRYPTO_AES_S390
136 tristate "AES cipher algorithms"
137 depends on S390
138 select CRYPTO_ALGAPI
139 select CRYPTO_BLKCIPHER
27937843 140 select PKEY
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141 help
142 This is the s390 hardware accelerated implementation of the
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143 AES cipher algorithms (FIPS-197).
144
145 As of z9 the ECB and CBC modes are hardware accelerated
146 for 128 bit keys.
147 As of z10 the ECB and CBC modes are hardware accelerated
148 for all AES key sizes.
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149 As of z196 the CTR mode is hardware accelerated for all AES
150 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 151 512 bit keys.
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152
153config S390_PRNG
154 tristate "Pseudo random number generator device driver"
155 depends on S390
156 default "m"
157 help
158 Select this option if you want to use the s390 pseudo random number
159 generator. The PRNG is part of the cryptographic processor functions
160 and uses triple-DES to generate secure random numbers like the
d393d9b8
JG
161 ANSI X9.17 standard. User-space programs access the
162 pseudo-random-number device through the char device /dev/prandom.
163
164 It is available as of z9.
3f5615e0 165
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166config CRYPTO_GHASH_S390
167 tristate "GHASH digest algorithm"
168 depends on S390
169 select CRYPTO_HASH
170 help
171 This is the s390 hardware accelerated implementation of the
172 GHASH message digest algorithm for GCM (Galois/Counter Mode).
173
174 It is available as of z196.
175
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176config CRYPTO_CRC32_S390
177 tristate "CRC-32 algorithms"
178 depends on S390
179 select CRYPTO_HASH
180 select CRC32
181 help
182 Select this option if you want to use hardware accelerated
183 implementations of CRC algorithms. With this option, you
184 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
185 and CRC-32C (Castagnoli).
186
187 It is available with IBM z13 or later.
188
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189config CRYPTO_DEV_MV_CESA
190 tristate "Marvell's Cryptographic Engine"
191 depends on PLAT_ORION
85a7f0ac 192 select CRYPTO_AES
596103cf 193 select CRYPTO_BLKCIPHER
1ebfefcf 194 select CRYPTO_HASH
51b44fc8 195 select SRAM
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SAS
196 help
197 This driver allows you to utilize the Cryptographic Engines and
198 Security Accelerator (CESA) which can be found on the Marvell Orion
199 and Kirkwood SoCs, such as QNAP's TS-209.
200
201 Currently the driver supports AES in ECB and CBC mode without DMA.
202
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203config CRYPTO_DEV_MARVELL_CESA
204 tristate "New Marvell's Cryptographic Engine driver"
fe55dfdc 205 depends on PLAT_ORION || ARCH_MVEBU
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206 select CRYPTO_AES
207 select CRYPTO_DES
208 select CRYPTO_BLKCIPHER
209 select CRYPTO_HASH
210 select SRAM
211 help
212 This driver allows you to utilize the Cryptographic Engines and
213 Security Accelerator (CESA) which can be found on the Armada 370.
db509a45 214 This driver supports CPU offload through DMA transfers.
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215
216 This driver is aimed at replacing the mv_cesa driver. This will only
217 happen once it has received proper testing.
218
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219config CRYPTO_DEV_NIAGARA2
220 tristate "Niagara2 Stream Processing Unit driver"
50e78161 221 select CRYPTO_DES
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222 select CRYPTO_BLKCIPHER
223 select CRYPTO_HASH
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224 select CRYPTO_MD5
225 select CRYPTO_SHA1
226 select CRYPTO_SHA256
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227 depends on SPARC64
228 help
229 Each core of a Niagara2 processor contains a Stream
230 Processing Unit, which itself contains several cryptographic
231 sub-units. One set provides the Modular Arithmetic Unit,
232 used for SSL offload. The other set provides the Cipher
233 Group, which can perform encryption, decryption, hashing,
234 checksumming, and raw copies.
235
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236config CRYPTO_DEV_HIFN_795X
237 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 238 select CRYPTO_DES
653ebd9c 239 select CRYPTO_BLKCIPHER
946fef4e 240 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 241 depends on PCI
75b76625 242 depends on !ARCH_DMA_ADDR_T_64BIT
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243 help
244 This option allows you to have support for HIFN 795x crypto adapters.
245
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246config CRYPTO_DEV_HIFN_795X_RNG
247 bool "HIFN 795x random number generator"
248 depends on CRYPTO_DEV_HIFN_795X
249 help
250 Select this option if you want to enable the random number generator
251 on the HIFN 795x crypto adapters.
f7d0561e 252
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253source drivers/crypto/caam/Kconfig
254
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255config CRYPTO_DEV_TALITOS
256 tristate "Talitos Freescale Security Engine (SEC)"
596103cf 257 select CRYPTO_AEAD
9c4a7965 258 select CRYPTO_AUTHENC
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259 select CRYPTO_BLKCIPHER
260 select CRYPTO_HASH
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261 select HW_RANDOM
262 depends on FSL_SOC
263 help
264 Say 'Y' here to use the Freescale Security Engine (SEC)
265 to offload cryptographic algorithm computation.
266
267 The Freescale SEC is present on PowerQUICC 'E' processors, such
268 as the MPC8349E and MPC8548E.
269
270 To compile this driver as a module, choose M here: the module
271 will be called talitos.
272
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273config CRYPTO_DEV_TALITOS1
274 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
275 depends on CRYPTO_DEV_TALITOS
276 depends on PPC_8xx || PPC_82xx
277 default y
278 help
279 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
280 found on MPC82xx or the Freescale Security Engine (SEC Lite)
281 version 1.2 found on MPC8xx
282
283config CRYPTO_DEV_TALITOS2
284 bool "SEC2+ (SEC version 2.0 or upper)"
285 depends on CRYPTO_DEV_TALITOS
286 default y if !PPC_8xx
287 help
288 Say 'Y' here to use the Freescale Security Engine (SEC)
289 version 2 and following as found on MPC83xx, MPC85xx, etc ...
290
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CH
291config CRYPTO_DEV_IXP4XX
292 tristate "Driver for IXP4xx crypto hardware acceleration"
9665c52b 293 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
81bef015 294 select CRYPTO_DES
596103cf 295 select CRYPTO_AEAD
090657e4 296 select CRYPTO_AUTHENC
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297 select CRYPTO_BLKCIPHER
298 help
299 Driver for the IXP4xx NPE crypto engine.
300
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301config CRYPTO_DEV_PPC4XX
302 tristate "Driver AMCC PPC4xx crypto accelerator"
303 depends on PPC && 4xx
304 select CRYPTO_HASH
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305 select CRYPTO_BLKCIPHER
306 help
307 This option allows you to have support for AMCC crypto acceleration.
308
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309config HW_RANDOM_PPC4XX
310 bool "PowerPC 4xx generic true random number generator support"
311 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
312 default y
313 ---help---
314 This option provides the kernel-side support for the TRNG hardware
315 found in the security function of some PowerPC 4xx SoCs.
316
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317config CRYPTO_DEV_OMAP
318 tristate "Support for OMAP crypto HW accelerators"
319 depends on ARCH_OMAP2PLUS
320 help
321 OMAP processors have various crypto HW accelerators. Select this if
322 you want to use the OMAP modules for any of the crypto algorithms.
323
324if CRYPTO_DEV_OMAP
325
8628e7c8 326config CRYPTO_DEV_OMAP_SHAM
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LV
327 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
328 depends on ARCH_OMAP2PLUS
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DK
329 select CRYPTO_SHA1
330 select CRYPTO_MD5
eaef7e3f
LV
331 select CRYPTO_SHA256
332 select CRYPTO_SHA512
333 select CRYPTO_HMAC
8628e7c8 334 help
eaef7e3f
LV
335 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
336 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
8628e7c8 337
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DK
338config CRYPTO_DEV_OMAP_AES
339 tristate "Support for OMAP AES hw engine"
1bbf6437 340 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
537559a5 341 select CRYPTO_AES
596103cf 342 select CRYPTO_BLKCIPHER
0529900a 343 select CRYPTO_ENGINE
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344 select CRYPTO_CBC
345 select CRYPTO_ECB
346 select CRYPTO_CTR
ad18cc9d 347 select CRYPTO_AEAD
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DK
348 help
349 OMAP processors have AES module accelerator. Select this if you
350 want to use the OMAP module for AES algorithms.
351
701d0f19 352config CRYPTO_DEV_OMAP_DES
97ee7ed3 353 tristate "Support for OMAP DES/3DES hw engine"
701d0f19
JF
354 depends on ARCH_OMAP2PLUS
355 select CRYPTO_DES
596103cf 356 select CRYPTO_BLKCIPHER
f1b77aac 357 select CRYPTO_ENGINE
701d0f19
JF
358 help
359 OMAP processors have DES/3DES module accelerator. Select this if you
360 want to use the OMAP module for DES and 3DES algorithms. Currently
97ee7ed3
PM
361 the ECB and CBC modes of operation are supported by the driver. Also
362 accesses made on unaligned boundaries are supported.
701d0f19 363
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TK
364endif # CRYPTO_DEV_OMAP
365
ce921368
JI
366config CRYPTO_DEV_PICOXCELL
367 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
4f44d86d 368 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
596103cf 369 select CRYPTO_AEAD
ce921368
JI
370 select CRYPTO_AES
371 select CRYPTO_AUTHENC
596103cf 372 select CRYPTO_BLKCIPHER
ce921368
JI
373 select CRYPTO_DES
374 select CRYPTO_CBC
375 select CRYPTO_ECB
376 select CRYPTO_SEQIV
377 help
378 This option enables support for the hardware offload engines in the
379 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
380 and for 3gpp Layer 2 ciphering support.
381
382 Saying m here will build a module named pipcoxcell_crypto.
383
5de88752
JM
384config CRYPTO_DEV_SAHARA
385 tristate "Support for SAHARA crypto accelerator"
74d24d83 386 depends on ARCH_MXC && OF
5de88752
JM
387 select CRYPTO_BLKCIPHER
388 select CRYPTO_AES
389 select CRYPTO_ECB
390 help
391 This option enables support for the SAHARA HW crypto accelerator
392 found in some Freescale i.MX chips.
393
d293b640
ST
394config CRYPTO_DEV_MXC_SCC
395 tristate "Support for Freescale Security Controller (SCC)"
396 depends on ARCH_MXC && OF
397 select CRYPTO_BLKCIPHER
398 select CRYPTO_DES
399 help
400 This option enables support for the Security Controller (SCC)
401 found in Freescale i.MX25 chips.
402
c46ea13f
KK
403config CRYPTO_DEV_EXYNOS_RNG
404 tristate "EXYNOS HW pseudo random number generator support"
405 depends on ARCH_EXYNOS || COMPILE_TEST
406 depends on HAS_IOMEM
407 select CRYPTO_RNG
408 ---help---
409 This driver provides kernel-side support through the
410 cryptographic API for the pseudo random number generator hardware
411 found on Exynos SoCs.
412
413 To compile this driver as a module, choose M here: the
414 module will be called exynos-rng.
415
416 If unsure, say Y.
417
a49e490c 418config CRYPTO_DEV_S5P
e922e96f 419 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
dc1d9dee
KK
420 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
421 depends on HAS_IOMEM && HAS_DMA
a49e490c 422 select CRYPTO_AES
a49e490c
VZ
423 select CRYPTO_BLKCIPHER
424 help
425 This option allows you to have support for S5P crypto acceleration.
e922e96f 426 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
a49e490c
VZ
427 algorithms execution.
428
aef7b31c 429config CRYPTO_DEV_NX
7011a122
DS
430 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
431 depends on PPC64
aef7b31c 432 help
7011a122
DS
433 This enables support for the NX hardware cryptographic accelerator
434 coprocessor that is in IBM PowerPC P7+ or later processors. This
435 does not actually enable any drivers, it only allows you to select
436 which acceleration type (encryption and/or compression) to enable.
322cacce
SJ
437
438if CRYPTO_DEV_NX
439 source "drivers/crypto/nx/Kconfig"
440endif
aef7b31c 441
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AW
442config CRYPTO_DEV_UX500
443 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
444 depends on ARCH_U8500
2789c08f
AW
445 help
446 Driver for ST-Ericsson UX500 crypto engine.
447
448if CRYPTO_DEV_UX500
449 source "drivers/crypto/ux500/Kconfig"
450endif # if CRYPTO_DEV_UX500
451
b8840098
SZ
452config CRYPTO_DEV_BFIN_CRC
453 tristate "Support for Blackfin CRC hardware"
454 depends on BF60x
455 help
456 Newer Blackfin processors have CRC hardware. Select this if you
457 want to use the Blackfin CRC module.
458
89a82ef8
CP
459config CRYPTO_DEV_ATMEL_AUTHENC
460 tristate "Support for Atmel IPSEC/SSL hw accelerator"
ceb4afb3
AB
461 depends on HAS_DMA
462 depends on ARCH_AT91 || COMPILE_TEST
89a82ef8
CP
463 select CRYPTO_AUTHENC
464 select CRYPTO_DEV_ATMEL_AES
465 select CRYPTO_DEV_ATMEL_SHA
466 help
467 Some Atmel processors can combine the AES and SHA hw accelerators
468 to enhance support of IPSEC/SSL.
469 Select this if you want to use the Atmel modules for
470 authenc(hmac(shaX),Y(cbc)) algorithms.
471
bd3c7b5c
NR
472config CRYPTO_DEV_ATMEL_AES
473 tristate "Support for Atmel AES hw accelerator"
cbafd643 474 depends on HAS_DMA
ceb4afb3 475 depends on ARCH_AT91 || COMPILE_TEST
bd3c7b5c 476 select CRYPTO_AES
d4419548 477 select CRYPTO_AEAD
bd3c7b5c 478 select CRYPTO_BLKCIPHER
bd3c7b5c
NR
479 help
480 Some Atmel processors have AES hw accelerator.
481 Select this if you want to use the Atmel module for
482 AES algorithms.
483
484 To compile this driver as a module, choose M here: the module
485 will be called atmel-aes.
486
13802005
NR
487config CRYPTO_DEV_ATMEL_TDES
488 tristate "Support for Atmel DES/TDES hw accelerator"
f7f9482e 489 depends on HAS_DMA
ceb4afb3 490 depends on ARCH_AT91 || COMPILE_TEST
13802005 491 select CRYPTO_DES
13802005
NR
492 select CRYPTO_BLKCIPHER
493 help
494 Some Atmel processors have DES/TDES hw accelerator.
495 Select this if you want to use the Atmel module for
496 DES/TDES algorithms.
497
498 To compile this driver as a module, choose M here: the module
499 will be called atmel-tdes.
500
ebc82efa 501config CRYPTO_DEV_ATMEL_SHA
d4905b38 502 tristate "Support for Atmel SHA hw accelerator"
f7f9482e 503 depends on HAS_DMA
ceb4afb3 504 depends on ARCH_AT91 || COMPILE_TEST
596103cf 505 select CRYPTO_HASH
ebc82efa 506 help
d4905b38
NR
507 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
508 hw accelerator.
ebc82efa 509 Select this if you want to use the Atmel module for
d4905b38 510 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
ebc82efa
NR
511
512 To compile this driver as a module, choose M here: the module
513 will be called atmel-sha.
514
f1147660
TL
515config CRYPTO_DEV_CCP
516 bool "Support for AMD Cryptographic Coprocessor"
6c506343 517 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
f1147660 518 help
21dc9e8f 519 The AMD Cryptographic Coprocessor provides hardware offload support
f1147660
TL
520 for encryption, hashing and related operations.
521
522if CRYPTO_DEV_CCP
523 source "drivers/crypto/ccp/Kconfig"
524endif
525
15b59e7c
MV
526config CRYPTO_DEV_MXS_DCP
527 tristate "Support for Freescale MXS DCP"
a2712e6c 528 depends on (ARCH_MXS || ARCH_MXC)
dc97fa02 529 select STMP_DEVICE
15b59e7c
MV
530 select CRYPTO_CBC
531 select CRYPTO_ECB
532 select CRYPTO_AES
533 select CRYPTO_BLKCIPHER
596103cf 534 select CRYPTO_HASH
15b59e7c
MV
535 help
536 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
537 co-processor on the die.
538
539 To compile this driver as a module, choose M here: the module
540 will be called mxs-dcp.
541
cea4001a 542source "drivers/crypto/qat/Kconfig"
62ad8b5c 543source "drivers/crypto/cavium/cpt/Kconfig"
c672752d 544
640035a2
MC
545config CRYPTO_DEV_CAVIUM_ZIP
546 tristate "Cavium ZIP driver"
547 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
548 ---help---
549 Select this option if you want to enable compression/decompression
550 acceleration on Cavium's ARM based SoCs
551
c672752d
SV
552config CRYPTO_DEV_QCE
553 tristate "Qualcomm crypto engine accelerator"
71d932d9 554 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
c672752d
SV
555 select CRYPTO_AES
556 select CRYPTO_DES
557 select CRYPTO_ECB
558 select CRYPTO_CBC
559 select CRYPTO_XTS
560 select CRYPTO_CTR
c672752d
SV
561 select CRYPTO_BLKCIPHER
562 help
563 This driver supports Qualcomm crypto engine accelerator
564 hardware. To compile this driver as a module, choose M here. The
565 module will be called qcrypto.
566
d2e3ae6f
LB
567config CRYPTO_DEV_VMX
568 bool "Support for VMX cryptographic acceleration instructions"
f1ab4287 569 depends on PPC64 && VSX
d2e3ae6f
LB
570 help
571 Support for VMX cryptographic acceleration instructions.
572
573source "drivers/crypto/vmx/Kconfig"
574
d358f1ab 575config CRYPTO_DEV_IMGTEC_HASH
d358f1ab 576 tristate "Imagination Technologies hardware hash accelerator"
8c98ebd7
GU
577 depends on MIPS || COMPILE_TEST
578 depends on HAS_DMA
d358f1ab
JH
579 select CRYPTO_MD5
580 select CRYPTO_SHA1
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581 select CRYPTO_SHA256
582 select CRYPTO_HASH
583 help
584 This driver interfaces with the Imagination Technologies
585 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
586 hashing algorithms.
587
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588config CRYPTO_DEV_SUN4I_SS
589 tristate "Support for Allwinner Security System cryptographic accelerator"
f823ab93 590 depends on ARCH_SUNXI && !64BIT
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591 select CRYPTO_MD5
592 select CRYPTO_SHA1
593 select CRYPTO_AES
594 select CRYPTO_DES
595 select CRYPTO_BLKCIPHER
596 help
597 Some Allwinner SoC have a crypto accelerator named
598 Security System. Select this if you want to use it.
599 The Security System handle AES/DES/3DES ciphers in CBC mode
600 and SHA1 and MD5 hash algorithms.
601
602 To compile this driver as a module, choose M here: the module
603 will be called sun4i-ss.
604
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605config CRYPTO_DEV_ROCKCHIP
606 tristate "Rockchip's Cryptographic Engine driver"
607 depends on OF && ARCH_ROCKCHIP
608 select CRYPTO_AES
609 select CRYPTO_DES
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610 select CRYPTO_MD5
611 select CRYPTO_SHA1
612 select CRYPTO_SHA256
613 select CRYPTO_HASH
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614 select CRYPTO_BLKCIPHER
615
616 help
617 This driver interfaces with the hardware crypto accelerator.
618 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
619
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620config CRYPTO_DEV_MEDIATEK
621 tristate "MediaTek's EIP97 Cryptographic Engine driver"
c884b368 622 depends on HAS_DMA
7dee9f61 623 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
785e5c61 624 select CRYPTO_AES
d03f7b0d 625 select CRYPTO_AEAD
785e5c61 626 select CRYPTO_BLKCIPHER
d03f7b0d 627 select CRYPTO_CTR
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628 select CRYPTO_SHA1
629 select CRYPTO_SHA256
630 select CRYPTO_SHA512
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631 select CRYPTO_HMAC
632 help
633 This driver allows you to utilize the hardware crypto accelerator
634 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
635 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
636
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637source "drivers/crypto/chelsio/Kconfig"
638
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639source "drivers/crypto/virtio/Kconfig"
640
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641config CRYPTO_DEV_BCM_SPU
642 tristate "Broadcom symmetric crypto/hash acceleration support"
643 depends on ARCH_BCM_IPROC
644 depends on BCM_PDC_MBOX
645 default m
646 select CRYPTO_DES
647 select CRYPTO_MD5
648 select CRYPTO_SHA1
649 select CRYPTO_SHA256
650 select CRYPTO_SHA512
651 help
652 This driver provides support for Broadcom crypto acceleration using the
653 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
654 ahash, and aead algorithms with the kernel cryptographic API.
655
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656source "drivers/crypto/stm32/Kconfig"
657
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658config CRYPTO_DEV_SAFEXCEL
659 tristate "Inside Secure's SafeXcel cryptographic engine driver"
660 depends on HAS_DMA && OF
661 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
662 select CRYPTO_AES
663 select CRYPTO_BLKCIPHER
664 select CRYPTO_HASH
665 select CRYPTO_HMAC
666 select CRYPTO_SHA1
667 select CRYPTO_SHA256
668 select CRYPTO_SHA512
669 help
670 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
671 designed by Inside Secure. Select this if you want to use CBC/ECB
672 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
673 algorithms.
674
b511431d 675endif # CRYPTO_HW