[mirror_ubuntu-jammy-kernel.git] / drivers / crypto / caam / error.c

// SPDX-License-Identifier: GPL-2.0
/*
 * CAAM Error Reporting
 *
 * Copyright 2009-2011 Freescale Semiconductor, Inc.
 */

#include "compat.h"
#include "regs.h"
#include "desc.h"
#include "error.h"

#ifdef DEBUG
#include <linux/highmem.h>

void caam_dump_sg(const char *prefix_str, int prefix_type,
		  int rowsize, int groupsize, struct scatterlist *sg,
		  size_t tlen, bool ascii)
{
	struct scatterlist *it;
	void *it_page;
	size_t len;
	void *buf;

	for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
		/*
		 * make sure the scatterlist's page
		 * has a valid virtual memory mapping
		 */
		it_page = kmap_atomic(sg_page(it));
		if (unlikely(!it_page)) {
			pr_err("caam_dump_sg: kmap failed\n");
			return;
		}

		buf = it_page + it->offset;
		len = min_t(size_t, tlen, it->length);
		print_hex_dump_debug(prefix_str, prefix_type, rowsize,
				     groupsize, buf, len, ascii);
		tlen -= len;

		kunmap_atomic(it_page);
	}
}
#else
void caam_dump_sg(const char *prefix_str, int prefix_type,
		  int rowsize, int groupsize, struct scatterlist *sg,
		  size_t tlen, bool ascii)
{}
#endif /* DEBUG */
EXPORT_SYMBOL(caam_dump_sg);

bool caam_little_end;
EXPORT_SYMBOL(caam_little_end);

bool caam_imx;
EXPORT_SYMBOL(caam_imx);

size_t caam_ptr_sz;
EXPORT_SYMBOL(caam_ptr_sz);

static const struct {
	u8 value;
	const char *error_text;
} desc_error_list[] = {
	{ 0x00, "No error." },
	{ 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
	{ 0x02, "SGT Null Entry Error." },
	{ 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
	{ 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
	{ 0x05, "Reserved." },
	{ 0x06, "Invalid KEY Command" },
	{ 0x07, "Invalid LOAD Command" },
	{ 0x08, "Invalid STORE Command" },
	{ 0x09, "Invalid OPERATION Command" },
	{ 0x0A, "Invalid FIFO LOAD Command" },
	{ 0x0B, "Invalid FIFO STORE Command" },
	{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
	{ 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
	{ 0x0E, "Invalid MATH Command" },
	{ 0x0F, "Invalid SIGNATURE Command" },
	{ 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
	{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
	{ 0x12, "Shared Descriptor Header Error" },
	{ 0x13, "Header Error. Invalid length or parity, or certain other problems." },
	{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
	{ 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
	{ 0x16, "DMA Error" },
	{ 0x17, "Reserved." },
	{ 0x1A, "Job failed due to JR reset" },
	{ 0x1B, "Job failed due to Fail Mode" },
	{ 0x1C, "DECO Watchdog timer timeout error" },
	{ 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
	{ 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
	{ 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
	{ 0x20, "DECO has completed a reset initiated via the DRR register" },
	{ 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
	{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
	{ 0x23, "Read Input Frame error" },
	{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
	{ 0x80, "DNR (do not run) error" },
	{ 0x81, "undefined protocol command" },
	{ 0x82, "invalid setting in PDB" },
	{ 0x83, "Anti-replay LATE error" },
	{ 0x84, "Anti-replay REPLAY error" },
	{ 0x85, "Sequence number overflow" },
	{ 0x86, "Sigver invalid signature" },
	{ 0x87, "DSA Sign Illegal test descriptor" },
	{ 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
	{ 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
	{ 0xC1, "Blob Command error: Undefined mode" },
	{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
	{ 0xC4, "Blob Command error: Black Blob key or input size error" },
	{ 0xC5, "Blob Command error: Invalid key destination" },
	{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
	{ 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
	{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
};

static const struct {
	u8 value;
	const char *error_text;
} qi_error_list[] = {
	{ 0x00, "No error" },
	{ 0x1F, "Job terminated by FQ or ICID flush" },
	{ 0x20, "FD format error"},
	{ 0x21, "FD command format error"},
	{ 0x23, "FL format error"},
	{ 0x25, "CRJD specified in FD, but not enabled in FLC"},
	{ 0x30, "Max. buffer size too small"},
	{ 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
	{ 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
	{ 0x33, "Size over/underflow (allocate mode)"},
	{ 0x34, "Size over/underflow (reuse mode)"},
	{ 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
	{ 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
	{ 0x41, "SBC frame format not supported (allocate mode)"},
	{ 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
	{ 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
	{ 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
	{ 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
	{ 0x46, "Annotation length exceeds offset (reuse mode)"},
	{ 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
	{ 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
	{ 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
	{ 0x51, "Unsupported IF reuse mode"},
	{ 0x52, "Unsupported FL use mode"},
	{ 0x53, "Unsupported RJD use mode"},
	{ 0x54, "Unsupported inline descriptor use mode"},
	{ 0xC0, "Table buffer pool 0 depletion"},
	{ 0xC1, "Table buffer pool 1 depletion"},
	{ 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
	{ 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
	{ 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
	{ 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
	{ 0xD0, "FLC read error"},
	{ 0xD1, "FL read error"},
	{ 0xD2, "FL write error"},
	{ 0xD3, "OF SGT write error"},
	{ 0xD4, "PTA read error"},
	{ 0xD5, "PTA write error"},
	{ 0xD6, "OF SGT F-bit write error"},
	{ 0xD7, "ASA write error"},
	{ 0xE1, "FLC[ICR]=0 ICID error"},
	{ 0xE2, "FLC[ICR]=1 ICID error"},
	{ 0xE4, "source of ICID flush not trusted (BDI = 0)"},
};

static const char * const cha_id_list[] = {
	"",
	"AES",
	"DES",
	"ARC4",
	"MDHA",
	"RNG",
	"SNOW f8",
	"Kasumi f8/9",
	"PKHA",
	"CRCA",
	"SNOW f9",
	"ZUCE",
	"ZUCA",
};

static const char * const err_id_list[] = {
	"No error.",
	"Mode error.",
	"Data size error.",
	"Key size error.",
	"PKHA A memory size error.",
	"PKHA B memory size error.",
	"Data arrived out of sequence error.",
	"PKHA divide-by-zero error.",
	"PKHA modulus even error.",
	"DES key parity error.",
	"ICV check failed.",
	"Hardware error.",
	"Unsupported CCM AAD size.",
	"Class 1 CHA is not reset",
	"Invalid CHA combination was selected",
	"Invalid CHA selected.",
};

static const char * const rng_err_id_list[] = {
	"",
	"",
	"",
	"Instantiate",
	"Not instantiated",
	"Test instantiate",
	"Prediction resistance",
	"Prediction resistance and test request",
	"Uninstantiate",
	"Secure key generation",
	"",
	"Hardware error",
	"Continuous check"
};

static int report_ccb_status(struct device *jrdev, const u32 status,
			     const char *error)
{
	u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
		    JRSTA_CCBERR_CHAID_SHIFT;
	u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
		  JRSTA_DECOERR_INDEX_SHIFT;
	char *idx_str;
	const char *cha_str = "unidentified cha_id value 0x";
	char cha_err_code[3] = { 0 };
	const char *err_str = "unidentified err_id value 0x";
	char err_err_code[3] = { 0 };

	if (status & JRSTA_DECOERR_JUMP)
		idx_str = "jump tgt desc idx";
	else
		idx_str = "desc idx";

	if (cha_id < ARRAY_SIZE(cha_id_list))
		cha_str = cha_id_list[cha_id];
	else
		snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);

	if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
	    err_id < ARRAY_SIZE(rng_err_id_list) &&
	    strlen(rng_err_id_list[err_id])) {
		/* RNG-only error */
		err_str = rng_err_id_list[err_id];
	} else {
		err_str = err_id_list[err_id];
	}

	/*
	 * CCB ICV check failures are part of normal operation life;
	 * we leave the upper layers to do what they want with them.
	 */
	if (err_id == JRSTA_CCBERR_ERRID_ICVCHK)
		return -EBADMSG;

	dev_err_ratelimited(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", status,
			    error, idx_str, idx, cha_str, cha_err_code,
			    err_str, err_err_code);

	return -EINVAL;
}

static int report_jump_status(struct device *jrdev, const u32 status,
			      const char *error)
{
	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
		status, error, __func__);

	return -EINVAL;
}

static int report_deco_status(struct device *jrdev, const u32 status,
			      const char *error)
{
	u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
		  JRSTA_DECOERR_INDEX_SHIFT;
	char *idx_str;
	const char *err_str = "unidentified error value 0x";
	char err_err_code[3] = { 0 };
	int i;

	if (status & JRSTA_DECOERR_JUMP)
		idx_str = "jump tgt desc idx";
	else
		idx_str = "desc idx";

	for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
		if (desc_error_list[i].value == err_id)
			break;

	if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
		err_str = desc_error_list[i].error_text;
	else
		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);

	dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
		status, error, idx_str, idx, err_str, err_err_code);

	return -EINVAL;
}

static int report_qi_status(struct device *qidev, const u32 status,
			    const char *error)
{
	u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
	const char *err_str = "unidentified error value 0x";
	char err_err_code[3] = { 0 };
	int i;

	for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
		if (qi_error_list[i].value == err_id)
			break;

	if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
		err_str = qi_error_list[i].error_text;
	else
		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);

	dev_err(qidev, "%08x: %s: %s%s\n",
		status, error, err_str, err_err_code);

	return -EINVAL;
}

static int report_jr_status(struct device *jrdev, const u32 status,
			    const char *error)
{
	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
		status, error, __func__);

	return -EINVAL;
}

static int report_cond_code_status(struct device *jrdev, const u32 status,
				   const char *error)
{
	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
		status, error, __func__);

	return -EINVAL;
}

int caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
{
	static const struct stat_src {
		int (*report_ssed)(struct device *jrdev, const u32 status,
				   const char *error);
		const char *error;
	} status_src[16] = {
		{ NULL, "No error" },
		{ NULL, NULL },
		{ report_ccb_status, "CCB" },
		{ report_jump_status, "Jump" },
		{ report_deco_status, "DECO" },
		{ report_qi_status, "Queue Manager Interface" },
		{ report_jr_status, "Job Ring" },
		{ report_cond_code_status, "Condition Code" },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
		{ NULL, NULL },
	};
	u32 ssrc = status >> JRSTA_SSRC_SHIFT;
	const char *error = status_src[ssrc].error;

	/*
	 * If there is an error handling function, call it to report the error.
	 * Otherwise print the error source name.
	 */
	if (status_src[ssrc].report_ssed)
		return status_src[ssrc].report_ssed(jrdev, status, error);

	if (error)
		dev_err(jrdev, "%d: %s\n", ssrc, error);
	else
		dev_err(jrdev, "%d: unknown error source\n", ssrc);

	return -EINVAL;
}
EXPORT_SYMBOL(caam_strstatus);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("FSL CAAM error reporting");
MODULE_AUTHOR("Freescale Semiconductor");
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
8e8ec596 KP	2	/*
	3	* CAAM Error Reporting
	4	*
	5	* Copyright 2009-2011 Freescale Semiconductor, Inc.
	6	*/
	7
	8	#include "compat.h"
	9	#include "regs.h"
8e8ec596	10	#include "desc.h"
8e8ec596 KP	11	#include "error.h"
8e8ec596 KP	12
972b812b HG	13	#ifdef DEBUG
	14	#include <linux/highmem.h>
	15
8a82451b	16	void caam_dump_sg(const char *prefix_str, int prefix_type,
972b812b HG	17	int rowsize, int groupsize, struct scatterlist *sg,
	18	size_t tlen, bool ascii)
	19	{
	20	struct scatterlist *it;
	21	void *it_page;
	22	size_t len;
	23	void *buf;
	24
8c65d354	25	for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
972b812b HG	26	/*
	27	* make sure the scatterlist's page
	28	* has a valid virtual memory mapping
	29	*/
	30	it_page = kmap_atomic(sg_page(it));
	31	if (unlikely(!it_page)) {
	32	pr_err("caam_dump_sg: kmap failed\n");
	33	return;
	34	}
	35
	36	buf = it_page + it->offset;
	37	len = min_t(size_t, tlen, it->length);
8a82451b SH	38	print_hex_dump_debug(prefix_str, prefix_type, rowsize,
8a82451b SH	39	groupsize, buf, len, ascii);
972b812b HG	40	tlen -= len;
	41
	42	kunmap_atomic(it_page);
	43	}
	44	}
	45	#else
8a82451b	46	void caam_dump_sg(const char *prefix_str, int prefix_type,
972b812b HG	47	int rowsize, int groupsize, struct scatterlist *sg,
	48	size_t tlen, bool ascii)
	49	{}
	50	#endif /* DEBUG */
	51	EXPORT_SYMBOL(caam_dump_sg);
	52
5b3b9871 HG	53	bool caam_little_end;
	54	EXPORT_SYMBOL(caam_little_end);
	55
	56	bool caam_imx;
	57	EXPORT_SYMBOL(caam_imx);
	58
1a3daadc AS	59	size_t caam_ptr_sz;
	60	EXPORT_SYMBOL(caam_ptr_sz);
	61
9724d7ad MV	62	static const struct {
9724d7ad MV	63	u8 value;
e397ee0f	64	const char *error_text;
9724d7ad MV	65	} desc_error_list[] = {
9724d7ad MV	66	{ 0x00, "No error." },
da37503d	67	{ 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
9724d7ad	68	{ 0x02, "SGT Null Entry Error." },
da37503d MV	69	{ 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
da37503d MV	70	{ 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
9724d7ad MV	71	{ 0x05, "Reserved." },
	72	{ 0x06, "Invalid KEY Command" },
	73	{ 0x07, "Invalid LOAD Command" },
	74	{ 0x08, "Invalid STORE Command" },
	75	{ 0x09, "Invalid OPERATION Command" },
	76	{ 0x0A, "Invalid FIFO LOAD Command" },
	77	{ 0x0B, "Invalid FIFO STORE Command" },
	78	{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
da37503d	79	{ 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
9724d7ad MV	80	{ 0x0E, "Invalid MATH Command" },
9724d7ad MV	81	{ 0x0F, "Invalid SIGNATURE Command" },
da37503d	82	{ 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
9724d7ad MV	83	{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
9724d7ad MV	84	{ 0x12, "Shared Descriptor Header Error" },
da37503d MV	85	{ 0x13, "Header Error. Invalid length or parity, or certain other problems." },
	86	{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
	87	{ 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
9724d7ad MV	88	{ 0x16, "DMA Error" },
	89	{ 0x17, "Reserved." },
	90	{ 0x1A, "Job failed due to JR reset" },
	91	{ 0x1B, "Job failed due to Fail Mode" },
	92	{ 0x1C, "DECO Watchdog timer timeout error" },
da37503d MV	93	{ 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
	94	{ 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
	95	{ 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
	96	{ 0x20, "DECO has completed a reset initiated via the DRR register" },
	97	{ 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
	98	{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
9724d7ad MV	99	{ 0x23, "Read Input Frame error" },
	100	{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
	101	{ 0x80, "DNR (do not run) error" },
	102	{ 0x81, "undefined protocol command" },
	103	{ 0x82, "invalid setting in PDB" },
	104	{ 0x83, "Anti-replay LATE error" },
	105	{ 0x84, "Anti-replay REPLAY error" },
	106	{ 0x85, "Sequence number overflow" },
	107	{ 0x86, "Sigver invalid signature" },
	108	{ 0x87, "DSA Sign Illegal test descriptor" },
da37503d MV	109	{ 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
da37503d MV	110	{ 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
9724d7ad MV	111	{ 0xC1, "Blob Command error: Undefined mode" },
9724d7ad MV	112	{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
da37503d	113	{ 0xC4, "Blob Command error: Black Blob key or input size error" },
9724d7ad MV	114	{ 0xC5, "Blob Command error: Invalid key destination" },
9724d7ad MV	115	{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
da37503d	116	{ 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
9724d7ad MV	117	{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
	118	};
	119
94cebd9d HG	120	static const struct {
	121	u8 value;
	122	const char *error_text;
	123	} qi_error_list[] = {
51fab3d7	124	{ 0x00, "No error" },
94cebd9d HG	125	{ 0x1F, "Job terminated by FQ or ICID flush" },
	126	{ 0x20, "FD format error"},
	127	{ 0x21, "FD command format error"},
	128	{ 0x23, "FL format error"},
	129	{ 0x25, "CRJD specified in FD, but not enabled in FLC"},
	130	{ 0x30, "Max. buffer size too small"},
	131	{ 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
	132	{ 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
	133	{ 0x33, "Size over/underflow (allocate mode)"},
	134	{ 0x34, "Size over/underflow (reuse mode)"},
	135	{ 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
	136	{ 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
	137	{ 0x41, "SBC frame format not supported (allocate mode)"},
	138	{ 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
	139	{ 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
	140	{ 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
	141	{ 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
	142	{ 0x46, "Annotation length exceeds offset (reuse mode)"},
	143	{ 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
	144	{ 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
6ddc8e31	145	{ 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
94cebd9d HG	146	{ 0x51, "Unsupported IF reuse mode"},
	147	{ 0x52, "Unsupported FL use mode"},
	148	{ 0x53, "Unsupported RJD use mode"},
	149	{ 0x54, "Unsupported inline descriptor use mode"},
	150	{ 0xC0, "Table buffer pool 0 depletion"},
	151	{ 0xC1, "Table buffer pool 1 depletion"},
	152	{ 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
	153	{ 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
	154	{ 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
	155	{ 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
	156	{ 0xD0, "FLC read error"},
	157	{ 0xD1, "FL read error"},
	158	{ 0xD2, "FL write error"},
	159	{ 0xD3, "OF SGT write error"},
	160	{ 0xD4, "PTA read error"},
	161	{ 0xD5, "PTA write error"},
	162	{ 0xD6, "OF SGT F-bit write error"},
	163	{ 0xD7, "ASA write error"},
	164	{ 0xE1, "FLC[ICR]=0 ICID error"},
	165	{ 0xE2, "FLC[ICR]=1 ICID error"},
	166	{ 0xE4, "source of ICID flush not trusted (BDI = 0)"},
	167	};
	168
9724d7ad MV	169	static const char * const cha_id_list[] = {
	170	"",
	171	"AES",
	172	"DES",
	173	"ARC4",
	174	"MDHA",
	175	"RNG",
	176	"SNOW f8",
	177	"Kasumi f8/9",
	178	"PKHA",
	179	"CRCA",
	180	"SNOW f9",
	181	"ZUCE",
	182	"ZUCA",
	183	};
	184
	185	static const char * const err_id_list[] = {
	186	"No error.",
	187	"Mode error.",
	188	"Data size error.",
	189	"Key size error.",
	190	"PKHA A memory size error.",
	191	"PKHA B memory size error.",
	192	"Data arrived out of sequence error.",
	193	"PKHA divide-by-zero error.",
	194	"PKHA modulus even error.",
	195	"DES key parity error.",
	196	"ICV check failed.",
	197	"Hardware error.",
	198	"Unsupported CCM AAD size.",
	199	"Class 1 CHA is not reset",
	200	"Invalid CHA combination was selected",
	201	"Invalid CHA selected.",
	202	};
	203
	204	static const char * const rng_err_id_list[] = {
	205	"",
	206	"",
	207	"",
	208	"Instantiate",
	209	"Not instantiated",
	210	"Test instantiate",
	211	"Prediction resistance",
	212	"Prediction resistance and test request",
	213	"Uninstantiate",
	214	"Secure key generation",
ee0a6de9 HG	215	"",
	216	"Hardware error",
	217	"Continuous check"
9724d7ad MV	218	};
9724d7ad MV	219
1984aaee HG	220	static int report_ccb_status(struct device *jrdev, const u32 status,
1984aaee HG	221	const char *error)
8e8ec596	222	{
8e8ec596 KP	223	u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
	224	JRSTA_CCBERR_CHAID_SHIFT;
	225	u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
526243cc MV	226	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
526243cc MV	227	JRSTA_DECOERR_INDEX_SHIFT;
1e16322d MV	228	char *idx_str;
	229	const char *cha_str = "unidentified cha_id value 0x";
	230	char cha_err_code[3] = { 0 };
	231	const char *err_str = "unidentified err_id value 0x";
	232	char err_err_code[3] = { 0 };
8a475826	233
526243cc	234	if (status & JRSTA_DECOERR_JUMP)
1e16322d	235	idx_str = "jump tgt desc idx";
526243cc	236	else
1e16322d	237	idx_str = "desc idx";
526243cc	238
1e16322d MV	239	if (cha_id < ARRAY_SIZE(cha_id_list))
	240	cha_str = cha_id_list[cha_id];
	241	else
	242	snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
8e8ec596	243
281922a1 KP	244	if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
	245	err_id < ARRAY_SIZE(rng_err_id_list) &&
	246	strlen(rng_err_id_list[err_id])) {
	247	/* RNG-only error */
1e16322d	248	err_str = rng_err_id_list[err_id];
9305dff7	249	} else {
1e16322d	250	err_str = err_id_list[err_id];
9305dff7	251	}
e75880dd	252
3f80be02 KP	253	/*
	254	* CCB ICV check failures are part of normal operation life;
	255	* we leave the upper layers to do what they want with them.
	256	*/
1984aaee HG	257	if (err_id == JRSTA_CCBERR_ERRID_ICVCHK)
	258	return -EBADMSG;
	259
	260	dev_err_ratelimited(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", status,
	261	error, idx_str, idx, cha_str, cha_err_code,
	262	err_str, err_err_code);
	263
	264	return -EINVAL;
8e8ec596 KP	265	}
8e8ec596 KP	266
1984aaee HG	267	static int report_jump_status(struct device *jrdev, const u32 status,
1984aaee HG	268	const char *error)
8e8ec596	269	{
e75880dd MV	270	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
e75880dd MV	271	status, error, __func__);
1984aaee HG	272
1984aaee HG	273	return -EINVAL;
8e8ec596 KP	274	}
8e8ec596 KP	275
1984aaee HG	276	static int report_deco_status(struct device *jrdev, const u32 status,
1984aaee HG	277	const char *error)
8e8ec596	278	{
4f0fa52a	279	u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
526243cc MV	280	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
526243cc MV	281	JRSTA_DECOERR_INDEX_SHIFT;
4f0fa52a	282	char *idx_str;
e397ee0f	283	const char *err_str = "unidentified error value 0x";
4f0fa52a	284	char err_err_code[3] = { 0 };
8e8ec596 KP	285	int i;
8e8ec596 KP	286
526243cc	287	if (status & JRSTA_DECOERR_JUMP)
4f0fa52a	288	idx_str = "jump tgt desc idx";
526243cc	289	else
4f0fa52a	290	idx_str = "desc idx";
8e8ec596	291
6d00376a	292	for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
4f0fa52a	293	if (desc_error_list[i].value == err_id)
8e8ec596 KP	294	break;
8e8ec596 KP	295
4f0fa52a MV	296	if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
	297	err_str = desc_error_list[i].error_text;
	298	else
	299	snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
e75880dd	300
4f0fa52a MV	301	dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
4f0fa52a MV	302	status, error, idx_str, idx, err_str, err_err_code);
1984aaee HG	303
1984aaee HG	304	return -EINVAL;
8e8ec596 KP	305	}
8e8ec596 KP	306
1984aaee HG	307	static int report_qi_status(struct device *qidev, const u32 status,
1984aaee HG	308	const char *error)
94cebd9d HG	309	{
	310	u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
	311	const char *err_str = "unidentified error value 0x";
	312	char err_err_code[3] = { 0 };
	313	int i;
	314
	315	for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
	316	if (qi_error_list[i].value == err_id)
	317	break;
	318
	319	if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
	320	err_str = qi_error_list[i].error_text;
	321	else
	322	snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
	323
	324	dev_err(qidev, "%08x: %s: %s%s\n",
	325	status, error, err_str, err_err_code);
1984aaee HG	326
1984aaee HG	327	return -EINVAL;
94cebd9d HG	328	}
94cebd9d HG	329
1984aaee HG	330	static int report_jr_status(struct device *jrdev, const u32 status,
1984aaee HG	331	const char *error)
8e8ec596	332	{
e75880dd MV	333	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
e75880dd MV	334	status, error, __func__);
1984aaee HG	335
1984aaee HG	336	return -EINVAL;
8e8ec596 KP	337	}
8e8ec596 KP	338
1984aaee HG	339	static int report_cond_code_status(struct device *jrdev, const u32 status,
1984aaee HG	340	const char *error)
8e8ec596	341	{
e75880dd MV	342	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
e75880dd MV	343	status, error, __func__);
1984aaee HG	344
1984aaee HG	345	return -EINVAL;
8e8ec596 KP	346	}
8e8ec596 KP	347
1984aaee	348	int caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
8e8ec596	349	{
96aef9a8	350	static const struct stat_src {
1984aaee HG	351	int (report_ssed)(struct device jrdev, const u32 status,
1984aaee HG	352	const char *error);
8a475826	353	const char *error;
49783d0f	354	} status_src[16] = {
8e8ec596 KP	355	{ NULL, "No error" },
	356	{ NULL, NULL },
	357	{ report_ccb_status, "CCB" },
	358	{ report_jump_status, "Jump" },
	359	{ report_deco_status, "DECO" },
94cebd9d	360	{ report_qi_status, "Queue Manager Interface" },
8e8ec596 KP	361	{ report_jr_status, "Job Ring" },
8e8ec596 KP	362	{ report_cond_code_status, "Condition Code" },
49783d0f CS	363	{ NULL, NULL },
	364	{ NULL, NULL },
	365	{ NULL, NULL },
	366	{ NULL, NULL },
	367	{ NULL, NULL },
	368	{ NULL, NULL },
	369	{ NULL, NULL },
	370	{ NULL, NULL },
8e8ec596 KP	371	};
8e8ec596 KP	372	u32 ssrc = status >> JRSTA_SSRC_SHIFT;
e397ee0f	373	const char *error = status_src[ssrc].error;
8e8ec596	374
867e1ee3	375	/*
49783d0f CS	376	* If there is an error handling function, call it to report the error.
49783d0f CS	377	* Otherwise print the error source name.
867e1ee3	378	*/
49783d0f	379	if (status_src[ssrc].report_ssed)
1984aaee HG	380	return status_src[ssrc].report_ssed(jrdev, status, error);
	381
	382	if (error)
49783d0f CS	383	dev_err(jrdev, "%d: %s\n", ssrc, error);
	384	else
	385	dev_err(jrdev, "%d: unknown error source\n", ssrc);
1984aaee HG	386
1984aaee HG	387	return -EINVAL;
8e8ec596	388	}
94cebd9d	389	EXPORT_SYMBOL(caam_strstatus);
8d818c10 HG	390
	391	MODULE_LICENSE("GPL");
	392	MODULE_DESCRIPTION("FSL CAAM error reporting");
	393	MODULE_AUTHOR("Freescale Semiconductor");