[mirror_ubuntu-jammy-kernel.git] / drivers / crypto / nx / nx-aes-gcm.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * AES GCM routines supporting the Power 7+ Nest Accelerators driver
 *
 * Copyright (C) 2012 International Business Machines Inc.
 *
 * Author: Kent Yoder <yoder1@us.ibm.com>
 */

#include <crypto/internal/aead.h>
#include <crypto/aes.h>
#include <crypto/algapi.h>
#include <crypto/gcm.h>
#include <crypto/scatterwalk.h>
#include <linux/module.h>
#include <linux/types.h>
#include <asm/vio.h>

#include "nx_csbcpb.h"
#include "nx.h"


static int gcm_aes_nx_set_key(struct crypto_aead *tfm,
			      const u8           *in_key,
			      unsigned int        key_len)
{
	struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;

	nx_ctx_init(nx_ctx, HCOP_FC_AES);

	switch (key_len) {
	case AES_KEYSIZE_128:
		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);
		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
		break;
	case AES_KEYSIZE_192:
		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_192);
		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
		break;
	case AES_KEYSIZE_256:
		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_256);
		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
		break;
	default:
		return -EINVAL;
	}

	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
	memcpy(csbcpb->cpb.aes_gcm.key, in_key, key_len);

	csbcpb_aead->cpb.hdr.mode = NX_MODE_AES_GCA;
	memcpy(csbcpb_aead->cpb.aes_gca.key, in_key, key_len);

	return 0;
}

static int gcm4106_aes_nx_set_key(struct crypto_aead *tfm,
				  const u8           *in_key,
				  unsigned int        key_len)
{
	struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
	char *nonce = nx_ctx->priv.gcm.nonce;
	int rc;

	if (key_len < 4)
		return -EINVAL;

	key_len -= 4;

	rc = gcm_aes_nx_set_key(tfm, in_key, key_len);
	if (rc)
		goto out;

	memcpy(nonce, in_key + key_len, 4);
out:
	return rc;
}

static int gcm4106_aes_nx_setauthsize(struct crypto_aead *tfm,
				      unsigned int authsize)
{
	switch (authsize) {
	case 8:
	case 12:
	case 16:
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int nx_gca(struct nx_crypto_ctx  *nx_ctx,
		  struct aead_request   *req,
		  u8                    *out,
		  unsigned int assoclen)
{
	int rc;
	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
	struct scatter_walk walk;
	struct nx_sg *nx_sg = nx_ctx->in_sg;
	unsigned int nbytes = assoclen;
	unsigned int processed = 0, to_process;
	unsigned int max_sg_len;

	if (nbytes <= AES_BLOCK_SIZE) {
		scatterwalk_start(&walk, req->src);
		scatterwalk_copychunks(out, &walk, nbytes, SCATTERWALK_FROM_SG);
		scatterwalk_done(&walk, SCATTERWALK_FROM_SG, 0);
		return 0;
	}

	NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_CONTINUATION;

	/* page_limit: number of sg entries that fit on one page */
	max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
			   nx_ctx->ap->sglen);
	max_sg_len = min_t(u64, max_sg_len,
			   nx_ctx->ap->databytelen/NX_PAGE_SIZE);

	do {
		/*
		 * to_process: the data chunk to process in this update.
		 * This value is bound by sg list limits.
		 */
		to_process = min_t(u64, nbytes - processed,
				   nx_ctx->ap->databytelen);
		to_process = min_t(u64, to_process,
				   NX_PAGE_SIZE * (max_sg_len - 1));

		nx_sg = nx_walk_and_build(nx_ctx->in_sg, max_sg_len,
					  req->src, processed, &to_process);

		if ((to_process + processed) < nbytes)
			NX_CPB_FDM(csbcpb_aead) |= NX_FDM_INTERMEDIATE;
		else
			NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_INTERMEDIATE;

		nx_ctx->op_aead.inlen = (nx_ctx->in_sg - nx_sg)
					* sizeof(struct nx_sg);

		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op_aead,
				req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
		if (rc)
			return rc;

		memcpy(csbcpb_aead->cpb.aes_gca.in_pat,
				csbcpb_aead->cpb.aes_gca.out_pat,
				AES_BLOCK_SIZE);
		NX_CPB_FDM(csbcpb_aead) |= NX_FDM_CONTINUATION;

		atomic_inc(&(nx_ctx->stats->aes_ops));
		atomic64_add(assoclen, &(nx_ctx->stats->aes_bytes));

		processed += to_process;
	} while (processed < nbytes);

	memcpy(out, csbcpb_aead->cpb.aes_gca.out_pat, AES_BLOCK_SIZE);

	return rc;
}

static int gmac(struct aead_request *req, const u8 *iv, unsigned int assoclen)
{
	int rc;
	struct nx_crypto_ctx *nx_ctx =
		crypto_aead_ctx(crypto_aead_reqtfm(req));
	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
	struct nx_sg *nx_sg;
	unsigned int nbytes = assoclen;
	unsigned int processed = 0, to_process;
	unsigned int max_sg_len;

	/* Set GMAC mode */
	csbcpb->cpb.hdr.mode = NX_MODE_AES_GMAC;

	NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;

	/* page_limit: number of sg entries that fit on one page */
	max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
			   nx_ctx->ap->sglen);
	max_sg_len = min_t(u64, max_sg_len,
			   nx_ctx->ap->databytelen/NX_PAGE_SIZE);

	/* Copy IV */
	memcpy(csbcpb->cpb.aes_gcm.iv_or_cnt, iv, AES_BLOCK_SIZE);

	do {
		/*
		 * to_process: the data chunk to process in this update.
		 * This value is bound by sg list limits.
		 */
		to_process = min_t(u64, nbytes - processed,
				   nx_ctx->ap->databytelen);
		to_process = min_t(u64, to_process,
				   NX_PAGE_SIZE * (max_sg_len - 1));

		nx_sg = nx_walk_and_build(nx_ctx->in_sg, max_sg_len,
					  req->src, processed, &to_process);

		if ((to_process + processed) < nbytes)
			NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
		else
			NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;

		nx_ctx->op.inlen = (nx_ctx->in_sg - nx_sg)
					* sizeof(struct nx_sg);

		csbcpb->cpb.aes_gcm.bit_length_data = 0;
		csbcpb->cpb.aes_gcm.bit_length_aad = 8 * nbytes;

		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
				req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
		if (rc)
			goto out;

		memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
			csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
		memcpy(csbcpb->cpb.aes_gcm.in_s0,
			csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);

		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;

		atomic_inc(&(nx_ctx->stats->aes_ops));
		atomic64_add(assoclen, &(nx_ctx->stats->aes_bytes));

		processed += to_process;
	} while (processed < nbytes);

out:
	/* Restore GCM mode */
	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
	return rc;
}

static int gcm_empty(struct aead_request *req, const u8 *iv, int enc)
{
	int rc;
	struct nx_crypto_ctx *nx_ctx =
		crypto_aead_ctx(crypto_aead_reqtfm(req));
	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
	char out[AES_BLOCK_SIZE];
	struct nx_sg *in_sg, *out_sg;
	int len;

	/* For scenarios where the input message is zero length, AES CTR mode
	 * may be used. Set the source data to be a single block (16B) of all
	 * zeros, and set the input IV value to be the same as the GMAC IV
	 * value. - nx_wb 4.8.1.3 */

	/* Change to ECB mode */
	csbcpb->cpb.hdr.mode = NX_MODE_AES_ECB;
	memcpy(csbcpb->cpb.aes_ecb.key, csbcpb->cpb.aes_gcm.key,
			sizeof(csbcpb->cpb.aes_ecb.key));
	if (enc)
		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
	else
		NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;

	len = AES_BLOCK_SIZE;

	/* Encrypt the counter/IV */
	in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *) iv,
				 &len, nx_ctx->ap->sglen);

	if (len != AES_BLOCK_SIZE)
		return -EINVAL;

	len = sizeof(out);
	out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *) out, &len,
				  nx_ctx->ap->sglen);

	if (len != sizeof(out))
		return -EINVAL;

	nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
	nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);

	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
			   req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
	if (rc)
		goto out;
	atomic_inc(&(nx_ctx->stats->aes_ops));

	/* Copy out the auth tag */
	memcpy(csbcpb->cpb.aes_gcm.out_pat_or_mac, out,
			crypto_aead_authsize(crypto_aead_reqtfm(req)));
out:
	/* Restore XCBC mode */
	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;

	/*
	 * ECB key uses the same region that GCM AAD and counter, so it's safe
	 * to just fill it with zeroes.
	 */
	memset(csbcpb->cpb.aes_ecb.key, 0, sizeof(csbcpb->cpb.aes_ecb.key));

	return rc;
}

static int gcm_aes_nx_crypt(struct aead_request *req, int enc,
			    unsigned int assoclen)
{
	struct nx_crypto_ctx *nx_ctx =
		crypto_aead_ctx(crypto_aead_reqtfm(req));
	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
	unsigned int nbytes = req->cryptlen;
	unsigned int processed = 0, to_process;
	unsigned long irq_flags;
	int rc = -EINVAL;

	spin_lock_irqsave(&nx_ctx->lock, irq_flags);

	/* initialize the counter */
	*(u32 *)&rctx->iv[NX_GCM_CTR_OFFSET] = 1;

	if (nbytes == 0) {
		if (assoclen == 0)
			rc = gcm_empty(req, rctx->iv, enc);
		else
			rc = gmac(req, rctx->iv, assoclen);
		if (rc)
			goto out;
		else
			goto mac;
	}

	/* Process associated data */
	csbcpb->cpb.aes_gcm.bit_length_aad = assoclen * 8;
	if (assoclen) {
		rc = nx_gca(nx_ctx, req, csbcpb->cpb.aes_gcm.in_pat_or_aad,
			    assoclen);
		if (rc)
			goto out;
	}

	/* Set flags for encryption */
	NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
	if (enc) {
		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
	} else {
		NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
		nbytes -= crypto_aead_authsize(crypto_aead_reqtfm(req));
	}

	do {
		to_process = nbytes - processed;

		csbcpb->cpb.aes_gcm.bit_length_data = nbytes * 8;
		rc = nx_build_sg_lists(nx_ctx, rctx->iv, req->dst,
				       req->src, &to_process,
				       processed + req->assoclen,
				       csbcpb->cpb.aes_gcm.iv_or_cnt);

		if (rc)
			goto out;

		if ((to_process + processed) < nbytes)
			NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
		else
			NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;


		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
				   req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
		if (rc)
			goto out;

		memcpy(rctx->iv, csbcpb->cpb.aes_gcm.out_cnt, AES_BLOCK_SIZE);
		memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
			csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
		memcpy(csbcpb->cpb.aes_gcm.in_s0,
			csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);

		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;

		atomic_inc(&(nx_ctx->stats->aes_ops));
		atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
			     &(nx_ctx->stats->aes_bytes));

		processed += to_process;
	} while (processed < nbytes);

mac:
	if (enc) {
		/* copy out the auth tag */
		scatterwalk_map_and_copy(
			csbcpb->cpb.aes_gcm.out_pat_or_mac,
			req->dst, req->assoclen + nbytes,
			crypto_aead_authsize(crypto_aead_reqtfm(req)),
			SCATTERWALK_TO_SG);
	} else {
		u8 *itag = nx_ctx->priv.gcm.iauth_tag;
		u8 *otag = csbcpb->cpb.aes_gcm.out_pat_or_mac;

		scatterwalk_map_and_copy(
			itag, req->src, req->assoclen + nbytes,
			crypto_aead_authsize(crypto_aead_reqtfm(req)),
			SCATTERWALK_FROM_SG);
		rc = crypto_memneq(itag, otag,
			    crypto_aead_authsize(crypto_aead_reqtfm(req))) ?
		     -EBADMSG : 0;
	}
out:
	spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
	return rc;
}

static int gcm_aes_nx_encrypt(struct aead_request *req)
{
	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
	char *iv = rctx->iv;

	memcpy(iv, req->iv, GCM_AES_IV_SIZE);

	return gcm_aes_nx_crypt(req, 1, req->assoclen);
}

static int gcm_aes_nx_decrypt(struct aead_request *req)
{
	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
	char *iv = rctx->iv;

	memcpy(iv, req->iv, GCM_AES_IV_SIZE);

	return gcm_aes_nx_crypt(req, 0, req->assoclen);
}

static int gcm4106_aes_nx_encrypt(struct aead_request *req)
{
	struct nx_crypto_ctx *nx_ctx =
		crypto_aead_ctx(crypto_aead_reqtfm(req));
	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
	char *iv = rctx->iv;
	char *nonce = nx_ctx->priv.gcm.nonce;

	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);

	if (req->assoclen < 8)
		return -EINVAL;

	return gcm_aes_nx_crypt(req, 1, req->assoclen - 8);
}

static int gcm4106_aes_nx_decrypt(struct aead_request *req)
{
	struct nx_crypto_ctx *nx_ctx =
		crypto_aead_ctx(crypto_aead_reqtfm(req));
	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
	char *iv = rctx->iv;
	char *nonce = nx_ctx->priv.gcm.nonce;

	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);

	if (req->assoclen < 8)
		return -EINVAL;

	return gcm_aes_nx_crypt(req, 0, req->assoclen - 8);
}

struct aead_alg nx_gcm_aes_alg = {
	.base = {
		.cra_name        = "gcm(aes)",
		.cra_driver_name = "gcm-aes-nx",
		.cra_priority    = 300,
		.cra_blocksize   = 1,
		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
		.cra_module      = THIS_MODULE,
	},
	.init        = nx_crypto_ctx_aes_gcm_init,
	.exit        = nx_crypto_ctx_aead_exit,
	.ivsize      = GCM_AES_IV_SIZE,
	.maxauthsize = AES_BLOCK_SIZE,
	.setkey      = gcm_aes_nx_set_key,
	.encrypt     = gcm_aes_nx_encrypt,
	.decrypt     = gcm_aes_nx_decrypt,
};

struct aead_alg nx_gcm4106_aes_alg = {
	.base = {
		.cra_name        = "rfc4106(gcm(aes))",
		.cra_driver_name = "rfc4106-gcm-aes-nx",
		.cra_priority    = 300,
		.cra_blocksize   = 1,
		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
		.cra_module      = THIS_MODULE,
	},
	.init        = nx_crypto_ctx_aes_gcm_init,
	.exit        = nx_crypto_ctx_aead_exit,
	.ivsize      = GCM_RFC4106_IV_SIZE,
	.maxauthsize = AES_BLOCK_SIZE,
	.setkey      = gcm4106_aes_nx_set_key,
	.setauthsize = gcm4106_aes_nx_setauthsize,
	.encrypt     = gcm4106_aes_nx_encrypt,
	.decrypt     = gcm4106_aes_nx_decrypt,
};
Commit	Line	Data
64d85cc9	1	// SPDX-License-Identifier: GPL-2.0-only
10cb823b	2	/*
f2a15f1d KY	3	* AES GCM routines supporting the Power 7+ Nest Accelerators driver
	4	*
	5	* Copyright (C) 2012 International Business Machines Inc.
	6	*
f2a15f1d KY	7	* Author: Kent Yoder <yoder1@us.ibm.com>
	8	*/
	9
	10	#include <crypto/internal/aead.h>
	11	#include <crypto/aes.h>
cb8affb5	12	#include <crypto/algapi.h>
fdd0f3d8	13	#include <crypto/gcm.h>
f2a15f1d KY	14	#include <crypto/scatterwalk.h>
	15	#include <linux/module.h>
	16	#include <linux/types.h>
f2a15f1d KY	17	#include <asm/vio.h>
	18
	19	#include "nx_csbcpb.h"
	20	#include "nx.h"
	21
	22
	23	static int gcm_aes_nx_set_key(struct crypto_aead *tfm,
	24	const u8 *in_key,
	25	unsigned int key_len)
	26	{
c3d21949	27	struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
f2a15f1d KY	28	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
	29	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
	30
	31	nx_ctx_init(nx_ctx, HCOP_FC_AES);
	32
	33	switch (key_len) {
	34	case AES_KEYSIZE_128:
	35	NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
	36	NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);
	37	nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
	38	break;
	39	case AES_KEYSIZE_192:
	40	NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
	41	NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_192);
	42	nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
	43	break;
	44	case AES_KEYSIZE_256:
	45	NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
	46	NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_256);
	47	nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
	48	break;
	49	default:
	50	return -EINVAL;
	51	}
	52
	53	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
	54	memcpy(csbcpb->cpb.aes_gcm.key, in_key, key_len);
	55
	56	csbcpb_aead->cpb.hdr.mode = NX_MODE_AES_GCA;
	57	memcpy(csbcpb_aead->cpb.aes_gca.key, in_key, key_len);
	58
	59	return 0;
	60	}
	61
	62	static int gcm4106_aes_nx_set_key(struct crypto_aead *tfm,
	63	const u8 *in_key,
	64	unsigned int key_len)
	65	{
c3d21949	66	struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
f2a15f1d KY	67	char *nonce = nx_ctx->priv.gcm.nonce;
	68	int rc;
	69
	70	if (key_len < 4)
	71	return -EINVAL;
	72
	73	key_len -= 4;
	74
	75	rc = gcm_aes_nx_set_key(tfm, in_key, key_len);
	76	if (rc)
	77	goto out;
	78
	79	memcpy(nonce, in_key + key_len, 4);
	80	out:
	81	return rc;
	82	}
	83
f2a15f1d KY	84	static int gcm4106_aes_nx_setauthsize(struct crypto_aead *tfm,
	85	unsigned int authsize)
	86	{
	87	switch (authsize) {
	88	case 8:
	89	case 12:
	90	case 16:
	91	break;
	92	default:
	93	return -EINVAL;
	94	}
	95
f2a15f1d KY	96	return 0;
	97	}
	98
	99	static int nx_gca(struct nx_crypto_ctx *nx_ctx,
	100	struct aead_request *req,
c3d21949 HX	101	u8 *out,
c3d21949 HX	102	unsigned int assoclen)
f2a15f1d	103	{
79980434	104	int rc;
f2a15f1d	105	struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
f2a15f1d KY	106	struct scatter_walk walk;
f2a15f1d KY	107	struct nx_sg *nx_sg = nx_ctx->in_sg;
c3d21949	108	unsigned int nbytes = assoclen;
79980434	109	unsigned int processed = 0, to_process;
e13a79ac	110	unsigned int max_sg_len;
f2a15f1d	111
79980434	112	if (nbytes <= AES_BLOCK_SIZE) {
201f28f0	113	scatterwalk_start(&walk, req->src);
79980434	114	scatterwalk_copychunks(out, &walk, nbytes, SCATTERWALK_FROM_SG);
f2a15f1d	115	scatterwalk_done(&walk, SCATTERWALK_FROM_SG, 0);
79980434	116	return 0;
f2a15f1d KY	117	}
f2a15f1d KY	118
79980434	119	NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_CONTINUATION;
f2a15f1d	120
79980434	121	/* page_limit: number of sg entries that fit on one page */
e13a79ac	122	max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
79980434	123	nx_ctx->ap->sglen);
e13a79ac LB	124	max_sg_len = min_t(u64, max_sg_len,
e13a79ac LB	125	nx_ctx->ap->databytelen/NX_PAGE_SIZE);
f2a15f1d	126
79980434 MC	127	do {
	128	/*
	129	* to_process: the data chunk to process in this update.
	130	* This value is bound by sg list limits.
	131	*/
	132	to_process = min_t(u64, nbytes - processed,
	133	nx_ctx->ap->databytelen);
	134	to_process = min_t(u64, to_process,
	135	NX_PAGE_SIZE * (max_sg_len - 1));
	136
e13a79ac	137	nx_sg = nx_walk_and_build(nx_ctx->in_sg, max_sg_len,
201f28f0	138	req->src, processed, &to_process);
e13a79ac	139
79980434 MC	140	if ((to_process + processed) < nbytes)
	141	NX_CPB_FDM(csbcpb_aead) \|= NX_FDM_INTERMEDIATE;
	142	else
	143	NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_INTERMEDIATE;
	144
79980434 MC	145	nx_ctx->op_aead.inlen = (nx_ctx->in_sg - nx_sg)
	146	* sizeof(struct nx_sg);
	147
	148	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op_aead,
	149	req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
	150	if (rc)
	151	return rc;
	152
	153	memcpy(csbcpb_aead->cpb.aes_gca.in_pat,
	154	csbcpb_aead->cpb.aes_gca.out_pat,
	155	AES_BLOCK_SIZE);
	156	NX_CPB_FDM(csbcpb_aead) \|= NX_FDM_CONTINUATION;
	157
	158	atomic_inc(&(nx_ctx->stats->aes_ops));
c3d21949	159	atomic64_add(assoclen, &(nx_ctx->stats->aes_bytes));
79980434 MC	160
	161	processed += to_process;
	162	} while (processed < nbytes);
f2a15f1d KY	163
f2a15f1d KY	164	memcpy(out, csbcpb_aead->cpb.aes_gca.out_pat, AES_BLOCK_SIZE);
79980434 MC	165
	166	return rc;
	167	}
	168
7740bd51	169	static int gmac(struct aead_request req, const u8 iv, unsigned int assoclen)
dec0ed6c MC	170	{
dec0ed6c MC	171	int rc;
c3d21949 HX	172	struct nx_crypto_ctx *nx_ctx =
c3d21949 HX	173	crypto_aead_ctx(crypto_aead_reqtfm(req));
dec0ed6c MC	174	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
dec0ed6c MC	175	struct nx_sg *nx_sg;
c3d21949	176	unsigned int nbytes = assoclen;
dec0ed6c	177	unsigned int processed = 0, to_process;
e13a79ac	178	unsigned int max_sg_len;
dec0ed6c MC	179
	180	/* Set GMAC mode */
	181	csbcpb->cpb.hdr.mode = NX_MODE_AES_GMAC;
	182
	183	NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
	184
	185	/* page_limit: number of sg entries that fit on one page */
e13a79ac	186	max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
dec0ed6c	187	nx_ctx->ap->sglen);
e13a79ac LB	188	max_sg_len = min_t(u64, max_sg_len,
e13a79ac LB	189	nx_ctx->ap->databytelen/NX_PAGE_SIZE);
dec0ed6c MC	190
dec0ed6c MC	191	/* Copy IV */
7740bd51	192	memcpy(csbcpb->cpb.aes_gcm.iv_or_cnt, iv, AES_BLOCK_SIZE);
dec0ed6c MC	193
	194	do {
	195	/*
	196	* to_process: the data chunk to process in this update.
	197	* This value is bound by sg list limits.
	198	*/
	199	to_process = min_t(u64, nbytes - processed,
	200	nx_ctx->ap->databytelen);
	201	to_process = min_t(u64, to_process,
	202	NX_PAGE_SIZE * (max_sg_len - 1));
	203
e13a79ac	204	nx_sg = nx_walk_and_build(nx_ctx->in_sg, max_sg_len,
201f28f0	205	req->src, processed, &to_process);
e13a79ac	206
dec0ed6c MC	207	if ((to_process + processed) < nbytes)
	208	NX_CPB_FDM(csbcpb) \|= NX_FDM_INTERMEDIATE;
	209	else
	210	NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
	211
dec0ed6c MC	212	nx_ctx->op.inlen = (nx_ctx->in_sg - nx_sg)
	213	* sizeof(struct nx_sg);
	214
	215	csbcpb->cpb.aes_gcm.bit_length_data = 0;
	216	csbcpb->cpb.aes_gcm.bit_length_aad = 8 * nbytes;
	217
	218	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
	219	req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
	220	if (rc)
	221	goto out;
	222
	223	memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
	224	csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
	225	memcpy(csbcpb->cpb.aes_gcm.in_s0,
	226	csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);
	227
	228	NX_CPB_FDM(csbcpb) \|= NX_FDM_CONTINUATION;
	229
	230	atomic_inc(&(nx_ctx->stats->aes_ops));
c3d21949	231	atomic64_add(assoclen, &(nx_ctx->stats->aes_bytes));
dec0ed6c MC	232
	233	processed += to_process;
	234	} while (processed < nbytes);
	235
	236	out:
	237	/* Restore GCM mode */
	238	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
	239	return rc;
	240	}
	241
7740bd51	242	static int gcm_empty(struct aead_request req, const u8 iv, int enc)
79980434 MC	243	{
79980434 MC	244	int rc;
c3d21949 HX	245	struct nx_crypto_ctx *nx_ctx =
c3d21949 HX	246	crypto_aead_ctx(crypto_aead_reqtfm(req));
79980434	247	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
dec0ed6c MC	248	char out[AES_BLOCK_SIZE];
dec0ed6c MC	249	struct nx_sg in_sg, out_sg;
e13a79ac	250	int len;
79980434 MC	251
	252	/* For scenarios where the input message is zero length, AES CTR mode
	253	* may be used. Set the source data to be a single block (16B) of all
	254	* zeros, and set the input IV value to be the same as the GMAC IV
	255	* value. - nx_wb 4.8.1.3 */
79980434	256
dec0ed6c MC	257	/* Change to ECB mode */
	258	csbcpb->cpb.hdr.mode = NX_MODE_AES_ECB;
	259	memcpy(csbcpb->cpb.aes_ecb.key, csbcpb->cpb.aes_gcm.key,
	260	sizeof(csbcpb->cpb.aes_ecb.key));
79980434	261	if (enc)
dec0ed6c	262	NX_CPB_FDM(csbcpb) \|= NX_FDM_ENDE_ENCRYPT;
79980434	263	else
dec0ed6c MC	264	NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
dec0ed6c MC	265
e13a79ac LB	266	len = AES_BLOCK_SIZE;
e13a79ac LB	267
dec0ed6c	268	/* Encrypt the counter/IV */
7740bd51	269	in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *) iv,
e13a79ac LB	270	&len, nx_ctx->ap->sglen);
	271
	272	if (len != AES_BLOCK_SIZE)
	273	return -EINVAL;
	274
	275	len = sizeof(out);
	276	out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *) out, &len,
dec0ed6c	277	nx_ctx->ap->sglen);
e13a79ac LB	278
	279	if (len != sizeof(out))
	280	return -EINVAL;
	281
dec0ed6c MC	282	nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
dec0ed6c MC	283	nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
79980434	284
dec0ed6c	285	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
7740bd51	286	req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
dec0ed6c MC	287	if (rc)
	288	goto out;
	289	atomic_inc(&(nx_ctx->stats->aes_ops));
	290
	291	/* Copy out the auth tag */
	292	memcpy(csbcpb->cpb.aes_gcm.out_pat_or_mac, out,
	293	crypto_aead_authsize(crypto_aead_reqtfm(req)));
f2a15f1d	294	out:
dec0ed6c MC	295	/* Restore XCBC mode */
	296	csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
	297
	298	/*
	299	* ECB key uses the same region that GCM AAD and counter, so it's safe
	300	* to just fill it with zeroes.
	301	*/
	302	memset(csbcpb->cpb.aes_ecb.key, 0, sizeof(csbcpb->cpb.aes_ecb.key));
	303
f2a15f1d KY	304	return rc;
	305	}
	306
c3d21949 HX	307	static int gcm_aes_nx_crypt(struct aead_request *req, int enc,
c3d21949 HX	308	unsigned int assoclen)
f2a15f1d	309	{
c3d21949 HX	310	struct nx_crypto_ctx *nx_ctx =
c3d21949 HX	311	crypto_aead_ctx(crypto_aead_reqtfm(req));
030f4e96	312	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
f2a15f1d	313	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
f2a15f1d	314	unsigned int nbytes = req->cryptlen;
79980434	315	unsigned int processed = 0, to_process;
c849163b	316	unsigned long irq_flags;
f2a15f1d KY	317	int rc = -EINVAL;
f2a15f1d KY	318
c849163b MC	319	spin_lock_irqsave(&nx_ctx->lock, irq_flags);
c849163b MC	320
f2a15f1d	321	/* initialize the counter */
7740bd51	322	(u32 )&rctx->iv[NX_GCM_CTR_OFFSET] = 1;
f2a15f1d	323
f2a15f1d	324	if (nbytes == 0) {
c3d21949	325	if (assoclen == 0)
7740bd51	326	rc = gcm_empty(req, rctx->iv, enc);
dec0ed6c	327	else
7740bd51	328	rc = gmac(req, rctx->iv, assoclen);
dec0ed6c MC	329	if (rc)
	330	goto out;
	331	else
	332	goto mac;
f2a15f1d KY	333	}
f2a15f1d KY	334
79980434	335	/* Process associated data */
c3d21949 HX	336	csbcpb->cpb.aes_gcm.bit_length_aad = assoclen * 8;
	337	if (assoclen) {
	338	rc = nx_gca(nx_ctx, req, csbcpb->cpb.aes_gcm.in_pat_or_aad,
	339	assoclen);
f2a15f1d KY	340	if (rc)
	341	goto out;
	342	}
	343
79980434 MC	344	/* Set flags for encryption */
	345	NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
	346	if (enc) {
f2a15f1d	347	NX_CPB_FDM(csbcpb) \|= NX_FDM_ENDE_ENCRYPT;
79980434 MC	348	} else {
79980434 MC	349	NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
1ad936e8	350	nbytes -= crypto_aead_authsize(crypto_aead_reqtfm(req));
79980434	351	}
f2a15f1d	352
79980434	353	do {
e13a79ac	354	to_process = nbytes - processed;
f2a15f1d	355
79980434	356	csbcpb->cpb.aes_gcm.bit_length_data = nbytes * 8;
7740bd51	357	rc = nx_build_sg_lists(nx_ctx, rctx->iv, req->dst,
201f28f0 HX	358	req->src, &to_process,
201f28f0 HX	359	processed + req->assoclen,
79980434	360	csbcpb->cpb.aes_gcm.iv_or_cnt);
e13a79ac	361
79980434 MC	362	if (rc)
79980434 MC	363	goto out;
f2a15f1d	364
e13a79ac LB	365	if ((to_process + processed) < nbytes)
	366	NX_CPB_FDM(csbcpb) \|= NX_FDM_INTERMEDIATE;
	367	else
	368	NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
	369
	370
79980434 MC	371	rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
	372	req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
	373	if (rc)
	374	goto out;
	375
7740bd51	376	memcpy(rctx->iv, csbcpb->cpb.aes_gcm.out_cnt, AES_BLOCK_SIZE);
79980434 MC	377	memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
	378	csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
	379	memcpy(csbcpb->cpb.aes_gcm.in_s0,
	380	csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);
	381
	382	NX_CPB_FDM(csbcpb) \|= NX_FDM_CONTINUATION;
	383
	384	atomic_inc(&(nx_ctx->stats->aes_ops));
b20d9a73	385	atomic64_add(be32_to_cpu(csbcpb->csb.processed_byte_count),
79980434	386	&(nx_ctx->stats->aes_bytes));
f2a15f1d	387
79980434 MC	388	processed += to_process;
79980434 MC	389	} while (processed < nbytes);
f2a15f1d	390
dec0ed6c	391	mac:
f2a15f1d KY	392	if (enc) {
f2a15f1d KY	393	/* copy out the auth tag */
201f28f0 HX	394	scatterwalk_map_and_copy(
	395	csbcpb->cpb.aes_gcm.out_pat_or_mac,
	396	req->dst, req->assoclen + nbytes,
	397	crypto_aead_authsize(crypto_aead_reqtfm(req)),
	398	SCATTERWALK_TO_SG);
b4eba0ca	399	} else {
f2a15f1d KY	400	u8 *itag = nx_ctx->priv.gcm.iauth_tag;
	401	u8 *otag = csbcpb->cpb.aes_gcm.out_pat_or_mac;
	402
201f28f0 HX	403	scatterwalk_map_and_copy(
	404	itag, req->src, req->assoclen + nbytes,
	405	crypto_aead_authsize(crypto_aead_reqtfm(req)),
	406	SCATTERWALK_FROM_SG);
cb8affb5	407	rc = crypto_memneq(itag, otag,
f2a15f1d KY	408	crypto_aead_authsize(crypto_aead_reqtfm(req))) ?
	409	-EBADMSG : 0;
	410	}
	411	out:
c849163b	412	spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
f2a15f1d KY	413	return rc;
	414	}
	415
	416	static int gcm_aes_nx_encrypt(struct aead_request *req)
	417	{
030f4e96 HX	418	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
030f4e96 HX	419	char *iv = rctx->iv;
f2a15f1d	420
fdd0f3d8	421	memcpy(iv, req->iv, GCM_AES_IV_SIZE);
f2a15f1d	422
c3d21949	423	return gcm_aes_nx_crypt(req, 1, req->assoclen);
f2a15f1d KY	424	}
	425
	426	static int gcm_aes_nx_decrypt(struct aead_request *req)
	427	{
030f4e96 HX	428	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
030f4e96 HX	429	char *iv = rctx->iv;
f2a15f1d	430
fdd0f3d8	431	memcpy(iv, req->iv, GCM_AES_IV_SIZE);
f2a15f1d	432
c3d21949	433	return gcm_aes_nx_crypt(req, 0, req->assoclen);
f2a15f1d KY	434	}
	435
	436	static int gcm4106_aes_nx_encrypt(struct aead_request *req)
	437	{
c3d21949 HX	438	struct nx_crypto_ctx *nx_ctx =
c3d21949 HX	439	crypto_aead_ctx(crypto_aead_reqtfm(req));
030f4e96 HX	440	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
030f4e96 HX	441	char *iv = rctx->iv;
f2a15f1d KY	442	char *nonce = nx_ctx->priv.gcm.nonce;
	443
	444	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
	445	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
	446
c3d21949 HX	447	if (req->assoclen < 8)
	448	return -EINVAL;
	449
	450	return gcm_aes_nx_crypt(req, 1, req->assoclen - 8);
f2a15f1d KY	451	}
	452
	453	static int gcm4106_aes_nx_decrypt(struct aead_request *req)
	454	{
c3d21949 HX	455	struct nx_crypto_ctx *nx_ctx =
c3d21949 HX	456	crypto_aead_ctx(crypto_aead_reqtfm(req));
030f4e96 HX	457	struct nx_gcm_rctx *rctx = aead_request_ctx(req);
030f4e96 HX	458	char *iv = rctx->iv;
f2a15f1d KY	459	char *nonce = nx_ctx->priv.gcm.nonce;
	460
	461	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
	462	memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
	463
c3d21949 HX	464	if (req->assoclen < 8)
	465	return -EINVAL;
	466
	467	return gcm_aes_nx_crypt(req, 0, req->assoclen - 8);
f2a15f1d KY	468	}
f2a15f1d KY	469
201f28f0 HX	470	struct aead_alg nx_gcm_aes_alg = {
	471	.base = {
	472	.cra_name = "gcm(aes)",
	473	.cra_driver_name = "gcm-aes-nx",
	474	.cra_priority = 300,
	475	.cra_blocksize = 1,
	476	.cra_ctxsize = sizeof(struct nx_crypto_ctx),
	477	.cra_module = THIS_MODULE,
	478	},
	479	.init = nx_crypto_ctx_aes_gcm_init,
	480	.exit = nx_crypto_ctx_aead_exit,
fdd0f3d8	481	.ivsize = GCM_AES_IV_SIZE,
201f28f0 HX	482	.maxauthsize = AES_BLOCK_SIZE,
	483	.setkey = gcm_aes_nx_set_key,
	484	.encrypt = gcm_aes_nx_encrypt,
	485	.decrypt = gcm_aes_nx_decrypt,
f2a15f1d KY	486	};
f2a15f1d KY	487
201f28f0 HX	488	struct aead_alg nx_gcm4106_aes_alg = {
	489	.base = {
	490	.cra_name = "rfc4106(gcm(aes))",
	491	.cra_driver_name = "rfc4106-gcm-aes-nx",
	492	.cra_priority = 300,
	493	.cra_blocksize = 1,
	494	.cra_ctxsize = sizeof(struct nx_crypto_ctx),
	495	.cra_module = THIS_MODULE,
	496	},
	497	.init = nx_crypto_ctx_aes_gcm_init,
	498	.exit = nx_crypto_ctx_aead_exit,
fdd0f3d8	499	.ivsize = GCM_RFC4106_IV_SIZE,
201f28f0 HX	500	.maxauthsize = AES_BLOCK_SIZE,
	501	.setkey = gcm4106_aes_nx_set_key,
	502	.setauthsize = gcm4106_aes_nx_setauthsize,
	503	.encrypt = gcm4106_aes_nx_encrypt,
	504	.decrypt = gcm4106_aes_nx_decrypt,
f2a15f1d	505	};