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Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 | 17 | config DMADEVICES_DEBUG |
67805a4b KK |
18 | bool "DMA Engine debugging" |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
6c664a89 LW |
23 | |
24 | config DMADEVICES_VDEBUG | |
67805a4b KK |
25 | bool "DMA Engine verbose debugging" |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
6c664a89 LW |
31 | |
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
253697b9 | 62 | depends on HAS_IOMEM |
a85c6f1b SR |
63 | select DMA_ENGINE |
64 | help | |
65 | Enable support for Altera / Intel mSGDMA controller. | |
66 | ||
e8689e63 LW |
67 | config AMBA_PL08X |
68 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 69 | depends on ARM_AMBA |
e8689e63 | 70 | select DMA_ENGINE |
083be28a | 71 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 72 | help |
1e1cfc72 LW |
73 | Say yes if your platform has a PL08x DMAC device which can |
74 | provide DMA engine support. This includes the original ARM | |
75 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
76 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 77 | |
3c216190 VK |
78 | config AMCC_PPC440SPE_ADMA |
79 | tristate "AMCC PPC440SPe ADMA support" | |
80 | depends on 440SPe || 440SP | |
2ed6dc34 | 81 | select DMA_ENGINE |
3cc377b9 | 82 | select DMA_ENGINE_RAID |
3c216190 | 83 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 84 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 85 | help |
3c216190 | 86 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 87 | |
dc78baa2 NF |
88 | config AT_HDMAC |
89 | tristate "Atmel AHB DMA support" | |
f898fed0 | 90 | depends on ARCH_AT91 |
dc78baa2 NF |
91 | select DMA_ENGINE |
92 | help | |
f898fed0 | 93 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 94 | |
e1f7c9ee LD |
95 | config AT_XDMAC |
96 | tristate "Atmel XDMA support" | |
6e5ae29b | 97 | depends on ARCH_AT91 |
e1f7c9ee LD |
98 | select DMA_ENGINE |
99 | help | |
100 | Support the Atmel XDMA controller. | |
2ed6dc34 | 101 | |
3c216190 VK |
102 | config AXI_DMAC |
103 | tristate "Analog Devices AXI-DMAC DMA support" | |
5c038872 | 104 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 105 | select DMA_ENGINE |
3c216190 | 106 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 107 | select REGMAP_MMIO |
2ed6dc34 | 108 | help |
3c216190 | 109 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
2fea2906 | 110 | controller is often used in Analog Devices' reference designs for FPGA |
3c216190 | 111 | platforms. |
c13c8260 | 112 | |
743e1c8f AP |
113 | config BCM_SBA_RAID |
114 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
115 | depends on ARM64 || COMPILE_TEST |
116 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
117 | select DMA_ENGINE |
118 | select DMA_ENGINE_RAID | |
119 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
120 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 121 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
122 | help |
123 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
124 | engine is available on most of the Broadcom iProc SoCs. It | |
125 | has the capability to offload memcpy, xor and pq computation | |
126 | for raid5/6. | |
127 | ||
3c216190 VK |
128 | config DMA_BCM2835 |
129 | tristate "BCM2835 DMA engine support" | |
130 | depends on ARCH_BCM2835 | |
131 | select DMA_ENGINE | |
132 | select DMA_VIRTUAL_CHANNELS | |
133 | ||
3c216190 VK |
134 | config DMA_JZ4780 |
135 | tristate "JZ4780 DMA support" | |
c558ecd2 | 136 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
137 | select DMA_ENGINE |
138 | select DMA_VIRTUAL_CHANNELS | |
139 | help | |
3c216190 VK |
140 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
141 | If you have a board based on such a SoC and wish to use DMA for | |
142 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 143 | |
3c216190 VK |
144 | config DMA_SA11X0 |
145 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 146 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 147 | select DMA_ENGINE |
3c216190 | 148 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 149 | help |
3c216190 VK |
150 | Support the DMA engine found on Intel StrongARM SA-1100 and |
151 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
152 | devices. | |
dc78baa2 | 153 | |
3c216190 VK |
154 | config DMA_SUN4I |
155 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 156 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 157 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 158 | select DMA_ENGINE |
3c216190 | 159 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 160 | help |
3c216190 VK |
161 | Enable support for the DMA controller present in the sun4i, |
162 | sun5i and sun7i Allwinner ARM SoCs. | |
163 | ||
164 | config DMA_SUN6I | |
165 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 166 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
167 | depends on RESET_CONTROLLER |
168 | select DMA_ENGINE | |
169 | select DMA_VIRTUAL_CHANNELS | |
170 | help | |
171 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
172 | ||
1fe20f1b EP |
173 | config DW_AXI_DMAC |
174 | tristate "Synopsys DesignWare AXI DMA support" | |
175 | depends on OF || COMPILE_TEST | |
cd0f00c3 | 176 | depends on HAS_IOMEM |
1fe20f1b EP |
177 | select DMA_ENGINE |
178 | select DMA_VIRTUAL_CHANNELS | |
179 | help | |
180 | Enable support for Synopsys DesignWare AXI DMA controller. | |
181 | NOTE: This driver wasn't tested on 64 bit platform because | |
182 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
183 | ||
3c216190 VK |
184 | config EP93XX_DMA |
185 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 186 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
187 | select DMA_ENGINE |
188 | help | |
189 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 190 | |
173acc7c | 191 | config FSL_DMA |
8de7a7d9 | 192 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 193 | depends on FSL_SOC |
173acc7c | 194 | select DMA_ENGINE |
5fc6d897 | 195 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
a7f7f624 | 196 | help |
8de7a7d9 HZ |
197 | Enable support for the Freescale Elo series DMA controllers. |
198 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
199 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
200 | some Txxx and Bxxx parts. | |
173acc7c | 201 | |
3c216190 VK |
202 | config FSL_EDMA |
203 | tristate "Freescale eDMA engine support" | |
204 | depends on OF | |
205 | select DMA_ENGINE | |
206 | select DMA_VIRTUAL_CHANNELS | |
207 | help | |
208 | Support the Freescale eDMA engine with programmable channel | |
209 | multiplexing capability for DMA request sources(slot). | |
210 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
211 | ||
b092529e | 212 | config FSL_QDMA |
67805a4b KK |
213 | tristate "NXP Layerscape qDMA engine support" |
214 | depends on ARM || ARM64 | |
215 | select DMA_ENGINE | |
216 | select DMA_VIRTUAL_CHANNELS | |
217 | select DMA_ENGINE_RAID | |
218 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
219 | help | |
220 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
221 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
222 | or dequeuing DMA jobs from, different work queues. | |
223 | This module can be found on NXP Layerscape SoCs. | |
b092529e PM |
224 | The qdma driver only work on SoCs with a DPAA hardware block. |
225 | ||
ad80da65 | 226 | config FSL_RAID |
67805a4b KK |
227 | tristate "Freescale RAID engine Support" |
228 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
229 | select DMA_ENGINE | |
230 | select DMA_ENGINE_RAID | |
a7f7f624 | 231 | help |
67805a4b KK |
232 | Enable support for Freescale RAID Engine. RAID Engine is |
233 | available on some QorIQ SoCs (like P5020/P5040). It has | |
234 | the capability to offload memcpy, xor and pq computation | |
ad80da65 XS |
235 | for raid5/6. |
236 | ||
e9f08b65 ZW |
237 | config HISI_DMA |
238 | tristate "HiSilicon DMA Engine support" | |
ae148b43 Y |
239 | depends on ARM64 || COMPILE_TEST |
240 | depends on PCI_MSI | |
e9f08b65 ZW |
241 | select DMA_ENGINE |
242 | select DMA_VIRTUAL_CHANNELS | |
243 | help | |
244 | Support HiSilicon Kunpeng DMA engine. | |
245 | ||
3c216190 VK |
246 | config IMG_MDC_DMA |
247 | tristate "IMG MDC support" | |
248 | depends on MIPS || COMPILE_TEST | |
249 | depends on MFD_SYSCON | |
0fb6f739 | 250 | select DMA_ENGINE |
3c216190 VK |
251 | select DMA_VIRTUAL_CHANNELS |
252 | help | |
253 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 254 | |
3c216190 VK |
255 | config IMX_DMA |
256 | tristate "i.MX DMA support" | |
8e2d41f8 | 257 | depends on ARCH_MXC |
ff7b0479 | 258 | select DMA_ENGINE |
5296b56d | 259 | help |
3c216190 VK |
260 | Support the i.MX DMA engine. This engine is integrated into |
261 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 262 | |
3c216190 VK |
263 | config IMX_SDMA |
264 | tristate "i.MX SDMA support" | |
8e2d41f8 | 265 | depends on ARCH_MXC |
5296b56d | 266 | select DMA_ENGINE |
57b772b8 | 267 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 268 | help |
3c216190 VK |
269 | Support the i.MX SDMA engine. This engine is integrated into |
270 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 271 | |
9ab8b4e7 | 272 | config INTEL_IDMA64 |
35271227 LT |
273 | tristate "Intel integrated DMA 64-bit support" |
274 | select DMA_ENGINE | |
275 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 276 | help |
35271227 LT |
277 | Enable DMA support for Intel Low Power Subsystem such as found on |
278 | Intel Skylake PCH. | |
5296b56d | 279 | |
bfe1d560 DJ |
280 | config INTEL_IDXD |
281 | tristate "Intel Data Accelerators support" | |
282 | depends on PCI && X86_64 | |
d6a7bb86 | 283 | depends on PCI_MSI |
0705107f | 284 | depends on SBITMAP |
bfe1d560 | 285 | select DMA_ENGINE |
bfe1d560 DJ |
286 | help |
287 | Enable support for the Intel(R) data accelerators present | |
288 | in Intel Xeon CPU. | |
289 | ||
290 | Say Y if you have such a platform. | |
291 | ||
292 | If unsure, say N. | |
293 | ||
8e50d392 DJ |
294 | # Config symbol that collects all the dependencies that's necessary to |
295 | # support shared virtual memory for the devices supported by idxd. | |
296 | config INTEL_IDXD_SVM | |
297 | bool "Accelerator Shared Virtual Memory Support" | |
298 | depends on INTEL_IDXD | |
299 | depends on INTEL_IOMMU_SVM | |
300 | depends on PCI_PRI | |
301 | depends on PCI_PASID | |
302 | depends on PCI_IOV | |
303 | ||
81dd4d4d TZ |
304 | config INTEL_IDXD_PERFMON |
305 | bool "Intel Data Accelerators performance monitor support" | |
306 | depends on INTEL_IDXD | |
307 | help | |
308 | Enable performance monitor (pmu) support for the Intel(R) | |
309 | data accelerators present in Intel Xeon CPU. With this | |
310 | enabled, perf can be used to monitor the DSA (Intel Data | |
311 | Streaming Accelerator) events described in the Intel DSA | |
312 | spec. | |
313 | ||
314 | If unsure, say N. | |
315 | ||
3c216190 VK |
316 | config INTEL_IOATDMA |
317 | tristate "Intel I/OAT DMA support" | |
318 | depends on PCI && X86_64 | |
a57e16cf | 319 | select DMA_ENGINE |
3c216190 VK |
320 | select DMA_ENGINE_RAID |
321 | select DCA | |
a57e16cf | 322 | help |
3c216190 VK |
323 | Enable support for the Intel(R) I/OAT DMA engine present |
324 | in recent Intel Xeon chipsets. | |
a57e16cf | 325 | |
3c216190 VK |
326 | Say Y here if you have such a chipset. |
327 | ||
328 | If unsure, say N. | |
329 | ||
330 | config INTEL_IOP_ADMA | |
aad7ad2a | 331 | tristate "Intel IOP32x ADMA support" |
04cbfba6 | 332 | depends on ARCH_IOP32X || COMPILE_TEST |
ea76f0b3 | 333 | select DMA_ENGINE |
3c216190 | 334 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 335 | help |
3c216190 | 336 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 337 | |
3c216190 VK |
338 | config K3_DMA |
339 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 340 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
341 | select DMA_ENGINE |
342 | select DMA_VIRTUAL_CHANNELS | |
343 | help | |
3c216190 VK |
344 | Support the DMA engine for Hisilicon K3 platform |
345 | devices. | |
ddeccb8d | 346 | |
3c216190 VK |
347 | config LPC18XX_DMAMUX |
348 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
349 | depends on ARCH_LPC18XX || COMPILE_TEST | |
350 | depends on OF && AMBA_PL08X | |
351 | select MFD_SYSCON | |
352 | help | |
353 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
354 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 355 | |
e7a3ff92 AD |
356 | config MCF_EDMA |
357 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
358 | depends on M5441x || COMPILE_TEST | |
359 | select DMA_ENGINE | |
360 | select DMA_VIRTUAL_CHANNELS | |
361 | help | |
362 | Support the Freescale ColdFire eDMA engine, 64-channel | |
363 | implementation that performs complex data transfers with | |
364 | minimal intervention from a host processor. | |
365 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
366 | ||
6c3214e6 JB |
367 | config MILBEAUT_HDMAC |
368 | tristate "Milbeaut AHB DMA support" | |
369 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
370 | depends on OF | |
371 | select DMA_ENGINE | |
372 | select DMA_VIRTUAL_CHANNELS | |
373 | help | |
374 | Say yes here to support the Socionext Milbeaut | |
375 | HDMAC device. | |
376 | ||
a6e9be05 JB |
377 | config MILBEAUT_XDMAC |
378 | tristate "Milbeaut AXI DMA support" | |
379 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
380 | depends on OF | |
381 | select DMA_ENGINE | |
382 | select DMA_VIRTUAL_CHANNELS | |
383 | help | |
384 | Say yes here to support the Socionext Milbeaut | |
385 | XDMAC device. | |
386 | ||
3c216190 | 387 | config MMP_PDMA |
793dff4b | 388 | tristate "MMP PDMA support" |
cd3a792a | 389 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 390 | select DMA_ENGINE |
61f135b9 | 391 | help |
3c216190 | 392 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 393 | |
3c216190 | 394 | config MMP_TDMA |
9f3c14d4 | 395 | tristate "MMP Two-Channel DMA support" |
93d05f1e | 396 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 397 | select DMA_ENGINE |
d6619761 | 398 | select GENERIC_ALLOCATOR |
8d318a50 | 399 | help |
3c216190 VK |
400 | Support the MMP Two-Channel DMA engine. |
401 | This engine used for MMP Audio DMA and pxa910 SQU. | |
8d318a50 | 402 | |
3c216190 VK |
403 | config MOXART_DMA |
404 | tristate "MOXART DMA support" | |
405 | depends on ARCH_MOXART | |
12458ea0 | 406 | select DMA_ENGINE |
3c216190 | 407 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 408 | help |
3c216190 VK |
409 | Enable support for the MOXA ART SoC DMA controller. |
410 | ||
411 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 412 | |
3c216190 VK |
413 | config MPC512X_DMA |
414 | tristate "Freescale MPC512x built-in DMA engine support" | |
415 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 416 | select DMA_ENGINE |
a7f7f624 | 417 | help |
3c216190 | 418 | Enable support for the Freescale MPC512x built-in DMA engine. |
de5d4453 | 419 | |
3c216190 VK |
420 | config MV_XOR |
421 | bool "Marvell XOR engine support" | |
c39290a1 | 422 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 423 | select DMA_ENGINE |
3c216190 VK |
424 | select DMA_ENGINE_RAID |
425 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
a7f7f624 | 426 | help |
3c216190 | 427 | Enable support for the Marvell XOR engine. |
ca21a146 | 428 | |
19a340b1 TP |
429 | config MV_XOR_V2 |
430 | bool "Marvell XOR engine version 2 support " | |
431 | depends on ARM64 | |
432 | select DMA_ENGINE | |
433 | select DMA_ENGINE_RAID | |
434 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
435 | select GENERIC_MSI_IRQ_DOMAIN | |
a7f7f624 | 436 | help |
19a340b1 TP |
437 | Enable support for the Marvell version 2 XOR engine. |
438 | ||
439 | This engine provides acceleration for copy, XOR and RAID6 | |
440 | operations, and is available on Marvell Armada 7K and 8K | |
441 | platforms. | |
442 | ||
3c216190 VK |
443 | config MXS_DMA |
444 | bool "MXS DMA support" | |
d762e4f3 | 445 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 446 | select STMP_DEVICE |
ca21a146 RY |
447 | select DMA_ENGINE |
448 | help | |
3c216190 | 449 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 450 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 451 | |
3c216190 VK |
452 | config MX3_IPU |
453 | bool "MX3x Image Processing Unit support" | |
454 | depends on ARCH_MXC | |
c2dde5f8 | 455 | select DMA_ENGINE |
3c216190 | 456 | default y |
c2dde5f8 | 457 | help |
3c216190 VK |
458 | If you plan to use the Image Processing unit in the i.MX3x, say |
459 | Y here. If unsure, select Y. | |
a074ae38 | 460 | |
3c216190 VK |
461 | config MX3_IPU_IRQS |
462 | int "Number of dynamically mapped interrupts for IPU" | |
463 | depends on MX3_IPU | |
464 | range 2 137 | |
465 | default 4 | |
466 | help | |
467 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
468 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
469 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 470 | |
3c216190 VK |
471 | config NBPFAXI_DMA |
472 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 473 | select DMA_ENGINE |
3c216190 | 474 | depends on ARM || COMPILE_TEST |
b3040e40 | 475 | help |
3c216190 | 476 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 477 | |
47e20577 MS |
478 | config OWL_DMA |
479 | tristate "Actions Semi Owl SoCs DMA support" | |
480 | depends on ARCH_ACTIONS | |
481 | select DMA_ENGINE | |
482 | select DMA_VIRTUAL_CHANNELS | |
483 | help | |
484 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
485 | ||
0c42bd0e | 486 | config PCH_DMA |
ca7fe2db | 487 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 488 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
489 | select DMA_ENGINE |
490 | help | |
2cdf2455 TM |
491 | Enable support for Intel EG20T PCH DMA engine. |
492 | ||
e79e72be | 493 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
494 | Output Hub), ML7213, ML7223 and ML7831. |
495 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
496 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
497 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
498 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 499 | |
3c216190 VK |
500 | config PL330_DMA |
501 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 502 | select DMA_ENGINE |
3c216190 | 503 | depends on ARM_AMBA |
1ec1e82f | 504 | help |
3c216190 VK |
505 | Select if your platform has one or more PL330 DMACs. |
506 | You need to provide platform specific settings via | |
507 | platform_data for a dma-pl330 device. | |
1ec1e82f | 508 | |
3c216190 VK |
509 | config PXA_DMA |
510 | bool "PXA DMA support" | |
511 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 512 | select DMA_ENGINE |
3c216190 | 513 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 514 | help |
3c216190 VK |
515 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
516 | platform. The internal DMA IP of all PXA variants is supported, with | |
517 | 16 to 32 channels for peripheral to memory or memory to memory | |
518 | transfers. | |
1f1846c6 | 519 | |
905ca51e LG |
520 | config PLX_DMA |
521 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" | |
522 | depends on PCI | |
523 | select DMA_ENGINE | |
524 | help | |
525 | Some PLX ExpressLane PCI Switches support additional DMA engines. | |
526 | These are exposed via extra functions on the switch's | |
527 | upstream port. Each function exposes one DMA channel. | |
528 | ||
3c216190 VK |
529 | config STE_DMA40 |
530 | bool "ST-Ericsson DMA40 support" | |
531 | depends on ARCH_U8500 | |
760ee1c4 MW |
532 | select DMA_ENGINE |
533 | help | |
3c216190 | 534 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 535 | |
6b4cd727 PG |
536 | config ST_FDMA |
537 | tristate "ST FDMA dmaengine support" | |
538 | depends on ARCH_STI | |
3d6b3715 | 539 | depends on REMOTEPROC |
6b4cd727 PG |
540 | select ST_SLIM_REMOTEPROC |
541 | select DMA_ENGINE | |
542 | select DMA_VIRTUAL_CHANNELS | |
543 | help | |
544 | Enable support for ST FDMA controller. | |
545 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
546 | ||
547 | Say Y here if you have such a chipset. | |
548 | If unsure, say N. | |
549 | ||
d8b46839 CM |
550 | config STM32_DMA |
551 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 552 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 553 | select DMA_ENGINE |
d8b46839 CM |
554 | select DMA_VIRTUAL_CHANNELS |
555 | help | |
556 | Enable support for the on-chip DMA controller on STMicroelectronics | |
557 | STM32 MCUs. | |
ddf9bd40 | 558 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
559 | here. |
560 | ||
df7e762d PYM |
561 | config STM32_DMAMUX |
562 | bool "STMicroelectronics STM32 dma multiplexer support" | |
563 | depends on STM32_DMA || COMPILE_TEST | |
564 | help | |
565 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
566 | STM32 MCUs. | |
567 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
568 | here. | |
569 | ||
a4ffb13c PYM |
570 | config STM32_MDMA |
571 | bool "STMicroelectronics STM32 master dma support" | |
572 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 573 | depends on OF |
a4ffb13c | 574 | select DMA_ENGINE |
a4ffb13c PYM |
575 | select DMA_VIRTUAL_CHANNELS |
576 | help | |
577 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
578 | STM32 platforms. | |
579 | If you have a board based on STM32 SoC and wish to use the master DMA | |
580 | say Y here. | |
581 | ||
9b3b8171 BW |
582 | config SPRD_DMA |
583 | tristate "Spreadtrum DMA support" | |
584 | depends on ARCH_SPRD || COMPILE_TEST | |
585 | select DMA_ENGINE | |
586 | select DMA_VIRTUAL_CHANNELS | |
587 | help | |
588 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
589 | ||
3c216190 | 590 | config S3C24XX_DMAC |
9bdca822 | 591 | bool "Samsung S3C24XX DMA support" |
1609db6f | 592 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 593 | select DMA_ENGINE |
50437bff | 594 | select DMA_VIRTUAL_CHANNELS |
6365bead | 595 | help |
3c216190 VK |
596 | Support for the Samsung S3C24XX DMA controller driver. The |
597 | DMA controller is having multiple DMA channels which can be | |
598 | configured for different peripherals like audio, UART, SPI. | |
599 | The DMA controller can transfer data from memory to peripheral, | |
600 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 601 | |
3c216190 VK |
602 | config TXX9_DMAC |
603 | tristate "Toshiba TXx9 SoC DMA support" | |
604 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
605 | select DMA_ENGINE |
606 | help | |
3c216190 VK |
607 | Support the TXx9 SoC internal DMA controller. This can be |
608 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 609 | |
3c216190 | 610 | config TEGRA20_APB_DMA |
703b70f4 | 611 | tristate "NVIDIA Tegra20 APB DMA support" |
6c41ac96 | 612 | depends on ARCH_TEGRA || COMPILE_TEST |
7bedaa55 | 613 | select DMA_ENGINE |
3c216190 VK |
614 | help |
615 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
616 | DMA controller is having multiple DMA channel which can be | |
617 | configured for different peripherals like audio, UART, SPI, | |
618 | I2C etc which is in APB bus. | |
619 | This DMA controller transfers data from memory to peripheral fifo | |
620 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 621 | |
f46b1957 | 622 | config TEGRA210_ADMA |
3ed16793 | 623 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 624 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
625 | select DMA_ENGINE |
626 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
627 | help |
628 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
629 | DMA controller has multiple DMA channels and is used to service | |
630 | various audio clients in the Tegra210 audio processing engine | |
631 | (APE). This DMA controller transfers data from memory to | |
632 | peripheral and vice versa. It does not support memory to | |
633 | memory data transfer. | |
634 | ||
3c216190 VK |
635 | config TIMB_DMA |
636 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 637 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 638 | select DMA_ENGINE |
3c216190 VK |
639 | help |
640 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 641 | |
32e74aab MY |
642 | config UNIPHIER_MDMAC |
643 | tristate "UniPhier MIO DMAC" | |
644 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
645 | depends on OF | |
646 | select DMA_ENGINE | |
647 | select DMA_VIRTUAL_CHANNELS | |
648 | help | |
649 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
650 | UniPhier platform. This DMA controller is used as the external | |
651 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
652 | ||
667b9251 KH |
653 | config UNIPHIER_XDMAC |
654 | tristate "UniPhier XDMAC support" | |
655 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
656 | depends on OF | |
657 | select DMA_ENGINE | |
658 | select DMA_VIRTUAL_CHANNELS | |
659 | help | |
660 | Enable support for the XDMAC (external DMA controller) on the | |
661 | UniPhier platform. This DMA controller can transfer data from | |
662 | memory to memory, memory to peripheral and peripheral to memory. | |
663 | ||
3c216190 VK |
664 | config XGENE_DMA |
665 | tristate "APM X-Gene DMA support" | |
666 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 667 | select DMA_ENGINE |
3c216190 VK |
668 | select DMA_ENGINE_RAID |
669 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 670 | help |
3c216190 | 671 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 672 | |
fde57a7c KA |
673 | config XILINX_DMA |
674 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 675 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
676 | select DMA_ENGINE |
677 | help | |
678 | Enable support for Xilinx AXI VDMA Soft IP. | |
679 | ||
fde57a7c | 680 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
681 | between memory and AXI4-Stream video type target |
682 | peripherals including peripherals which support AXI4- | |
683 | Stream Video Protocol. It has two stream interfaces/ | |
684 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
685 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
686 | AXI CDMA engine provides high-bandwidth direct memory access |
687 | between a memory-mapped source address and a memory-mapped | |
688 | destination address. | |
689 | AXI DMA engine provides high-bandwidth one dimensional direct | |
690 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
691 | AXI MCDMA engine provides high-bandwidth direct memory access |
692 | between memory and AXI4-Stream target peripherals. It provides | |
693 | the scatter gather interface with multiple channels independent | |
694 | configuration support. | |
9cd4360d | 695 | |
b0cc417c KA |
696 | config XILINX_ZYNQMP_DMA |
697 | tristate "Xilinx ZynqMP DMA Engine" | |
698 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
699 | select DMA_ENGINE | |
700 | help | |
701 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 702 | |
7cbb0c63 HK |
703 | config XILINX_ZYNQMP_DPDMA |
704 | tristate "Xilinx DPDMA Engine" | |
32828b82 | 705 | depends on HAS_IOMEM && OF |
7cbb0c63 HK |
706 | select DMA_ENGINE |
707 | select DMA_VIRTUAL_CHANNELS | |
708 | help | |
709 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option | |
710 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The | |
711 | driver provides the dmaengine required by the DisplayPort subsystem | |
712 | display driver. | |
713 | ||
3c216190 VK |
714 | # driver files |
715 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 716 | |
548c4597 SW |
717 | source "drivers/dma/mediatek/Kconfig" |
718 | ||
d9b31efc SK |
719 | source "drivers/dma/qcom/Kconfig" |
720 | ||
3c216190 | 721 | source "drivers/dma/dw/Kconfig" |
50437bff | 722 | |
e63d79d1 GP |
723 | source "drivers/dma/dw-edma/Kconfig" |
724 | ||
3c216190 | 725 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 726 | |
6973886a GW |
727 | source "drivers/dma/sf-pdma/Kconfig" |
728 | ||
3c216190 | 729 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 730 | |
d88b1397 PU |
731 | source "drivers/dma/ti/Kconfig" |
732 | ||
7fdf9b05 PM |
733 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
734 | ||
32d31c79 AM |
735 | source "drivers/dma/lgm/Kconfig" |
736 | ||
3c216190 | 737 | # clients |
db217334 | 738 | comment "DMA Clients" |
2ed6dc34 | 739 | depends on DMA_ENGINE |
db217334 | 740 | |
729b5d1b DW |
741 | config ASYNC_TX_DMA |
742 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 743 | depends on DMA_ENGINE |
729b5d1b DW |
744 | help |
745 | This allows the async_tx api to take advantage of offload engines for | |
746 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
747 | a dma engine that can perform raid operations and you have enabled | |
748 | MD_RAID456 say Y. | |
749 | ||
750 | If unsure, say N. | |
751 | ||
4a776f0a HS |
752 | config DMATEST |
753 | tristate "DMA Test client" | |
754 | depends on DMA_ENGINE | |
58532e66 | 755 | select DMA_ENGINE_RAID |
4a776f0a HS |
756 | help |
757 | Simple DMA test client. Say N unless you're debugging a | |
758 | DMA Device driver. | |
759 | ||
3cc377b9 DW |
760 | config DMA_ENGINE_RAID |
761 | bool | |
762 | ||
2ed6dc34 | 763 | endif |