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Commit | Line | Data |
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c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
3c216190 VK |
36 | #core |
37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
38 | bool | |
95b4ecbf | 39 | |
3c216190 VK |
40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
41 | bool | |
95b4ecbf | 42 | |
3c216190 | 43 | config DMA_ENGINE |
138f4c35 DW |
44 | bool |
45 | ||
3c216190 VK |
46 | config DMA_VIRTUAL_CHANNELS |
47 | tristate | |
48 | ||
49 | config DMA_ACPI | |
50 | def_bool y | |
51 | depends on ACPI | |
52 | ||
53 | config DMA_OF | |
54 | def_bool y | |
55 | depends on OF | |
56 | select DMA_ENGINE | |
57 | ||
58 | #devices | |
e8689e63 LW |
59 | config AMBA_PL08X |
60 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 61 | depends on ARM_AMBA |
e8689e63 | 62 | select DMA_ENGINE |
083be28a | 63 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
64 | help |
65 | Platform has a PL08x DMAC device | |
66 | which can provide DMA engine support | |
67 | ||
3c216190 VK |
68 | config AMCC_PPC440SPE_ADMA |
69 | tristate "AMCC PPC440SPe ADMA support" | |
70 | depends on 440SPe || 440SP | |
2ed6dc34 | 71 | select DMA_ENGINE |
3cc377b9 | 72 | select DMA_ENGINE_RAID |
3c216190 | 73 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 74 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 75 | help |
3c216190 | 76 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 77 | |
dc78baa2 NF |
78 | config AT_HDMAC |
79 | tristate "Atmel AHB DMA support" | |
f898fed0 | 80 | depends on ARCH_AT91 |
dc78baa2 NF |
81 | select DMA_ENGINE |
82 | help | |
f898fed0 | 83 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 84 | |
e1f7c9ee LD |
85 | config AT_XDMAC |
86 | tristate "Atmel XDMA support" | |
6e5ae29b | 87 | depends on ARCH_AT91 |
e1f7c9ee LD |
88 | select DMA_ENGINE |
89 | help | |
90 | Support the Atmel XDMA controller. | |
2ed6dc34 | 91 | |
3c216190 VK |
92 | config AXI_DMAC |
93 | tristate "Analog Devices AXI-DMAC DMA support" | |
94 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
2ed6dc34 | 95 | select DMA_ENGINE |
3c216190 | 96 | select DMA_VIRTUAL_CHANNELS |
2ed6dc34 | 97 | help |
3c216190 VK |
98 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
99 | controller is often used in Analog Device's reference designs for FPGA | |
100 | platforms. | |
c13c8260 | 101 | |
3c216190 VK |
102 | config COH901318 |
103 | bool "ST-Ericsson COH901318 DMA support" | |
104 | select DMA_ENGINE | |
105 | depends on ARCH_U300 | |
106 | help | |
107 | Enable support for ST-Ericsson COH 901 318 DMA. | |
108 | ||
109 | config DMA_BCM2835 | |
110 | tristate "BCM2835 DMA engine support" | |
111 | depends on ARCH_BCM2835 | |
112 | select DMA_ENGINE | |
113 | select DMA_VIRTUAL_CHANNELS | |
114 | ||
115 | config DMA_JZ4740 | |
116 | tristate "JZ4740 DMA support" | |
117 | depends on MACH_JZ4740 | |
118 | select DMA_ENGINE | |
119 | select DMA_VIRTUAL_CHANNELS | |
120 | ||
121 | config DMA_JZ4780 | |
122 | tristate "JZ4780 DMA support" | |
123 | depends on MACH_JZ4780 | |
667dfed9 AS |
124 | select DMA_ENGINE |
125 | select DMA_VIRTUAL_CHANNELS | |
126 | help | |
3c216190 VK |
127 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
128 | If you have a board based on such a SoC and wish to use DMA for | |
129 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 130 | |
3c216190 VK |
131 | config DMA_OMAP |
132 | tristate "OMAP DMA support" | |
133 | depends on ARCH_OMAP | |
134 | select DMA_ENGINE | |
135 | select DMA_VIRTUAL_CHANNELS | |
136 | select TI_DMA_CROSSBAR if SOC_DRA7XX | |
d5ea7b5e | 137 | |
3c216190 VK |
138 | config DMA_SA11X0 |
139 | tristate "SA-11x0 DMA support" | |
140 | depends on ARCH_SA1100 | |
dc78baa2 | 141 | select DMA_ENGINE |
3c216190 | 142 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 143 | help |
3c216190 VK |
144 | Support the DMA engine found on Intel StrongARM SA-1100 and |
145 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
146 | devices. | |
dc78baa2 | 147 | |
3c216190 VK |
148 | config DMA_SUN4I |
149 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 150 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 151 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 152 | select DMA_ENGINE |
3c216190 VK |
153 | select DMA_OF |
154 | select DMA_VIRTUAL_CHANNELS | |
e1f7c9ee | 155 | help |
3c216190 VK |
156 | Enable support for the DMA controller present in the sun4i, |
157 | sun5i and sun7i Allwinner ARM SoCs. | |
158 | ||
159 | config DMA_SUN6I | |
160 | tristate "Allwinner A31 SoCs DMA support" | |
161 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST | |
162 | depends on RESET_CONTROLLER | |
163 | select DMA_ENGINE | |
164 | select DMA_VIRTUAL_CHANNELS | |
165 | help | |
166 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
167 | ||
168 | config EP93XX_DMA | |
169 | bool "Cirrus Logic EP93xx DMA support" | |
170 | depends on ARCH_EP93XX | |
171 | select DMA_ENGINE | |
172 | help | |
173 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 174 | |
173acc7c | 175 | config FSL_DMA |
8de7a7d9 | 176 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 177 | depends on FSL_SOC |
173acc7c | 178 | select DMA_ENGINE |
5fc6d897 | 179 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 180 | ---help--- |
8de7a7d9 HZ |
181 | Enable support for the Freescale Elo series DMA controllers. |
182 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
183 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
184 | some Txxx and Bxxx parts. | |
173acc7c | 185 | |
3c216190 VK |
186 | config FSL_EDMA |
187 | tristate "Freescale eDMA engine support" | |
188 | depends on OF | |
189 | select DMA_ENGINE | |
190 | select DMA_VIRTUAL_CHANNELS | |
191 | help | |
192 | Support the Freescale eDMA engine with programmable channel | |
193 | multiplexing capability for DMA request sources(slot). | |
194 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
195 | ||
ad80da65 XS |
196 | config FSL_RAID |
197 | tristate "Freescale RAID engine Support" | |
198 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
199 | select DMA_ENGINE | |
200 | select DMA_ENGINE_RAID | |
201 | ---help--- | |
202 | Enable support for Freescale RAID Engine. RAID Engine is | |
203 | available on some QorIQ SoCs (like P5020/P5040). It has | |
204 | the capability to offload memcpy, xor and pq computation | |
205 | for raid5/6. | |
206 | ||
3c216190 VK |
207 | config IMG_MDC_DMA |
208 | tristate "IMG MDC support" | |
209 | depends on MIPS || COMPILE_TEST | |
210 | depends on MFD_SYSCON | |
0fb6f739 | 211 | select DMA_ENGINE |
3c216190 VK |
212 | select DMA_VIRTUAL_CHANNELS |
213 | help | |
214 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 215 | |
3c216190 VK |
216 | config IMX_DMA |
217 | tristate "i.MX DMA support" | |
8e2d41f8 | 218 | depends on ARCH_MXC |
ff7b0479 | 219 | select DMA_ENGINE |
5296b56d | 220 | help |
3c216190 VK |
221 | Support the i.MX DMA engine. This engine is integrated into |
222 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 223 | |
3c216190 VK |
224 | config IMX_SDMA |
225 | tristate "i.MX SDMA support" | |
8e2d41f8 | 226 | depends on ARCH_MXC |
5296b56d | 227 | select DMA_ENGINE |
5296b56d | 228 | help |
3c216190 VK |
229 | Support the i.MX SDMA engine. This engine is integrated into |
230 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 231 | |
9ab8b4e7 | 232 | config INTEL_IDMA64 |
35271227 LT |
233 | tristate "Intel integrated DMA 64-bit support" |
234 | select DMA_ENGINE | |
235 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 236 | help |
35271227 LT |
237 | Enable DMA support for Intel Low Power Subsystem such as found on |
238 | Intel Skylake PCH. | |
5296b56d | 239 | |
3c216190 VK |
240 | config INTEL_IOATDMA |
241 | tristate "Intel I/OAT DMA support" | |
242 | depends on PCI && X86_64 | |
a57e16cf | 243 | select DMA_ENGINE |
3c216190 VK |
244 | select DMA_ENGINE_RAID |
245 | select DCA | |
a57e16cf | 246 | help |
3c216190 VK |
247 | Enable support for the Intel(R) I/OAT DMA engine present |
248 | in recent Intel Xeon chipsets. | |
a57e16cf | 249 | |
3c216190 VK |
250 | Say Y here if you have such a chipset. |
251 | ||
252 | If unsure, say N. | |
253 | ||
254 | config INTEL_IOP_ADMA | |
255 | tristate "Intel IOP ADMA support" | |
256 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
ea76f0b3 | 257 | select DMA_ENGINE |
3c216190 | 258 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 259 | help |
3c216190 | 260 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 261 | |
3c216190 VK |
262 | config INTEL_MIC_X100_DMA |
263 | tristate "Intel MIC X100 DMA Driver" | |
264 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
265 | select DMA_ENGINE |
266 | help | |
3c216190 VK |
267 | This enables DMA support for the Intel Many Integrated Core |
268 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
269 | run a 64 bit Linux OS. This driver will be used by both MIC | |
270 | host and card drivers. | |
ec8a1586 | 271 | |
3c216190 VK |
272 | If you are building host kernel with a MIC device or a card |
273 | kernel for a MIC device, then say M (recommended) or Y, else | |
274 | say N. If unsure say N. | |
275 | ||
276 | More information about the Intel MIC family as well as the Linux | |
277 | OS and tools for MIC to use with this driver are available from | |
278 | <http://software.intel.com/en-us/mic-developer>. | |
279 | ||
280 | config K3_DMA | |
281 | tristate "Hisilicon K3 DMA support" | |
282 | depends on ARCH_HI3xxx | |
ddeccb8d HS |
283 | select DMA_ENGINE |
284 | select DMA_VIRTUAL_CHANNELS | |
285 | help | |
3c216190 VK |
286 | Support the DMA engine for Hisilicon K3 platform |
287 | devices. | |
ddeccb8d | 288 | |
3c216190 VK |
289 | config LPC18XX_DMAMUX |
290 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
291 | depends on ARCH_LPC18XX || COMPILE_TEST | |
292 | depends on OF && AMBA_PL08X | |
293 | select MFD_SYSCON | |
294 | help | |
295 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
296 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 297 | |
3c216190 VK |
298 | config MMP_PDMA |
299 | bool "MMP PDMA support" | |
300 | depends on (ARCH_MMP || ARCH_PXA) | |
61f135b9 | 301 | select DMA_ENGINE |
61f135b9 | 302 | help |
3c216190 | 303 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 304 | |
3c216190 VK |
305 | config MMP_TDMA |
306 | bool "MMP Two-Channel DMA support" | |
307 | depends on ARCH_MMP | |
8d318a50 | 308 | select DMA_ENGINE |
3c216190 | 309 | select MMP_SRAM |
8d318a50 | 310 | help |
3c216190 VK |
311 | Support the MMP Two-Channel DMA engine. |
312 | This engine used for MMP Audio DMA and pxa910 SQU. | |
313 | It needs sram driver under mach-mmp. | |
8d318a50 | 314 | |
3c216190 VK |
315 | config MOXART_DMA |
316 | tristate "MOXART DMA support" | |
317 | depends on ARCH_MOXART | |
12458ea0 | 318 | select DMA_ENGINE |
3c216190 VK |
319 | select DMA_OF |
320 | select DMA_VIRTUAL_CHANNELS | |
12458ea0 | 321 | help |
3c216190 VK |
322 | Enable support for the MOXA ART SoC DMA controller. |
323 | ||
324 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 325 | |
3c216190 VK |
326 | config MPC512X_DMA |
327 | tristate "Freescale MPC512x built-in DMA engine support" | |
328 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 329 | select DMA_ENGINE |
3c216190 VK |
330 | ---help--- |
331 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 332 | |
3c216190 VK |
333 | config MV_XOR |
334 | bool "Marvell XOR engine support" | |
c39290a1 | 335 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 336 | select DMA_ENGINE |
3c216190 VK |
337 | select DMA_ENGINE_RAID |
338 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
339 | ---help--- | |
340 | Enable support for the Marvell XOR engine. | |
ca21a146 | 341 | |
19a340b1 TP |
342 | config MV_XOR_V2 |
343 | bool "Marvell XOR engine version 2 support " | |
344 | depends on ARM64 | |
345 | select DMA_ENGINE | |
346 | select DMA_ENGINE_RAID | |
347 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
348 | select GENERIC_MSI_IRQ_DOMAIN | |
349 | ---help--- | |
350 | Enable support for the Marvell version 2 XOR engine. | |
351 | ||
352 | This engine provides acceleration for copy, XOR and RAID6 | |
353 | operations, and is available on Marvell Armada 7K and 8K | |
354 | platforms. | |
355 | ||
3c216190 VK |
356 | config MXS_DMA |
357 | bool "MXS DMA support" | |
a02eb37a | 358 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL |
3c216190 | 359 | select STMP_DEVICE |
ca21a146 RY |
360 | select DMA_ENGINE |
361 | help | |
3c216190 | 362 | Support the MXS DMA engine. This engine including APBH-DMA |
a02eb37a LW |
363 | and APBX-DMA is integrated into Freescale |
364 | i.MX23/28/MX6Q/MX6DL/MX6UL chips. | |
ca21a146 | 365 | |
3c216190 VK |
366 | config MX3_IPU |
367 | bool "MX3x Image Processing Unit support" | |
368 | depends on ARCH_MXC | |
c2dde5f8 | 369 | select DMA_ENGINE |
3c216190 | 370 | default y |
c2dde5f8 | 371 | help |
3c216190 VK |
372 | If you plan to use the Image Processing unit in the i.MX3x, say |
373 | Y here. If unsure, select Y. | |
a074ae38 | 374 | |
3c216190 VK |
375 | config MX3_IPU_IRQS |
376 | int "Number of dynamically mapped interrupts for IPU" | |
377 | depends on MX3_IPU | |
378 | range 2 137 | |
379 | default 4 | |
380 | help | |
381 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
382 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
383 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 384 | |
3c216190 VK |
385 | config NBPFAXI_DMA |
386 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 387 | select DMA_ENGINE |
3c216190 | 388 | depends on ARM || COMPILE_TEST |
b3040e40 | 389 | help |
3c216190 | 390 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 391 | |
0c42bd0e | 392 | config PCH_DMA |
ca7fe2db | 393 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 394 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
395 | select DMA_ENGINE |
396 | help | |
2cdf2455 TM |
397 | Enable support for Intel EG20T PCH DMA engine. |
398 | ||
e79e72be | 399 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
400 | Output Hub), ML7213, ML7223 and ML7831. |
401 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
402 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
403 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
404 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 405 | |
3c216190 VK |
406 | config PL330_DMA |
407 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 408 | select DMA_ENGINE |
3c216190 | 409 | depends on ARM_AMBA |
1ec1e82f | 410 | help |
3c216190 VK |
411 | Select if your platform has one or more PL330 DMACs. |
412 | You need to provide platform specific settings via | |
413 | platform_data for a dma-pl330 device. | |
1ec1e82f | 414 | |
3c216190 VK |
415 | config PXA_DMA |
416 | bool "PXA DMA support" | |
417 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 418 | select DMA_ENGINE |
3c216190 | 419 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 420 | help |
3c216190 VK |
421 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
422 | platform. The internal DMA IP of all PXA variants is supported, with | |
423 | 16 to 32 channels for peripheral to memory or memory to memory | |
424 | transfers. | |
1f1846c6 | 425 | |
3c216190 VK |
426 | config SIRF_DMA |
427 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
428 | depends on ARCH_SIRF | |
a580b8c5 SG |
429 | select DMA_ENGINE |
430 | help | |
3c216190 | 431 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 432 | |
3c216190 VK |
433 | config STE_DMA40 |
434 | bool "ST-Ericsson DMA40 support" | |
435 | depends on ARCH_U8500 | |
760ee1c4 MW |
436 | select DMA_ENGINE |
437 | help | |
3c216190 | 438 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 439 | |
d8b46839 CM |
440 | config STM32_DMA |
441 | bool "STMicroelectronics STM32 DMA support" | |
442 | depends on ARCH_STM32 | |
443 | select DMA_ENGINE | |
444 | select DMA_OF | |
445 | select DMA_VIRTUAL_CHANNELS | |
446 | help | |
447 | Enable support for the on-chip DMA controller on STMicroelectronics | |
448 | STM32 MCUs. | |
449 | If you have a board based on such a MCU and wish to use DMA say Y or M | |
450 | here. | |
451 | ||
3c216190 | 452 | config S3C24XX_DMAC |
9bdca822 | 453 | bool "Samsung S3C24XX DMA support" |
3c216190 | 454 | depends on ARCH_S3C24XX |
6365bead | 455 | select DMA_ENGINE |
50437bff | 456 | select DMA_VIRTUAL_CHANNELS |
6365bead | 457 | help |
3c216190 VK |
458 | Support for the Samsung S3C24XX DMA controller driver. The |
459 | DMA controller is having multiple DMA channels which can be | |
460 | configured for different peripherals like audio, UART, SPI. | |
461 | The DMA controller can transfer data from memory to peripheral, | |
462 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 463 | |
3c216190 VK |
464 | config TXX9_DMAC |
465 | tristate "Toshiba TXx9 SoC DMA support" | |
466 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
467 | select DMA_ENGINE |
468 | help | |
3c216190 VK |
469 | Support the TXx9 SoC internal DMA controller. This can be |
470 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 471 | |
3c216190 VK |
472 | config TEGRA20_APB_DMA |
473 | bool "NVIDIA Tegra20 APB DMA support" | |
474 | depends on ARCH_TEGRA | |
7bedaa55 | 475 | select DMA_ENGINE |
3c216190 VK |
476 | help |
477 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
478 | DMA controller is having multiple DMA channel which can be | |
479 | configured for different peripherals like audio, UART, SPI, | |
480 | I2C etc which is in APB bus. | |
481 | This DMA controller transfers data from memory to peripheral fifo | |
482 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 483 | |
f46b1957 JH |
484 | config TEGRA210_ADMA |
485 | bool "NVIDIA Tegra210 ADMA support" | |
486 | depends on ARCH_TEGRA_210_SOC | |
487 | select DMA_ENGINE | |
488 | select DMA_VIRTUAL_CHANNELS | |
489 | select PM_CLK | |
490 | help | |
491 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
492 | DMA controller has multiple DMA channels and is used to service | |
493 | various audio clients in the Tegra210 audio processing engine | |
494 | (APE). This DMA controller transfers data from memory to | |
495 | peripheral and vice versa. It does not support memory to | |
496 | memory data transfer. | |
497 | ||
3c216190 VK |
498 | config TIMB_DMA |
499 | tristate "Timberdale FPGA DMA support" | |
500 | depends on MFD_TIMBERDALE | |
96286b57 | 501 | select DMA_ENGINE |
3c216190 VK |
502 | help |
503 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 504 | |
9b3452d1 SAS |
505 | config TI_CPPI41 |
506 | tristate "AM33xx CPPI41 DMA support" | |
507 | depends on ARCH_OMAP | |
508 | select DMA_ENGINE | |
509 | help | |
510 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
511 | is currently used by the USB driver on AM335x platforms. | |
512 | ||
3c216190 VK |
513 | config TI_DMA_CROSSBAR |
514 | bool | |
d894fc60 | 515 | |
3c216190 VK |
516 | config TI_EDMA |
517 | bool "TI EDMA support" | |
518 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE | |
8e6152bc ZG |
519 | select DMA_ENGINE |
520 | select DMA_VIRTUAL_CHANNELS | |
f7c7cae9 | 521 | select TI_DMA_CROSSBAR if ARCH_OMAP |
3c216190 | 522 | default n |
8e6152bc | 523 | help |
3c216190 VK |
524 | Enable support for the TI EDMA controller. This DMA |
525 | engine is found on TI DaVinci and AM33xx parts. | |
8e6152bc | 526 | |
3c216190 VK |
527 | config XGENE_DMA |
528 | tristate "APM X-Gene DMA support" | |
529 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 530 | select DMA_ENGINE |
3c216190 VK |
531 | select DMA_ENGINE_RAID |
532 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 533 | help |
3c216190 | 534 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 535 | |
fde57a7c KA |
536 | config XILINX_DMA |
537 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 538 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
539 | select DMA_ENGINE |
540 | help | |
541 | Enable support for Xilinx AXI VDMA Soft IP. | |
542 | ||
fde57a7c | 543 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
544 | between memory and AXI4-Stream video type target |
545 | peripherals including peripherals which support AXI4- | |
546 | Stream Video Protocol. It has two stream interfaces/ | |
547 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
548 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
549 | AXI CDMA engine provides high-bandwidth direct memory access |
550 | between a memory-mapped source address and a memory-mapped | |
551 | destination address. | |
552 | AXI DMA engine provides high-bandwidth one dimensional direct | |
553 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 554 | |
b0cc417c KA |
555 | config XILINX_ZYNQMP_DMA |
556 | tristate "Xilinx ZynqMP DMA Engine" | |
557 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
558 | select DMA_ENGINE | |
559 | help | |
560 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 561 | |
e3fa9841 JN |
562 | config ZX_DMA |
563 | tristate "ZTE ZX296702 DMA support" | |
564 | depends on ARCH_ZX | |
5689ba7f AB |
565 | select DMA_ENGINE |
566 | select DMA_VIRTUAL_CHANNELS | |
567 | help | |
e3fa9841 | 568 | Support the DMA engine for ZTE ZX296702 platform devices. |
5689ba7f | 569 | |
9f2fd0df | 570 | |
3c216190 VK |
571 | # driver files |
572 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 573 | |
d9b31efc SK |
574 | source "drivers/dma/qcom/Kconfig" |
575 | ||
3c216190 | 576 | source "drivers/dma/dw/Kconfig" |
50437bff | 577 | |
3c216190 | 578 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 579 | |
3c216190 | 580 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 581 | |
3c216190 | 582 | # clients |
db217334 | 583 | comment "DMA Clients" |
2ed6dc34 | 584 | depends on DMA_ENGINE |
db217334 | 585 | |
729b5d1b DW |
586 | config ASYNC_TX_DMA |
587 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 588 | depends on DMA_ENGINE |
729b5d1b DW |
589 | help |
590 | This allows the async_tx api to take advantage of offload engines for | |
591 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
592 | a dma engine that can perform raid operations and you have enabled | |
593 | MD_RAID456 say Y. | |
594 | ||
595 | If unsure, say N. | |
596 | ||
4a776f0a HS |
597 | config DMATEST |
598 | tristate "DMA Test client" | |
599 | depends on DMA_ENGINE | |
600 | help | |
601 | Simple DMA test client. Say N unless you're debugging a | |
602 | DMA Device driver. | |
603 | ||
3cc377b9 DW |
604 | config DMA_ENGINE_RAID |
605 | bool | |
606 | ||
2ed6dc34 | 607 | endif |