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Commit | Line | Data |
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c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
95b4ecbf SY |
36 | config INTEL_MIC_X100_DMA |
37 | tristate "Intel MIC X100 DMA Driver" | |
38 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ce05b686 | 39 | select DMA_ENGINE |
95b4ecbf SY |
40 | help |
41 | This enables DMA support for the Intel Many Integrated Core | |
42 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
43 | run a 64 bit Linux OS. This driver will be used by both MIC | |
44 | host and card drivers. | |
45 | ||
46 | If you are building host kernel with a MIC device or a card | |
47 | kernel for a MIC device, then say M (recommended) or Y, else | |
48 | say N. If unsure say N. | |
49 | ||
50 | More information about the Intel MIC family as well as the Linux | |
51 | OS and tools for MIC to use with this driver are available from | |
52 | <http://software.intel.com/en-us/mic-developer>. | |
53 | ||
b3c567e4 VK |
54 | config INTEL_MID_DMAC |
55 | tristate "Intel MID DMA support for Peripheral DMA controllers" | |
56 | depends on PCI && X86 | |
57 | select DMA_ENGINE | |
58 | default n | |
59 | help | |
60 | Enable support for the Intel(R) MID DMA engine present | |
61 | in Intel MID chipsets. | |
62 | ||
63 | Say Y here if you have such a chipset. | |
64 | ||
65 | If unsure, say N. | |
66 | ||
5fc6d897 | 67 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
138f4c35 DW |
68 | bool |
69 | ||
e8689e63 LW |
70 | config AMBA_PL08X |
71 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 72 | depends on ARM_AMBA |
e8689e63 | 73 | select DMA_ENGINE |
083be28a | 74 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
75 | help |
76 | Platform has a PL08x DMAC device | |
77 | which can provide DMA engine support | |
78 | ||
2ed6dc34 SN |
79 | config INTEL_IOATDMA |
80 | tristate "Intel I/OAT DMA support" | |
81 | depends on PCI && X86 | |
82 | select DMA_ENGINE | |
3cc377b9 | 83 | select DMA_ENGINE_RAID |
2ed6dc34 SN |
84 | select DCA |
85 | help | |
86 | Enable support for the Intel(R) I/OAT DMA engine present | |
87 | in recent Intel Xeon chipsets. | |
88 | ||
89 | Say Y here if you have such a chipset. | |
90 | ||
91 | If unsure, say N. | |
92 | ||
93 | config INTEL_IOP_ADMA | |
94 | tristate "Intel IOP ADMA support" | |
95 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
2ed6dc34 | 96 | select DMA_ENGINE |
5fc6d897 | 97 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 SN |
98 | help |
99 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 100 | |
61a76496 | 101 | source "drivers/dma/dw/Kconfig" |
d5ea7b5e | 102 | |
dc78baa2 NF |
103 | config AT_HDMAC |
104 | tristate "Atmel AHB DMA support" | |
f898fed0 | 105 | depends on ARCH_AT91 |
dc78baa2 NF |
106 | select DMA_ENGINE |
107 | help | |
f898fed0 | 108 | Support the Atmel AHB DMA controller. |
dc78baa2 | 109 | |
173acc7c | 110 | config FSL_DMA |
8de7a7d9 | 111 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 112 | depends on FSL_SOC |
173acc7c | 113 | select DMA_ENGINE |
5fc6d897 | 114 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 115 | ---help--- |
8de7a7d9 HZ |
116 | Enable support for the Freescale Elo series DMA controllers. |
117 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
118 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
119 | some Txxx and Bxxx parts. | |
173acc7c | 120 | |
0fb6f739 PZ |
121 | config MPC512X_DMA |
122 | tristate "Freescale MPC512x built-in DMA engine support" | |
ba2eea25 | 123 | depends on PPC_MPC512x || PPC_MPC831x |
0fb6f739 PZ |
124 | select DMA_ENGINE |
125 | ---help--- | |
126 | Enable support for the Freescale MPC512x built-in DMA engine. | |
127 | ||
9a322993 PDM |
128 | source "drivers/dma/bestcomm/Kconfig" |
129 | ||
ff7b0479 SB |
130 | config MV_XOR |
131 | bool "Marvell XOR engine support" | |
132 | depends on PLAT_ORION | |
ff7b0479 | 133 | select DMA_ENGINE |
3cc377b9 | 134 | select DMA_ENGINE_RAID |
5fc6d897 | 135 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ff7b0479 SB |
136 | ---help--- |
137 | Enable support for the Marvell XOR engine. | |
138 | ||
5296b56d GL |
139 | config MX3_IPU |
140 | bool "MX3x Image Processing Unit support" | |
8e2d41f8 | 141 | depends on ARCH_MXC |
5296b56d GL |
142 | select DMA_ENGINE |
143 | default y | |
144 | help | |
145 | If you plan to use the Image Processing unit in the i.MX3x, say | |
146 | Y here. If unsure, select Y. | |
147 | ||
148 | config MX3_IPU_IRQS | |
149 | int "Number of dynamically mapped interrupts for IPU" | |
150 | depends on MX3_IPU | |
151 | range 2 137 | |
152 | default 4 | |
153 | help | |
154 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
155 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
156 | number of IRQ slots and map them dynamically to specific sources. | |
157 | ||
ea76f0b3 AN |
158 | config TXX9_DMAC |
159 | tristate "Toshiba TXx9 SoC DMA support" | |
160 | depends on MACH_TX49XX || MACH_TX39XX | |
161 | select DMA_ENGINE | |
162 | help | |
163 | Support the TXx9 SoC internal DMA controller. This can be | |
164 | integrated in chips such as the Toshiba TX4927/38/39. | |
165 | ||
ec8a1586 LD |
166 | config TEGRA20_APB_DMA |
167 | bool "NVIDIA Tegra20 APB DMA support" | |
168 | depends on ARCH_TEGRA | |
169 | select DMA_ENGINE | |
170 | help | |
171 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
172 | DMA controller is having multiple DMA channel which can be | |
173 | configured for different peripherals like audio, UART, SPI, | |
174 | I2C etc which is in APB bus. | |
175 | This DMA controller transfers data from memory to peripheral fifo | |
176 | or vice versa. It does not support memory to memory data transfer. | |
177 | ||
ddeccb8d HS |
178 | config S3C24XX_DMAC |
179 | tristate "Samsung S3C24XX DMA support" | |
180 | depends on ARCH_S3C24XX && !S3C24XX_DMA | |
181 | select DMA_ENGINE | |
182 | select DMA_VIRTUAL_CHANNELS | |
183 | help | |
184 | Support for the Samsung S3C24XX DMA controller driver. The | |
185 | DMA controller is having multiple DMA channels which can be | |
186 | configured for different peripherals like audio, UART, SPI. | |
187 | The DMA controller can transfer data from memory to peripheral, | |
188 | periphal to memory, periphal to periphal and memory to memory. | |
189 | ||
189b4ee8 | 190 | source "drivers/dma/sh/Kconfig" |
d8902adc | 191 | |
61f135b9 LW |
192 | config COH901318 |
193 | bool "ST-Ericsson COH901318 DMA support" | |
194 | select DMA_ENGINE | |
195 | depends on ARCH_U300 | |
196 | help | |
197 | Enable support for ST-Ericsson COH 901 318 DMA. | |
198 | ||
8d318a50 LW |
199 | config STE_DMA40 |
200 | bool "ST-Ericsson DMA40 support" | |
201 | depends on ARCH_U8500 | |
202 | select DMA_ENGINE | |
203 | help | |
204 | Support for ST-Ericsson DMA40 controller | |
205 | ||
12458ea0 AG |
206 | config AMCC_PPC440SPE_ADMA |
207 | tristate "AMCC PPC440SPe ADMA support" | |
208 | depends on 440SPe || 440SP | |
209 | select DMA_ENGINE | |
3cc377b9 | 210 | select DMA_ENGINE_RAID |
12458ea0 | 211 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 212 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
12458ea0 AG |
213 | help |
214 | Enable support for the AMCC PPC440SPe RAID engines. | |
215 | ||
de5d4453 RR |
216 | config TIMB_DMA |
217 | tristate "Timberdale FPGA DMA support" | |
2dda47d1 | 218 | depends on MFD_TIMBERDALE |
de5d4453 RR |
219 | select DMA_ENGINE |
220 | help | |
221 | Enable support for the Timberdale FPGA DMA engine. | |
222 | ||
ca21a146 | 223 | config SIRF_DMA |
f7d935dc BS |
224 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
225 | depends on ARCH_SIRF | |
ca21a146 RY |
226 | select DMA_ENGINE |
227 | help | |
228 | Enable support for the CSR SiRFprimaII DMA engine. | |
229 | ||
c2dde5f8 | 230 | config TI_EDMA |
76448041 | 231 | bool "TI EDMA support" |
e7ed8b40 | 232 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
c2dde5f8 MP |
233 | select DMA_ENGINE |
234 | select DMA_VIRTUAL_CHANNELS | |
c2b9e974 | 235 | select TI_PRIV_EDMA |
c2dde5f8 MP |
236 | default n |
237 | help | |
238 | Enable support for the TI EDMA controller. This DMA | |
239 | engine is found on TI DaVinci and AM33xx parts. | |
240 | ||
12458ea0 AG |
241 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
242 | bool | |
243 | ||
b3040e40 JB |
244 | config PL330_DMA |
245 | tristate "DMA API Driver for PL330" | |
246 | select DMA_ENGINE | |
1b9bb715 | 247 | depends on ARM_AMBA |
b3040e40 JB |
248 | help |
249 | Select if your platform has one or more PL330 DMACs. | |
250 | You need to provide platform specific settings via | |
251 | platform_data for a dma-pl330 device. | |
252 | ||
0c42bd0e | 253 | config PCH_DMA |
ca7fe2db | 254 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 255 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
256 | select DMA_ENGINE |
257 | help | |
2cdf2455 TM |
258 | Enable support for Intel EG20T PCH DMA engine. |
259 | ||
e79e72be | 260 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
261 | Output Hub), ML7213, ML7223 and ML7831. |
262 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
263 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
264 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
265 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 266 | |
1ec1e82f SH |
267 | config IMX_SDMA |
268 | tristate "i.MX SDMA support" | |
8e2d41f8 | 269 | depends on ARCH_MXC |
1ec1e82f SH |
270 | select DMA_ENGINE |
271 | help | |
272 | Support the i.MX SDMA engine. This engine is integrated into | |
8e2d41f8 | 273 | Freescale i.MX25/31/35/51/53 chips. |
1ec1e82f | 274 | |
1f1846c6 SH |
275 | config IMX_DMA |
276 | tristate "i.MX DMA support" | |
5b2e02e4 | 277 | depends on ARCH_MXC |
1f1846c6 SH |
278 | select DMA_ENGINE |
279 | help | |
280 | Support the i.MX DMA engine. This engine is integrated into | |
281 | Freescale i.MX1/21/27 chips. | |
282 | ||
a580b8c5 SG |
283 | config MXS_DMA |
284 | bool "MXS DMA support" | |
f5c55847 | 285 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
f5b7efcc | 286 | select STMP_DEVICE |
a580b8c5 SG |
287 | select DMA_ENGINE |
288 | help | |
289 | Support the MXS DMA engine. This engine including APBH-DMA | |
654fa249 | 290 | and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips. |
a580b8c5 | 291 | |
760ee1c4 MW |
292 | config EP93XX_DMA |
293 | bool "Cirrus Logic EP93xx DMA support" | |
294 | depends on ARCH_EP93XX | |
295 | select DMA_ENGINE | |
296 | help | |
297 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
298 | ||
6365bead RK |
299 | config DMA_SA11X0 |
300 | tristate "SA-11x0 DMA support" | |
301 | depends on ARCH_SA1100 | |
302 | select DMA_ENGINE | |
50437bff | 303 | select DMA_VIRTUAL_CHANNELS |
6365bead RK |
304 | help |
305 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
306 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
307 | devices. | |
308 | ||
c6da0ba8 ZG |
309 | config MMP_TDMA |
310 | bool "MMP Two-Channel DMA support" | |
49d57b5e | 311 | depends on ARCH_MMP |
c6da0ba8 | 312 | select DMA_ENGINE |
b9f10a10 | 313 | select MMP_SRAM |
c6da0ba8 ZG |
314 | help |
315 | Support the MMP Two-Channel DMA engine. | |
316 | This engine used for MMP Audio DMA and pxa910 SQU. | |
b9f10a10 | 317 | It needs sram driver under mach-mmp. |
c6da0ba8 ZG |
318 | |
319 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
320 | ||
7bedaa55 RK |
321 | config DMA_OMAP |
322 | tristate "OMAP DMA support" | |
323 | depends on ARCH_OMAP | |
324 | select DMA_ENGINE | |
325 | select DMA_VIRTUAL_CHANNELS | |
326 | ||
96286b57 FM |
327 | config DMA_BCM2835 |
328 | tristate "BCM2835 DMA engine support" | |
dd1ed372 | 329 | depends on ARCH_BCM2835 |
96286b57 FM |
330 | select DMA_ENGINE |
331 | select DMA_VIRTUAL_CHANNELS | |
332 | ||
9b3452d1 SAS |
333 | config TI_CPPI41 |
334 | tristate "AM33xx CPPI41 DMA support" | |
335 | depends on ARCH_OMAP | |
336 | select DMA_ENGINE | |
337 | help | |
338 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
339 | is currently used by the USB driver on AM335x platforms. | |
340 | ||
c8acd6aa ZG |
341 | config MMP_PDMA |
342 | bool "MMP PDMA support" | |
343 | depends on (ARCH_MMP || ARCH_PXA) | |
344 | select DMA_ENGINE | |
345 | help | |
8c88126b | 346 | Support the MMP PDMA engine for PXA and MMP platform. |
c8acd6aa | 347 | |
7c169a42 LPC |
348 | config DMA_JZ4740 |
349 | tristate "JZ4740 DMA support" | |
350 | depends on MACH_JZ4740 | |
351 | select DMA_ENGINE | |
352 | select DMA_VIRTUAL_CHANNELS | |
353 | ||
8e6152bc ZG |
354 | config K3_DMA |
355 | tristate "Hisilicon K3 DMA support" | |
356 | depends on ARCH_HI3xxx | |
357 | select DMA_ENGINE | |
358 | select DMA_VIRTUAL_CHANNELS | |
359 | help | |
360 | Support the DMA engine for Hisilicon K3 platform | |
361 | devices. | |
362 | ||
5f9e685a JJ |
363 | config MOXART_DMA |
364 | tristate "MOXART DMA support" | |
365 | depends on ARCH_MOXART | |
366 | select DMA_ENGINE | |
e803d988 | 367 | select DMA_OF |
5f9e685a JJ |
368 | select DMA_VIRTUAL_CHANNELS |
369 | help | |
370 | Enable support for the MOXA ART SoC DMA controller. | |
d6be34fb JL |
371 | |
372 | config FSL_EDMA | |
373 | tristate "Freescale eDMA engine support" | |
374 | depends on OF | |
375 | select DMA_ENGINE | |
376 | select DMA_VIRTUAL_CHANNELS | |
377 | help | |
378 | Support the Freescale eDMA engine with programmable channel | |
379 | multiplexing capability for DMA request sources(slot). | |
380 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
5f9e685a | 381 | |
9cd4360d ST |
382 | config XILINX_VDMA |
383 | tristate "Xilinx AXI VDMA Engine" | |
384 | depends on (ARCH_ZYNQ || MICROBLAZE) | |
385 | select DMA_ENGINE | |
386 | help | |
387 | Enable support for Xilinx AXI VDMA Soft IP. | |
388 | ||
389 | This engine provides high-bandwidth direct memory access | |
390 | between memory and AXI4-Stream video type target | |
391 | peripherals including peripherals which support AXI4- | |
392 | Stream Video Protocol. It has two stream interfaces/ | |
393 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
394 | Memory Mapped (S2MM) for the data transfers. | |
395 | ||
55585930 MR |
396 | config DMA_SUN6I |
397 | tristate "Allwinner A31 SoCs DMA support" | |
398 | depends on MACH_SUN6I || COMPILE_TEST | |
a0bbe990 | 399 | depends on RESET_CONTROLLER |
55585930 MR |
400 | select DMA_ENGINE |
401 | select DMA_VIRTUAL_CHANNELS | |
402 | help | |
403 | Support for the DMA engine for Allwinner A31 SoCs. | |
404 | ||
b45b262c GL |
405 | config NBPFAXI_DMA |
406 | tristate "Renesas Type-AXI NBPF DMA support" | |
407 | select DMA_ENGINE | |
cfc6abc3 | 408 | depends on ARM || COMPILE_TEST |
b45b262c GL |
409 | help |
410 | Support for "Type-AXI" NBPF DMA IPs from Renesas | |
411 | ||
c13c8260 | 412 | config DMA_ENGINE |
2ed6dc34 | 413 | bool |
c13c8260 | 414 | |
50437bff RK |
415 | config DMA_VIRTUAL_CHANNELS |
416 | tristate | |
417 | ||
1b2e98bc AS |
418 | config DMA_ACPI |
419 | def_bool y | |
420 | depends on ACPI | |
421 | ||
5fa422c9 VK |
422 | config DMA_OF |
423 | def_bool y | |
424 | depends on OF | |
2795eedf | 425 | select DMA_ENGINE |
5fa422c9 | 426 | |
db217334 | 427 | comment "DMA Clients" |
2ed6dc34 | 428 | depends on DMA_ENGINE |
db217334 CL |
429 | |
430 | config NET_DMA | |
431 | bool "Network: TCP receive copy offload" | |
432 | depends on DMA_ENGINE && NET | |
9c402f4e | 433 | default (INTEL_IOATDMA || FSL_DMA) |
77873803 | 434 | depends on BROKEN |
2ed6dc34 | 435 | help |
db217334 CL |
436 | This enables the use of DMA engines in the network stack to |
437 | offload receive copy-to-user operations, freeing CPU cycles. | |
9c402f4e DW |
438 | |
439 | Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise | |
440 | say N. | |
db217334 | 441 | |
729b5d1b DW |
442 | config ASYNC_TX_DMA |
443 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 444 | depends on DMA_ENGINE |
729b5d1b DW |
445 | help |
446 | This allows the async_tx api to take advantage of offload engines for | |
447 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
448 | a dma engine that can perform raid operations and you have enabled | |
449 | MD_RAID456 say Y. | |
450 | ||
451 | If unsure, say N. | |
452 | ||
4a776f0a HS |
453 | config DMATEST |
454 | tristate "DMA Test client" | |
455 | depends on DMA_ENGINE | |
456 | help | |
457 | Simple DMA test client. Say N unless you're debugging a | |
458 | DMA Device driver. | |
459 | ||
3cc377b9 DW |
460 | config DMA_ENGINE_RAID |
461 | bool | |
462 | ||
e7c0fe2a AG |
463 | config QCOM_BAM_DMA |
464 | tristate "QCOM BAM DMA support" | |
465 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) | |
466 | select DMA_ENGINE | |
467 | select DMA_VIRTUAL_CHANNELS | |
468 | ---help--- | |
469 | Enable support for the QCOM BAM DMA controller. This controller | |
470 | provides DMA capabilities for a variety of on-chip devices. | |
471 | ||
2ed6dc34 | 472 | endif |