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Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 LW |
17 | config DMADEVICES_DEBUG |
18 | bool "DMA Engine debugging" | |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
23 | ||
24 | config DMADEVICES_VDEBUG | |
25 | bool "DMA Engine verbose debugging" | |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
31 | ||
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
62 | select DMA_ENGINE | |
63 | help | |
64 | Enable support for Altera / Intel mSGDMA controller. | |
65 | ||
e8689e63 LW |
66 | config AMBA_PL08X |
67 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 68 | depends on ARM_AMBA |
e8689e63 | 69 | select DMA_ENGINE |
083be28a | 70 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 71 | help |
1e1cfc72 LW |
72 | Say yes if your platform has a PL08x DMAC device which can |
73 | provide DMA engine support. This includes the original ARM | |
74 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
75 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 76 | |
3c216190 VK |
77 | config AMCC_PPC440SPE_ADMA |
78 | tristate "AMCC PPC440SPe ADMA support" | |
79 | depends on 440SPe || 440SP | |
2ed6dc34 | 80 | select DMA_ENGINE |
3cc377b9 | 81 | select DMA_ENGINE_RAID |
3c216190 | 82 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 83 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 84 | help |
3c216190 | 85 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 86 | |
dc78baa2 NF |
87 | config AT_HDMAC |
88 | tristate "Atmel AHB DMA support" | |
f898fed0 | 89 | depends on ARCH_AT91 |
dc78baa2 NF |
90 | select DMA_ENGINE |
91 | help | |
f898fed0 | 92 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 93 | |
e1f7c9ee LD |
94 | config AT_XDMAC |
95 | tristate "Atmel XDMA support" | |
6e5ae29b | 96 | depends on ARCH_AT91 |
e1f7c9ee LD |
97 | select DMA_ENGINE |
98 | help | |
99 | Support the Atmel XDMA controller. | |
2ed6dc34 | 100 | |
3c216190 VK |
101 | config AXI_DMAC |
102 | tristate "Analog Devices AXI-DMAC DMA support" | |
23b84639 | 103 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 104 | select DMA_ENGINE |
3c216190 | 105 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 106 | select REGMAP_MMIO |
2ed6dc34 | 107 | help |
3c216190 VK |
108 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
109 | controller is often used in Analog Device's reference designs for FPGA | |
110 | platforms. | |
c13c8260 | 111 | |
743e1c8f AP |
112 | config BCM_SBA_RAID |
113 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
114 | depends on ARM64 || COMPILE_TEST |
115 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
116 | select DMA_ENGINE |
117 | select DMA_ENGINE_RAID | |
118 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
119 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 120 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
121 | help |
122 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
123 | engine is available on most of the Broadcom iProc SoCs. It | |
124 | has the capability to offload memcpy, xor and pq computation | |
125 | for raid5/6. | |
126 | ||
3c216190 VK |
127 | config COH901318 |
128 | bool "ST-Ericsson COH901318 DMA support" | |
129 | select DMA_ENGINE | |
6e450376 | 130 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
131 | help |
132 | Enable support for ST-Ericsson COH 901 318 DMA. | |
133 | ||
134 | config DMA_BCM2835 | |
135 | tristate "BCM2835 DMA engine support" | |
136 | depends on ARCH_BCM2835 | |
137 | select DMA_ENGINE | |
138 | select DMA_VIRTUAL_CHANNELS | |
139 | ||
3c216190 VK |
140 | config DMA_JZ4780 |
141 | tristate "JZ4780 DMA support" | |
c558ecd2 | 142 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
143 | select DMA_ENGINE |
144 | select DMA_VIRTUAL_CHANNELS | |
145 | help | |
3c216190 VK |
146 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
147 | If you have a board based on such a SoC and wish to use DMA for | |
148 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 149 | |
3c216190 VK |
150 | config DMA_SA11X0 |
151 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 152 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 153 | select DMA_ENGINE |
3c216190 | 154 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 155 | help |
3c216190 VK |
156 | Support the DMA engine found on Intel StrongARM SA-1100 and |
157 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
158 | devices. | |
dc78baa2 | 159 | |
3c216190 VK |
160 | config DMA_SUN4I |
161 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 162 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 163 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 164 | select DMA_ENGINE |
3c216190 | 165 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 166 | help |
3c216190 VK |
167 | Enable support for the DMA controller present in the sun4i, |
168 | sun5i and sun7i Allwinner ARM SoCs. | |
169 | ||
170 | config DMA_SUN6I | |
171 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 172 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
173 | depends on RESET_CONTROLLER |
174 | select DMA_ENGINE | |
175 | select DMA_VIRTUAL_CHANNELS | |
176 | help | |
177 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
178 | ||
1fe20f1b EP |
179 | config DW_AXI_DMAC |
180 | tristate "Synopsys DesignWare AXI DMA support" | |
181 | depends on OF || COMPILE_TEST | |
182 | select DMA_ENGINE | |
183 | select DMA_VIRTUAL_CHANNELS | |
184 | help | |
185 | Enable support for Synopsys DesignWare AXI DMA controller. | |
186 | NOTE: This driver wasn't tested on 64 bit platform because | |
187 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
188 | ||
3c216190 VK |
189 | config EP93XX_DMA |
190 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 191 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
192 | select DMA_ENGINE |
193 | help | |
194 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 195 | |
173acc7c | 196 | config FSL_DMA |
8de7a7d9 | 197 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 198 | depends on FSL_SOC |
173acc7c | 199 | select DMA_ENGINE |
5fc6d897 | 200 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 201 | ---help--- |
8de7a7d9 HZ |
202 | Enable support for the Freescale Elo series DMA controllers. |
203 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
204 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
205 | some Txxx and Bxxx parts. | |
173acc7c | 206 | |
3c216190 VK |
207 | config FSL_EDMA |
208 | tristate "Freescale eDMA engine support" | |
209 | depends on OF | |
210 | select DMA_ENGINE | |
211 | select DMA_VIRTUAL_CHANNELS | |
212 | help | |
213 | Support the Freescale eDMA engine with programmable channel | |
214 | multiplexing capability for DMA request sources(slot). | |
215 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
216 | ||
b092529e PM |
217 | config FSL_QDMA |
218 | tristate "NXP Layerscape qDMA engine support" | |
219 | depends on ARM || ARM64 | |
220 | select DMA_ENGINE | |
221 | select DMA_VIRTUAL_CHANNELS | |
222 | select DMA_ENGINE_RAID | |
223 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
224 | help | |
225 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
226 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
227 | or dequeuing DMA jobs from, different work queues. | |
228 | This module can be found on NXP Layerscape SoCs. | |
229 | The qdma driver only work on SoCs with a DPAA hardware block. | |
230 | ||
ad80da65 XS |
231 | config FSL_RAID |
232 | tristate "Freescale RAID engine Support" | |
233 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
234 | select DMA_ENGINE | |
235 | select DMA_ENGINE_RAID | |
236 | ---help--- | |
237 | Enable support for Freescale RAID Engine. RAID Engine is | |
238 | available on some QorIQ SoCs (like P5020/P5040). It has | |
239 | the capability to offload memcpy, xor and pq computation | |
240 | for raid5/6. | |
241 | ||
3c216190 VK |
242 | config IMG_MDC_DMA |
243 | tristate "IMG MDC support" | |
244 | depends on MIPS || COMPILE_TEST | |
245 | depends on MFD_SYSCON | |
0fb6f739 | 246 | select DMA_ENGINE |
3c216190 VK |
247 | select DMA_VIRTUAL_CHANNELS |
248 | help | |
249 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 250 | |
3c216190 VK |
251 | config IMX_DMA |
252 | tristate "i.MX DMA support" | |
8e2d41f8 | 253 | depends on ARCH_MXC |
ff7b0479 | 254 | select DMA_ENGINE |
5296b56d | 255 | help |
3c216190 VK |
256 | Support the i.MX DMA engine. This engine is integrated into |
257 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 258 | |
3c216190 VK |
259 | config IMX_SDMA |
260 | tristate "i.MX SDMA support" | |
8e2d41f8 | 261 | depends on ARCH_MXC |
5296b56d | 262 | select DMA_ENGINE |
57b772b8 | 263 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 264 | help |
3c216190 VK |
265 | Support the i.MX SDMA engine. This engine is integrated into |
266 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 267 | |
9ab8b4e7 | 268 | config INTEL_IDMA64 |
35271227 LT |
269 | tristate "Intel integrated DMA 64-bit support" |
270 | select DMA_ENGINE | |
271 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 272 | help |
35271227 LT |
273 | Enable DMA support for Intel Low Power Subsystem such as found on |
274 | Intel Skylake PCH. | |
5296b56d | 275 | |
3c216190 VK |
276 | config INTEL_IOATDMA |
277 | tristate "Intel I/OAT DMA support" | |
278 | depends on PCI && X86_64 | |
a57e16cf | 279 | select DMA_ENGINE |
3c216190 VK |
280 | select DMA_ENGINE_RAID |
281 | select DCA | |
a57e16cf | 282 | help |
3c216190 VK |
283 | Enable support for the Intel(R) I/OAT DMA engine present |
284 | in recent Intel Xeon chipsets. | |
a57e16cf | 285 | |
3c216190 VK |
286 | Say Y here if you have such a chipset. |
287 | ||
288 | If unsure, say N. | |
289 | ||
290 | config INTEL_IOP_ADMA | |
aad7ad2a | 291 | tristate "Intel IOP32x ADMA support" |
04cbfba6 | 292 | depends on ARCH_IOP32X || COMPILE_TEST |
ea76f0b3 | 293 | select DMA_ENGINE |
3c216190 | 294 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 295 | help |
3c216190 | 296 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 297 | |
3c216190 VK |
298 | config INTEL_MIC_X100_DMA |
299 | tristate "Intel MIC X100 DMA Driver" | |
300 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
301 | select DMA_ENGINE |
302 | help | |
3c216190 VK |
303 | This enables DMA support for the Intel Many Integrated Core |
304 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
305 | run a 64 bit Linux OS. This driver will be used by both MIC | |
306 | host and card drivers. | |
ec8a1586 | 307 | |
3c216190 VK |
308 | If you are building host kernel with a MIC device or a card |
309 | kernel for a MIC device, then say M (recommended) or Y, else | |
310 | say N. If unsure say N. | |
311 | ||
312 | More information about the Intel MIC family as well as the Linux | |
313 | OS and tools for MIC to use with this driver are available from | |
314 | <http://software.intel.com/en-us/mic-developer>. | |
315 | ||
316 | config K3_DMA | |
317 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 318 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
319 | select DMA_ENGINE |
320 | select DMA_VIRTUAL_CHANNELS | |
321 | help | |
3c216190 VK |
322 | Support the DMA engine for Hisilicon K3 platform |
323 | devices. | |
ddeccb8d | 324 | |
3c216190 VK |
325 | config LPC18XX_DMAMUX |
326 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
327 | depends on ARCH_LPC18XX || COMPILE_TEST | |
328 | depends on OF && AMBA_PL08X | |
329 | select MFD_SYSCON | |
330 | help | |
331 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
332 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 333 | |
e7a3ff92 AD |
334 | config MCF_EDMA |
335 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
336 | depends on M5441x || COMPILE_TEST | |
337 | select DMA_ENGINE | |
338 | select DMA_VIRTUAL_CHANNELS | |
339 | help | |
340 | Support the Freescale ColdFire eDMA engine, 64-channel | |
341 | implementation that performs complex data transfers with | |
342 | minimal intervention from a host processor. | |
343 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
344 | ||
6c3214e6 JB |
345 | config MILBEAUT_HDMAC |
346 | tristate "Milbeaut AHB DMA support" | |
347 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
348 | depends on OF | |
349 | select DMA_ENGINE | |
350 | select DMA_VIRTUAL_CHANNELS | |
351 | help | |
352 | Say yes here to support the Socionext Milbeaut | |
353 | HDMAC device. | |
354 | ||
a6e9be05 JB |
355 | config MILBEAUT_XDMAC |
356 | tristate "Milbeaut AXI DMA support" | |
357 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
358 | depends on OF | |
359 | select DMA_ENGINE | |
360 | select DMA_VIRTUAL_CHANNELS | |
361 | help | |
362 | Say yes here to support the Socionext Milbeaut | |
363 | XDMAC device. | |
364 | ||
3c216190 VK |
365 | config MMP_PDMA |
366 | bool "MMP PDMA support" | |
cd3a792a | 367 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 368 | select DMA_ENGINE |
61f135b9 | 369 | help |
3c216190 | 370 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 371 | |
3c216190 VK |
372 | config MMP_TDMA |
373 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 374 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 375 | select DMA_ENGINE |
93d05f1e | 376 | select MMP_SRAM if ARCH_MMP |
d6619761 | 377 | select GENERIC_ALLOCATOR |
8d318a50 | 378 | help |
3c216190 VK |
379 | Support the MMP Two-Channel DMA engine. |
380 | This engine used for MMP Audio DMA and pxa910 SQU. | |
381 | It needs sram driver under mach-mmp. | |
8d318a50 | 382 | |
3c216190 VK |
383 | config MOXART_DMA |
384 | tristate "MOXART DMA support" | |
385 | depends on ARCH_MOXART | |
12458ea0 | 386 | select DMA_ENGINE |
3c216190 | 387 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 388 | help |
3c216190 VK |
389 | Enable support for the MOXA ART SoC DMA controller. |
390 | ||
391 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 392 | |
3c216190 VK |
393 | config MPC512X_DMA |
394 | tristate "Freescale MPC512x built-in DMA engine support" | |
395 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 396 | select DMA_ENGINE |
3c216190 VK |
397 | ---help--- |
398 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 399 | |
3c216190 VK |
400 | config MV_XOR |
401 | bool "Marvell XOR engine support" | |
c39290a1 | 402 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 403 | select DMA_ENGINE |
3c216190 VK |
404 | select DMA_ENGINE_RAID |
405 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
406 | ---help--- | |
407 | Enable support for the Marvell XOR engine. | |
ca21a146 | 408 | |
19a340b1 TP |
409 | config MV_XOR_V2 |
410 | bool "Marvell XOR engine version 2 support " | |
411 | depends on ARM64 | |
412 | select DMA_ENGINE | |
413 | select DMA_ENGINE_RAID | |
414 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
415 | select GENERIC_MSI_IRQ_DOMAIN | |
416 | ---help--- | |
417 | Enable support for the Marvell version 2 XOR engine. | |
418 | ||
419 | This engine provides acceleration for copy, XOR and RAID6 | |
420 | operations, and is available on Marvell Armada 7K and 8K | |
421 | platforms. | |
422 | ||
3c216190 VK |
423 | config MXS_DMA |
424 | bool "MXS DMA support" | |
d762e4f3 | 425 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 426 | select STMP_DEVICE |
ca21a146 RY |
427 | select DMA_ENGINE |
428 | help | |
3c216190 | 429 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 430 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 431 | |
3c216190 VK |
432 | config MX3_IPU |
433 | bool "MX3x Image Processing Unit support" | |
434 | depends on ARCH_MXC | |
c2dde5f8 | 435 | select DMA_ENGINE |
3c216190 | 436 | default y |
c2dde5f8 | 437 | help |
3c216190 VK |
438 | If you plan to use the Image Processing unit in the i.MX3x, say |
439 | Y here. If unsure, select Y. | |
a074ae38 | 440 | |
3c216190 VK |
441 | config MX3_IPU_IRQS |
442 | int "Number of dynamically mapped interrupts for IPU" | |
443 | depends on MX3_IPU | |
444 | range 2 137 | |
445 | default 4 | |
446 | help | |
447 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
448 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
449 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 450 | |
3c216190 VK |
451 | config NBPFAXI_DMA |
452 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 453 | select DMA_ENGINE |
3c216190 | 454 | depends on ARM || COMPILE_TEST |
b3040e40 | 455 | help |
3c216190 | 456 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 457 | |
47e20577 MS |
458 | config OWL_DMA |
459 | tristate "Actions Semi Owl SoCs DMA support" | |
460 | depends on ARCH_ACTIONS | |
461 | select DMA_ENGINE | |
462 | select DMA_VIRTUAL_CHANNELS | |
463 | help | |
464 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
465 | ||
0c42bd0e | 466 | config PCH_DMA |
ca7fe2db | 467 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 468 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
469 | select DMA_ENGINE |
470 | help | |
2cdf2455 TM |
471 | Enable support for Intel EG20T PCH DMA engine. |
472 | ||
e79e72be | 473 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
474 | Output Hub), ML7213, ML7223 and ML7831. |
475 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
476 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
477 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
478 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 479 | |
3c216190 VK |
480 | config PL330_DMA |
481 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 482 | select DMA_ENGINE |
3c216190 | 483 | depends on ARM_AMBA |
1ec1e82f | 484 | help |
3c216190 VK |
485 | Select if your platform has one or more PL330 DMACs. |
486 | You need to provide platform specific settings via | |
487 | platform_data for a dma-pl330 device. | |
1ec1e82f | 488 | |
3c216190 VK |
489 | config PXA_DMA |
490 | bool "PXA DMA support" | |
491 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 492 | select DMA_ENGINE |
3c216190 | 493 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 494 | help |
3c216190 VK |
495 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
496 | platform. The internal DMA IP of all PXA variants is supported, with | |
497 | 16 to 32 channels for peripheral to memory or memory to memory | |
498 | transfers. | |
1f1846c6 | 499 | |
3c216190 VK |
500 | config SIRF_DMA |
501 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
502 | depends on ARCH_SIRF | |
a580b8c5 SG |
503 | select DMA_ENGINE |
504 | help | |
3c216190 | 505 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 506 | |
3c216190 VK |
507 | config STE_DMA40 |
508 | bool "ST-Ericsson DMA40 support" | |
509 | depends on ARCH_U8500 | |
760ee1c4 MW |
510 | select DMA_ENGINE |
511 | help | |
3c216190 | 512 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 513 | |
6b4cd727 PG |
514 | config ST_FDMA |
515 | tristate "ST FDMA dmaengine support" | |
516 | depends on ARCH_STI | |
3d6b3715 | 517 | depends on REMOTEPROC |
6b4cd727 PG |
518 | select ST_SLIM_REMOTEPROC |
519 | select DMA_ENGINE | |
520 | select DMA_VIRTUAL_CHANNELS | |
521 | help | |
522 | Enable support for ST FDMA controller. | |
523 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
524 | ||
525 | Say Y here if you have such a chipset. | |
526 | If unsure, say N. | |
527 | ||
d8b46839 CM |
528 | config STM32_DMA |
529 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 530 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 531 | select DMA_ENGINE |
d8b46839 CM |
532 | select DMA_VIRTUAL_CHANNELS |
533 | help | |
534 | Enable support for the on-chip DMA controller on STMicroelectronics | |
535 | STM32 MCUs. | |
ddf9bd40 | 536 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
537 | here. |
538 | ||
df7e762d PYM |
539 | config STM32_DMAMUX |
540 | bool "STMicroelectronics STM32 dma multiplexer support" | |
541 | depends on STM32_DMA || COMPILE_TEST | |
542 | help | |
543 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
544 | STM32 MCUs. | |
545 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
546 | here. | |
547 | ||
a4ffb13c PYM |
548 | config STM32_MDMA |
549 | bool "STMicroelectronics STM32 master dma support" | |
550 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 551 | depends on OF |
a4ffb13c | 552 | select DMA_ENGINE |
a4ffb13c PYM |
553 | select DMA_VIRTUAL_CHANNELS |
554 | help | |
555 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
556 | STM32 platforms. | |
557 | If you have a board based on STM32 SoC and wish to use the master DMA | |
558 | say Y here. | |
559 | ||
9b3b8171 BW |
560 | config SPRD_DMA |
561 | tristate "Spreadtrum DMA support" | |
562 | depends on ARCH_SPRD || COMPILE_TEST | |
563 | select DMA_ENGINE | |
564 | select DMA_VIRTUAL_CHANNELS | |
565 | help | |
566 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
567 | ||
3c216190 | 568 | config S3C24XX_DMAC |
9bdca822 | 569 | bool "Samsung S3C24XX DMA support" |
1609db6f | 570 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 571 | select DMA_ENGINE |
50437bff | 572 | select DMA_VIRTUAL_CHANNELS |
6365bead | 573 | help |
3c216190 VK |
574 | Support for the Samsung S3C24XX DMA controller driver. The |
575 | DMA controller is having multiple DMA channels which can be | |
576 | configured for different peripherals like audio, UART, SPI. | |
577 | The DMA controller can transfer data from memory to peripheral, | |
578 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 579 | |
3c216190 VK |
580 | config TXX9_DMAC |
581 | tristate "Toshiba TXx9 SoC DMA support" | |
582 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
583 | select DMA_ENGINE |
584 | help | |
3c216190 VK |
585 | Support the TXx9 SoC internal DMA controller. This can be |
586 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 587 | |
3c216190 VK |
588 | config TEGRA20_APB_DMA |
589 | bool "NVIDIA Tegra20 APB DMA support" | |
590 | depends on ARCH_TEGRA | |
7bedaa55 | 591 | select DMA_ENGINE |
3c216190 VK |
592 | help |
593 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
594 | DMA controller is having multiple DMA channel which can be | |
595 | configured for different peripherals like audio, UART, SPI, | |
596 | I2C etc which is in APB bus. | |
597 | This DMA controller transfers data from memory to peripheral fifo | |
598 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 599 | |
f46b1957 | 600 | config TEGRA210_ADMA |
3ed16793 | 601 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 602 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
603 | select DMA_ENGINE |
604 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
605 | help |
606 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
607 | DMA controller has multiple DMA channels and is used to service | |
608 | various audio clients in the Tegra210 audio processing engine | |
609 | (APE). This DMA controller transfers data from memory to | |
610 | peripheral and vice versa. It does not support memory to | |
611 | memory data transfer. | |
612 | ||
3c216190 VK |
613 | config TIMB_DMA |
614 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 615 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 616 | select DMA_ENGINE |
3c216190 VK |
617 | help |
618 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 619 | |
32e74aab MY |
620 | config UNIPHIER_MDMAC |
621 | tristate "UniPhier MIO DMAC" | |
622 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
623 | depends on OF | |
624 | select DMA_ENGINE | |
625 | select DMA_VIRTUAL_CHANNELS | |
626 | help | |
627 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
628 | UniPhier platform. This DMA controller is used as the external | |
629 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
630 | ||
3c216190 VK |
631 | config XGENE_DMA |
632 | tristate "APM X-Gene DMA support" | |
633 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 634 | select DMA_ENGINE |
3c216190 VK |
635 | select DMA_ENGINE_RAID |
636 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 637 | help |
3c216190 | 638 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 639 | |
fde57a7c KA |
640 | config XILINX_DMA |
641 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 642 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
643 | select DMA_ENGINE |
644 | help | |
645 | Enable support for Xilinx AXI VDMA Soft IP. | |
646 | ||
fde57a7c | 647 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
648 | between memory and AXI4-Stream video type target |
649 | peripherals including peripherals which support AXI4- | |
650 | Stream Video Protocol. It has two stream interfaces/ | |
651 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
652 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
653 | AXI CDMA engine provides high-bandwidth direct memory access |
654 | between a memory-mapped source address and a memory-mapped | |
655 | destination address. | |
656 | AXI DMA engine provides high-bandwidth one dimensional direct | |
657 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
658 | AXI MCDMA engine provides high-bandwidth direct memory access |
659 | between memory and AXI4-Stream target peripherals. It provides | |
660 | the scatter gather interface with multiple channels independent | |
661 | configuration support. | |
9cd4360d | 662 | |
b0cc417c KA |
663 | config XILINX_ZYNQMP_DMA |
664 | tristate "Xilinx ZynqMP DMA Engine" | |
665 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
666 | select DMA_ENGINE | |
667 | help | |
668 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 669 | |
e3fa9841 | 670 | config ZX_DMA |
253f9f44 | 671 | tristate "ZTE ZX DMA support" |
854d4bd2 | 672 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
673 | select DMA_ENGINE |
674 | select DMA_VIRTUAL_CHANNELS | |
675 | help | |
253f9f44 | 676 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 677 | |
9f2fd0df | 678 | |
3c216190 VK |
679 | # driver files |
680 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 681 | |
548c4597 SW |
682 | source "drivers/dma/mediatek/Kconfig" |
683 | ||
d9b31efc SK |
684 | source "drivers/dma/qcom/Kconfig" |
685 | ||
3c216190 | 686 | source "drivers/dma/dw/Kconfig" |
50437bff | 687 | |
e63d79d1 GP |
688 | source "drivers/dma/dw-edma/Kconfig" |
689 | ||
3c216190 | 690 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 691 | |
6973886a GW |
692 | source "drivers/dma/sf-pdma/Kconfig" |
693 | ||
3c216190 | 694 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 695 | |
d88b1397 PU |
696 | source "drivers/dma/ti/Kconfig" |
697 | ||
7fdf9b05 PM |
698 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
699 | ||
3c216190 | 700 | # clients |
db217334 | 701 | comment "DMA Clients" |
2ed6dc34 | 702 | depends on DMA_ENGINE |
db217334 | 703 | |
729b5d1b DW |
704 | config ASYNC_TX_DMA |
705 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 706 | depends on DMA_ENGINE |
729b5d1b DW |
707 | help |
708 | This allows the async_tx api to take advantage of offload engines for | |
709 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
710 | a dma engine that can perform raid operations and you have enabled | |
711 | MD_RAID456 say Y. | |
712 | ||
713 | If unsure, say N. | |
714 | ||
4a776f0a HS |
715 | config DMATEST |
716 | tristate "DMA Test client" | |
717 | depends on DMA_ENGINE | |
58532e66 | 718 | select DMA_ENGINE_RAID |
4a776f0a HS |
719 | help |
720 | Simple DMA test client. Say N unless you're debugging a | |
721 | DMA Device driver. | |
722 | ||
3cc377b9 DW |
723 | config DMA_ENGINE_RAID |
724 | bool | |
725 | ||
2ed6dc34 | 726 | endif |