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Debugging options for the DMA engine subsystem
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c13c8260
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1#
2# DMA engine configuration
3#
4
2ed6dc34 5menuconfig DMADEVICES
6d4f5879 6 bool "DMA Engine support"
04ce9ab3 7 depends on HAS_DMA
2ed6dc34 8 help
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9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
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12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
2ed6dc34 15
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16config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
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32if DMADEVICES
33
34comment "DMA Devices"
35
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36config ASYNC_TX_DISABLE_CHANNEL_SWITCH
37 bool
38
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39config INTEL_IOATDMA
40 tristate "Intel I/OAT DMA support"
41 depends on PCI && X86
42 select DMA_ENGINE
43 select DCA
138f4c35 44 select ASYNC_TX_DISABLE_CHANNEL_SWITCH
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45 select ASYNC_TX_DISABLE_PQ_VAL_DMA
46 select ASYNC_TX_DISABLE_XOR_VAL_DMA
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47 help
48 Enable support for the Intel(R) I/OAT DMA engine present
49 in recent Intel Xeon chipsets.
50
51 Say Y here if you have such a chipset.
52
53 If unsure, say N.
54
55config INTEL_IOP_ADMA
56 tristate "Intel IOP ADMA support"
57 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
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58 select DMA_ENGINE
59 help
60 Enable support for the Intel(R) IOP Series RAID engines.
c13c8260 61
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62config DW_DMAC
63 tristate "Synopsys DesignWare AHB DMA support"
64 depends on AVR32
65 select DMA_ENGINE
66 default y if CPU_AT32AP7000
67 help
68 Support the Synopsys DesignWare AHB DMA controller. This
69 can be integrated in chips such as the Atmel AT32ap7000.
70
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71config AT_HDMAC
72 tristate "Atmel AHB DMA support"
cd3abf98 73 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
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74 select DMA_ENGINE
75 help
76 Support the Atmel AHB DMA controller. This can be integrated in
77 chips such as the Atmel AT91SAM9RL.
78
173acc7c 79config FSL_DMA
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80 tristate "Freescale Elo and Elo Plus DMA support"
81 depends on FSL_SOC
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82 select DMA_ENGINE
83 ---help---
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84 Enable support for the Freescale Elo and Elo Plus DMA controllers.
85 The Elo is the DMA controller on some 82xx and 83xx parts, and the
86 Elo Plus is the DMA controller on 85xx and 86xx parts.
173acc7c 87
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88config MV_XOR
89 bool "Marvell XOR engine support"
90 depends on PLAT_ORION
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91 select DMA_ENGINE
92 ---help---
93 Enable support for the Marvell XOR engine.
94
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95config MX3_IPU
96 bool "MX3x Image Processing Unit support"
97 depends on ARCH_MX3
98 select DMA_ENGINE
99 default y
100 help
101 If you plan to use the Image Processing unit in the i.MX3x, say
102 Y here. If unsure, select Y.
103
104config MX3_IPU_IRQS
105 int "Number of dynamically mapped interrupts for IPU"
106 depends on MX3_IPU
107 range 2 137
108 default 4
109 help
110 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
111 To avoid bloating the irq_desc[] array we allocate a sufficient
112 number of IRQ slots and map them dynamically to specific sources.
113
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114config TXX9_DMAC
115 tristate "Toshiba TXx9 SoC DMA support"
116 depends on MACH_TX49XX || MACH_TX39XX
117 select DMA_ENGINE
118 help
119 Support the TXx9 SoC internal DMA controller. This can be
120 integrated in chips such as the Toshiba TX4927/38/39.
121
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122config SH_DMAE
123 tristate "Renesas SuperH DMAC support"
124 depends on SUPERH && SH_DMA
125 depends on !SH_DMA_API
126 select DMA_ENGINE
127 help
128 Enable support for the Renesas SuperH DMA controllers.
129
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130config COH901318
131 bool "ST-Ericsson COH901318 DMA support"
132 select DMA_ENGINE
133 depends on ARCH_U300
134 help
135 Enable support for ST-Ericsson COH 901 318 DMA.
136
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137config AMCC_PPC440SPE_ADMA
138 tristate "AMCC PPC440SPe ADMA support"
139 depends on 440SPe || 440SP
140 select DMA_ENGINE
141 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
142 help
143 Enable support for the AMCC PPC440SPe RAID engines.
144
145config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
146 bool
147
c13c8260 148config DMA_ENGINE
2ed6dc34 149 bool
c13c8260 150
db217334 151comment "DMA Clients"
2ed6dc34 152 depends on DMA_ENGINE
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153
154config NET_DMA
155 bool "Network: TCP receive copy offload"
156 depends on DMA_ENGINE && NET
9c402f4e 157 default (INTEL_IOATDMA || FSL_DMA)
2ed6dc34 158 help
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159 This enables the use of DMA engines in the network stack to
160 offload receive copy-to-user operations, freeing CPU cycles.
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161
162 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
163 say N.
db217334 164
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165config ASYNC_TX_DMA
166 bool "Async_tx: Offload support for the async_tx api"
9a8de639 167 depends on DMA_ENGINE
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168 help
169 This allows the async_tx api to take advantage of offload engines for
170 memcpy, memset, xor, and raid6 p+q operations. If your platform has
171 a dma engine that can perform raid operations and you have enabled
172 MD_RAID456 say Y.
173
174 If unsure, say N.
175
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176config DMATEST
177 tristate "DMA Test client"
178 depends on DMA_ENGINE
179 help
180 Simple DMA test client. Say N unless you're debugging a
181 DMA Device driver.
182
2ed6dc34 183endif