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Commit | Line | Data |
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c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
95b4ecbf SY |
36 | config INTEL_MIC_X100_DMA |
37 | tristate "Intel MIC X100 DMA Driver" | |
38 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ce05b686 | 39 | select DMA_ENGINE |
95b4ecbf SY |
40 | help |
41 | This enables DMA support for the Intel Many Integrated Core | |
42 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
43 | run a 64 bit Linux OS. This driver will be used by both MIC | |
44 | host and card drivers. | |
45 | ||
46 | If you are building host kernel with a MIC device or a card | |
47 | kernel for a MIC device, then say M (recommended) or Y, else | |
48 | say N. If unsure say N. | |
49 | ||
50 | More information about the Intel MIC family as well as the Linux | |
51 | OS and tools for MIC to use with this driver are available from | |
52 | <http://software.intel.com/en-us/mic-developer>. | |
53 | ||
5fc6d897 | 54 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
138f4c35 DW |
55 | bool |
56 | ||
e8689e63 LW |
57 | config AMBA_PL08X |
58 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 59 | depends on ARM_AMBA |
e8689e63 | 60 | select DMA_ENGINE |
083be28a | 61 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
62 | help |
63 | Platform has a PL08x DMAC device | |
64 | which can provide DMA engine support | |
65 | ||
e5f4ae84 JE |
66 | config LPC18XX_DMAMUX |
67 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
68 | depends on ARCH_LPC18XX || COMPILE_TEST | |
69 | depends on OF && AMBA_PL08X | |
70 | select MFD_SYSCON | |
71 | help | |
72 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
73 | with PL080 and multiplexed DMA request lines. | |
74 | ||
2ed6dc34 SN |
75 | config INTEL_IOATDMA |
76 | tristate "Intel I/OAT DMA support" | |
aaecdebc | 77 | depends on PCI && X86_64 |
2ed6dc34 | 78 | select DMA_ENGINE |
3cc377b9 | 79 | select DMA_ENGINE_RAID |
2ed6dc34 SN |
80 | select DCA |
81 | help | |
82 | Enable support for the Intel(R) I/OAT DMA engine present | |
83 | in recent Intel Xeon chipsets. | |
84 | ||
85 | Say Y here if you have such a chipset. | |
86 | ||
87 | If unsure, say N. | |
88 | ||
89 | config INTEL_IOP_ADMA | |
90 | tristate "Intel IOP ADMA support" | |
91 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
2ed6dc34 | 92 | select DMA_ENGINE |
5fc6d897 | 93 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 SN |
94 | help |
95 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 96 | |
61a76496 | 97 | source "drivers/dma/dw/Kconfig" |
d5ea7b5e | 98 | |
dc78baa2 NF |
99 | config AT_HDMAC |
100 | tristate "Atmel AHB DMA support" | |
f898fed0 | 101 | depends on ARCH_AT91 |
dc78baa2 NF |
102 | select DMA_ENGINE |
103 | help | |
f898fed0 | 104 | Support the Atmel AHB DMA controller. |
dc78baa2 | 105 | |
e1f7c9ee LD |
106 | config AT_XDMAC |
107 | tristate "Atmel XDMA support" | |
6e5ae29b | 108 | depends on ARCH_AT91 |
e1f7c9ee LD |
109 | select DMA_ENGINE |
110 | help | |
111 | Support the Atmel XDMA controller. | |
112 | ||
173acc7c | 113 | config FSL_DMA |
8de7a7d9 | 114 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 115 | depends on FSL_SOC |
173acc7c | 116 | select DMA_ENGINE |
5fc6d897 | 117 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 118 | ---help--- |
8de7a7d9 HZ |
119 | Enable support for the Freescale Elo series DMA controllers. |
120 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
121 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
122 | some Txxx and Bxxx parts. | |
173acc7c | 123 | |
ad80da65 XS |
124 | config FSL_RAID |
125 | tristate "Freescale RAID engine Support" | |
126 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
127 | select DMA_ENGINE | |
128 | select DMA_ENGINE_RAID | |
129 | ---help--- | |
130 | Enable support for Freescale RAID Engine. RAID Engine is | |
131 | available on some QorIQ SoCs (like P5020/P5040). It has | |
132 | the capability to offload memcpy, xor and pq computation | |
133 | for raid5/6. | |
134 | ||
2b49e0c5 AS |
135 | source "drivers/dma/hsu/Kconfig" |
136 | ||
0fb6f739 PZ |
137 | config MPC512X_DMA |
138 | tristate "Freescale MPC512x built-in DMA engine support" | |
ba2eea25 | 139 | depends on PPC_MPC512x || PPC_MPC831x |
0fb6f739 PZ |
140 | select DMA_ENGINE |
141 | ---help--- | |
142 | Enable support for the Freescale MPC512x built-in DMA engine. | |
143 | ||
9a322993 PDM |
144 | source "drivers/dma/bestcomm/Kconfig" |
145 | ||
ff7b0479 SB |
146 | config MV_XOR |
147 | bool "Marvell XOR engine support" | |
148 | depends on PLAT_ORION | |
ff7b0479 | 149 | select DMA_ENGINE |
3cc377b9 | 150 | select DMA_ENGINE_RAID |
5fc6d897 | 151 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ff7b0479 SB |
152 | ---help--- |
153 | Enable support for the Marvell XOR engine. | |
154 | ||
5296b56d GL |
155 | config MX3_IPU |
156 | bool "MX3x Image Processing Unit support" | |
8e2d41f8 | 157 | depends on ARCH_MXC |
5296b56d GL |
158 | select DMA_ENGINE |
159 | default y | |
160 | help | |
161 | If you plan to use the Image Processing unit in the i.MX3x, say | |
162 | Y here. If unsure, select Y. | |
163 | ||
164 | config MX3_IPU_IRQS | |
165 | int "Number of dynamically mapped interrupts for IPU" | |
166 | depends on MX3_IPU | |
167 | range 2 137 | |
168 | default 4 | |
169 | help | |
170 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
171 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
172 | number of IRQ slots and map them dynamically to specific sources. | |
173 | ||
a57e16cf RJ |
174 | config PXA_DMA |
175 | bool "PXA DMA support" | |
176 | depends on (ARCH_MMP || ARCH_PXA) | |
177 | select DMA_ENGINE | |
178 | select DMA_VIRTUAL_CHANNELS | |
179 | help | |
180 | Support the DMA engine for PXA. It is also compatible with MMP PDMA | |
181 | platform. The internal DMA IP of all PXA variants is supported, with | |
182 | 16 to 32 channels for peripheral to memory or memory to memory | |
183 | transfers. | |
184 | ||
ea76f0b3 AN |
185 | config TXX9_DMAC |
186 | tristate "Toshiba TXx9 SoC DMA support" | |
187 | depends on MACH_TX49XX || MACH_TX39XX | |
188 | select DMA_ENGINE | |
189 | help | |
190 | Support the TXx9 SoC internal DMA controller. This can be | |
191 | integrated in chips such as the Toshiba TX4927/38/39. | |
192 | ||
ec8a1586 LD |
193 | config TEGRA20_APB_DMA |
194 | bool "NVIDIA Tegra20 APB DMA support" | |
195 | depends on ARCH_TEGRA | |
196 | select DMA_ENGINE | |
197 | help | |
198 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
199 | DMA controller is having multiple DMA channel which can be | |
200 | configured for different peripherals like audio, UART, SPI, | |
201 | I2C etc which is in APB bus. | |
202 | This DMA controller transfers data from memory to peripheral fifo | |
203 | or vice versa. It does not support memory to memory data transfer. | |
204 | ||
ddeccb8d HS |
205 | config S3C24XX_DMAC |
206 | tristate "Samsung S3C24XX DMA support" | |
d50b9e2e | 207 | depends on ARCH_S3C24XX |
ddeccb8d HS |
208 | select DMA_ENGINE |
209 | select DMA_VIRTUAL_CHANNELS | |
210 | help | |
211 | Support for the Samsung S3C24XX DMA controller driver. The | |
212 | DMA controller is having multiple DMA channels which can be | |
213 | configured for different peripherals like audio, UART, SPI. | |
214 | The DMA controller can transfer data from memory to peripheral, | |
215 | periphal to memory, periphal to periphal and memory to memory. | |
216 | ||
189b4ee8 | 217 | source "drivers/dma/sh/Kconfig" |
d8902adc | 218 | |
61f135b9 LW |
219 | config COH901318 |
220 | bool "ST-Ericsson COH901318 DMA support" | |
221 | select DMA_ENGINE | |
222 | depends on ARCH_U300 | |
223 | help | |
224 | Enable support for ST-Ericsson COH 901 318 DMA. | |
225 | ||
8d318a50 LW |
226 | config STE_DMA40 |
227 | bool "ST-Ericsson DMA40 support" | |
228 | depends on ARCH_U8500 | |
229 | select DMA_ENGINE | |
230 | help | |
231 | Support for ST-Ericsson DMA40 controller | |
232 | ||
12458ea0 AG |
233 | config AMCC_PPC440SPE_ADMA |
234 | tristate "AMCC PPC440SPe ADMA support" | |
235 | depends on 440SPe || 440SP | |
236 | select DMA_ENGINE | |
3cc377b9 | 237 | select DMA_ENGINE_RAID |
12458ea0 | 238 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 239 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
12458ea0 AG |
240 | help |
241 | Enable support for the AMCC PPC440SPe RAID engines. | |
242 | ||
de5d4453 RR |
243 | config TIMB_DMA |
244 | tristate "Timberdale FPGA DMA support" | |
2dda47d1 | 245 | depends on MFD_TIMBERDALE |
de5d4453 RR |
246 | select DMA_ENGINE |
247 | help | |
248 | Enable support for the Timberdale FPGA DMA engine. | |
249 | ||
ca21a146 | 250 | config SIRF_DMA |
f7d935dc BS |
251 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
252 | depends on ARCH_SIRF | |
ca21a146 RY |
253 | select DMA_ENGINE |
254 | help | |
255 | Enable support for the CSR SiRFprimaII DMA engine. | |
256 | ||
c2dde5f8 | 257 | config TI_EDMA |
76448041 | 258 | bool "TI EDMA support" |
e7ed8b40 | 259 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
c2dde5f8 MP |
260 | select DMA_ENGINE |
261 | select DMA_VIRTUAL_CHANNELS | |
c2b9e974 | 262 | select TI_PRIV_EDMA |
c2dde5f8 MP |
263 | default n |
264 | help | |
265 | Enable support for the TI EDMA controller. This DMA | |
266 | engine is found on TI DaVinci and AM33xx parts. | |
267 | ||
a074ae38 PU |
268 | config TI_DMA_CROSSBAR |
269 | bool | |
270 | ||
12458ea0 AG |
271 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
272 | bool | |
273 | ||
b3040e40 JB |
274 | config PL330_DMA |
275 | tristate "DMA API Driver for PL330" | |
276 | select DMA_ENGINE | |
1b9bb715 | 277 | depends on ARM_AMBA |
b3040e40 JB |
278 | help |
279 | Select if your platform has one or more PL330 DMACs. | |
280 | You need to provide platform specific settings via | |
281 | platform_data for a dma-pl330 device. | |
282 | ||
0c42bd0e | 283 | config PCH_DMA |
ca7fe2db | 284 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 285 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
286 | select DMA_ENGINE |
287 | help | |
2cdf2455 TM |
288 | Enable support for Intel EG20T PCH DMA engine. |
289 | ||
e79e72be | 290 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
291 | Output Hub), ML7213, ML7223 and ML7831. |
292 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
293 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
294 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
295 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 296 | |
1ec1e82f SH |
297 | config IMX_SDMA |
298 | tristate "i.MX SDMA support" | |
8e2d41f8 | 299 | depends on ARCH_MXC |
1ec1e82f SH |
300 | select DMA_ENGINE |
301 | help | |
302 | Support the i.MX SDMA engine. This engine is integrated into | |
50cf5534 | 303 | Freescale i.MX25/31/35/51/53/6 chips. |
1ec1e82f | 304 | |
1f1846c6 SH |
305 | config IMX_DMA |
306 | tristate "i.MX DMA support" | |
5b2e02e4 | 307 | depends on ARCH_MXC |
1f1846c6 SH |
308 | select DMA_ENGINE |
309 | help | |
310 | Support the i.MX DMA engine. This engine is integrated into | |
311 | Freescale i.MX1/21/27 chips. | |
312 | ||
a580b8c5 SG |
313 | config MXS_DMA |
314 | bool "MXS DMA support" | |
f5c55847 | 315 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
f5b7efcc | 316 | select STMP_DEVICE |
a580b8c5 SG |
317 | select DMA_ENGINE |
318 | help | |
319 | Support the MXS DMA engine. This engine including APBH-DMA | |
654fa249 | 320 | and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips. |
a580b8c5 | 321 | |
760ee1c4 MW |
322 | config EP93XX_DMA |
323 | bool "Cirrus Logic EP93xx DMA support" | |
324 | depends on ARCH_EP93XX | |
325 | select DMA_ENGINE | |
326 | help | |
327 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
328 | ||
6365bead RK |
329 | config DMA_SA11X0 |
330 | tristate "SA-11x0 DMA support" | |
331 | depends on ARCH_SA1100 | |
332 | select DMA_ENGINE | |
50437bff | 333 | select DMA_VIRTUAL_CHANNELS |
6365bead RK |
334 | help |
335 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
336 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
337 | devices. | |
338 | ||
c6da0ba8 ZG |
339 | config MMP_TDMA |
340 | bool "MMP Two-Channel DMA support" | |
49d57b5e | 341 | depends on ARCH_MMP |
c6da0ba8 | 342 | select DMA_ENGINE |
b9f10a10 | 343 | select MMP_SRAM |
c6da0ba8 ZG |
344 | help |
345 | Support the MMP Two-Channel DMA engine. | |
346 | This engine used for MMP Audio DMA and pxa910 SQU. | |
b9f10a10 | 347 | It needs sram driver under mach-mmp. |
c6da0ba8 ZG |
348 | |
349 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
350 | ||
7bedaa55 RK |
351 | config DMA_OMAP |
352 | tristate "OMAP DMA support" | |
353 | depends on ARCH_OMAP | |
354 | select DMA_ENGINE | |
355 | select DMA_VIRTUAL_CHANNELS | |
a074ae38 | 356 | select TI_DMA_CROSSBAR if SOC_DRA7XX |
7bedaa55 | 357 | |
96286b57 FM |
358 | config DMA_BCM2835 |
359 | tristate "BCM2835 DMA engine support" | |
dd1ed372 | 360 | depends on ARCH_BCM2835 |
96286b57 FM |
361 | select DMA_ENGINE |
362 | select DMA_VIRTUAL_CHANNELS | |
363 | ||
9b3452d1 SAS |
364 | config TI_CPPI41 |
365 | tristate "AM33xx CPPI41 DMA support" | |
366 | depends on ARCH_OMAP | |
367 | select DMA_ENGINE | |
368 | help | |
369 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
370 | is currently used by the USB driver on AM335x platforms. | |
371 | ||
c8acd6aa ZG |
372 | config MMP_PDMA |
373 | bool "MMP PDMA support" | |
374 | depends on (ARCH_MMP || ARCH_PXA) | |
375 | select DMA_ENGINE | |
376 | help | |
8c88126b | 377 | Support the MMP PDMA engine for PXA and MMP platform. |
c8acd6aa | 378 | |
7c169a42 LPC |
379 | config DMA_JZ4740 |
380 | tristate "JZ4740 DMA support" | |
381 | depends on MACH_JZ4740 | |
382 | select DMA_ENGINE | |
383 | select DMA_VIRTUAL_CHANNELS | |
384 | ||
d894fc60 AS |
385 | config DMA_JZ4780 |
386 | tristate "JZ4780 DMA support" | |
387 | depends on MACH_JZ4780 | |
388 | select DMA_ENGINE | |
389 | select DMA_VIRTUAL_CHANNELS | |
390 | help | |
391 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. | |
392 | If you have a board based on such a SoC and wish to use DMA for | |
393 | devices which can use the DMA controller, say Y or M here. | |
394 | ||
8e6152bc ZG |
395 | config K3_DMA |
396 | tristate "Hisilicon K3 DMA support" | |
397 | depends on ARCH_HI3xxx | |
398 | select DMA_ENGINE | |
399 | select DMA_VIRTUAL_CHANNELS | |
400 | help | |
401 | Support the DMA engine for Hisilicon K3 platform | |
402 | devices. | |
403 | ||
5f9e685a JJ |
404 | config MOXART_DMA |
405 | tristate "MOXART DMA support" | |
406 | depends on ARCH_MOXART | |
407 | select DMA_ENGINE | |
e803d988 | 408 | select DMA_OF |
5f9e685a JJ |
409 | select DMA_VIRTUAL_CHANNELS |
410 | help | |
411 | Enable support for the MOXA ART SoC DMA controller. | |
d6be34fb JL |
412 | |
413 | config FSL_EDMA | |
414 | tristate "Freescale eDMA engine support" | |
415 | depends on OF | |
416 | select DMA_ENGINE | |
417 | select DMA_VIRTUAL_CHANNELS | |
418 | help | |
419 | Support the Freescale eDMA engine with programmable channel | |
420 | multiplexing capability for DMA request sources(slot). | |
421 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
5f9e685a | 422 | |
9cd4360d ST |
423 | config XILINX_VDMA |
424 | tristate "Xilinx AXI VDMA Engine" | |
425 | depends on (ARCH_ZYNQ || MICROBLAZE) | |
426 | select DMA_ENGINE | |
427 | help | |
428 | Enable support for Xilinx AXI VDMA Soft IP. | |
429 | ||
430 | This engine provides high-bandwidth direct memory access | |
431 | between memory and AXI4-Stream video type target | |
432 | peripherals including peripherals which support AXI4- | |
433 | Stream Video Protocol. It has two stream interfaces/ | |
434 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
435 | Memory Mapped (S2MM) for the data transfers. | |
436 | ||
b096c137 EL |
437 | config DMA_SUN4I |
438 | tristate "Allwinner A10 DMA SoCs support" | |
439 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || COMPILE_TEST | |
440 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) | |
441 | select DMA_ENGINE | |
442 | select DMA_OF | |
443 | select DMA_VIRTUAL_CHANNELS | |
444 | help | |
445 | Enable support for the DMA controller present in the sun4i, | |
446 | sun5i and sun7i Allwinner ARM SoCs. | |
447 | ||
55585930 MR |
448 | config DMA_SUN6I |
449 | tristate "Allwinner A31 SoCs DMA support" | |
0b04ddf8 | 450 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST |
a0bbe990 | 451 | depends on RESET_CONTROLLER |
55585930 MR |
452 | select DMA_ENGINE |
453 | select DMA_VIRTUAL_CHANNELS | |
454 | help | |
0b04ddf8 | 455 | Support for the DMA engine first found in Allwinner A31 SoCs. |
55585930 | 456 | |
b45b262c GL |
457 | config NBPFAXI_DMA |
458 | tristate "Renesas Type-AXI NBPF DMA support" | |
459 | select DMA_ENGINE | |
cfc6abc3 | 460 | depends on ARM || COMPILE_TEST |
b45b262c GL |
461 | help |
462 | Support for "Type-AXI" NBPF DMA IPs from Renesas | |
463 | ||
5689ba7f AB |
464 | config IMG_MDC_DMA |
465 | tristate "IMG MDC support" | |
466 | depends on MIPS || COMPILE_TEST | |
467 | depends on MFD_SYSCON | |
468 | select DMA_ENGINE | |
469 | select DMA_VIRTUAL_CHANNELS | |
470 | help | |
471 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
472 | ||
9f2fd0df RPS |
473 | config XGENE_DMA |
474 | tristate "APM X-Gene DMA support" | |
80166146 | 475 | depends on ARCH_XGENE || COMPILE_TEST |
9f2fd0df RPS |
476 | select DMA_ENGINE |
477 | select DMA_ENGINE_RAID | |
478 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
479 | help | |
480 | Enable support for the APM X-Gene SoC DMA engine. | |
e3fa9841 JN |
481 | config ZX_DMA |
482 | tristate "ZTE ZX296702 DMA support" | |
483 | depends on ARCH_ZX | |
484 | select DMA_ENGINE | |
485 | select DMA_VIRTUAL_CHANNELS | |
486 | help | |
487 | Support the DMA engine for ZTE ZX296702 platform devices. | |
9f2fd0df | 488 | |
c13c8260 | 489 | config DMA_ENGINE |
2ed6dc34 | 490 | bool |
c13c8260 | 491 | |
50437bff RK |
492 | config DMA_VIRTUAL_CHANNELS |
493 | tristate | |
494 | ||
1b2e98bc AS |
495 | config DMA_ACPI |
496 | def_bool y | |
497 | depends on ACPI | |
498 | ||
5fa422c9 VK |
499 | config DMA_OF |
500 | def_bool y | |
501 | depends on OF | |
2795eedf | 502 | select DMA_ENGINE |
5fa422c9 | 503 | |
db217334 | 504 | comment "DMA Clients" |
2ed6dc34 | 505 | depends on DMA_ENGINE |
db217334 | 506 | |
729b5d1b DW |
507 | config ASYNC_TX_DMA |
508 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 509 | depends on DMA_ENGINE |
729b5d1b DW |
510 | help |
511 | This allows the async_tx api to take advantage of offload engines for | |
512 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
513 | a dma engine that can perform raid operations and you have enabled | |
514 | MD_RAID456 say Y. | |
515 | ||
516 | If unsure, say N. | |
517 | ||
4a776f0a HS |
518 | config DMATEST |
519 | tristate "DMA Test client" | |
520 | depends on DMA_ENGINE | |
521 | help | |
522 | Simple DMA test client. Say N unless you're debugging a | |
523 | DMA Device driver. | |
524 | ||
3cc377b9 DW |
525 | config DMA_ENGINE_RAID |
526 | bool | |
527 | ||
e7c0fe2a AG |
528 | config QCOM_BAM_DMA |
529 | tristate "QCOM BAM DMA support" | |
530 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) | |
531 | select DMA_ENGINE | |
532 | select DMA_VIRTUAL_CHANNELS | |
533 | ---help--- | |
534 | Enable support for the QCOM BAM DMA controller. This controller | |
535 | provides DMA capabilities for a variety of on-chip devices. | |
536 | ||
0e3b67b3 LPC |
537 | config AXI_DMAC |
538 | tristate "Analog Devices AXI-DMAC DMA support" | |
539 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
540 | select DMA_ENGINE | |
541 | select DMA_VIRTUAL_CHANNELS | |
542 | help | |
543 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA | |
544 | controller is often used in Analog Device's reference designs for FPGA | |
545 | platforms. | |
546 | ||
2ed6dc34 | 547 | endif |