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Commit | Line | Data |
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c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
3c216190 VK |
36 | #core |
37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
38 | bool | |
95b4ecbf | 39 | |
3c216190 VK |
40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
41 | bool | |
95b4ecbf | 42 | |
3c216190 | 43 | config DMA_ENGINE |
138f4c35 DW |
44 | bool |
45 | ||
3c216190 VK |
46 | config DMA_VIRTUAL_CHANNELS |
47 | tristate | |
48 | ||
49 | config DMA_ACPI | |
50 | def_bool y | |
51 | depends on ACPI | |
52 | ||
53 | config DMA_OF | |
54 | def_bool y | |
55 | depends on OF | |
56 | select DMA_ENGINE | |
57 | ||
58 | #devices | |
e8689e63 LW |
59 | config AMBA_PL08X |
60 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 61 | depends on ARM_AMBA |
e8689e63 | 62 | select DMA_ENGINE |
083be28a | 63 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
64 | help |
65 | Platform has a PL08x DMAC device | |
66 | which can provide DMA engine support | |
67 | ||
3c216190 VK |
68 | config AMCC_PPC440SPE_ADMA |
69 | tristate "AMCC PPC440SPe ADMA support" | |
70 | depends on 440SPe || 440SP | |
2ed6dc34 | 71 | select DMA_ENGINE |
3cc377b9 | 72 | select DMA_ENGINE_RAID |
3c216190 | 73 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 74 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 75 | help |
3c216190 | 76 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 77 | |
dc78baa2 NF |
78 | config AT_HDMAC |
79 | tristate "Atmel AHB DMA support" | |
f898fed0 | 80 | depends on ARCH_AT91 |
dc78baa2 NF |
81 | select DMA_ENGINE |
82 | help | |
f898fed0 | 83 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 84 | |
e1f7c9ee LD |
85 | config AT_XDMAC |
86 | tristate "Atmel XDMA support" | |
6e5ae29b | 87 | depends on ARCH_AT91 |
e1f7c9ee LD |
88 | select DMA_ENGINE |
89 | help | |
90 | Support the Atmel XDMA controller. | |
2ed6dc34 | 91 | |
3c216190 VK |
92 | config AXI_DMAC |
93 | tristate "Analog Devices AXI-DMAC DMA support" | |
94 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
2ed6dc34 | 95 | select DMA_ENGINE |
3c216190 | 96 | select DMA_VIRTUAL_CHANNELS |
2ed6dc34 | 97 | help |
3c216190 VK |
98 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
99 | controller is often used in Analog Device's reference designs for FPGA | |
100 | platforms. | |
c13c8260 | 101 | |
743e1c8f AP |
102 | config BCM_SBA_RAID |
103 | tristate "Broadcom SBA RAID engine support" | |
104 | depends on (ARM64 && MAILBOX && RAID6_PQ) || COMPILE_TEST | |
105 | select DMA_ENGINE | |
106 | select DMA_ENGINE_RAID | |
107 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
108 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
109 | default ARCH_BCM_IPROC | |
110 | help | |
111 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
112 | engine is available on most of the Broadcom iProc SoCs. It | |
113 | has the capability to offload memcpy, xor and pq computation | |
114 | for raid5/6. | |
115 | ||
3c216190 VK |
116 | config COH901318 |
117 | bool "ST-Ericsson COH901318 DMA support" | |
118 | select DMA_ENGINE | |
6e450376 | 119 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
120 | help |
121 | Enable support for ST-Ericsson COH 901 318 DMA. | |
122 | ||
123 | config DMA_BCM2835 | |
124 | tristate "BCM2835 DMA engine support" | |
125 | depends on ARCH_BCM2835 | |
126 | select DMA_ENGINE | |
127 | select DMA_VIRTUAL_CHANNELS | |
128 | ||
129 | config DMA_JZ4740 | |
130 | tristate "JZ4740 DMA support" | |
d78d6c07 | 131 | depends on MACH_JZ4740 || COMPILE_TEST |
3c216190 VK |
132 | select DMA_ENGINE |
133 | select DMA_VIRTUAL_CHANNELS | |
134 | ||
135 | config DMA_JZ4780 | |
136 | tristate "JZ4780 DMA support" | |
a952b287 | 137 | depends on MACH_JZ4780 || COMPILE_TEST |
667dfed9 AS |
138 | select DMA_ENGINE |
139 | select DMA_VIRTUAL_CHANNELS | |
140 | help | |
3c216190 VK |
141 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
142 | If you have a board based on such a SoC and wish to use DMA for | |
143 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 144 | |
3c216190 VK |
145 | config DMA_OMAP |
146 | tristate "OMAP DMA support" | |
54ff7a2d | 147 | depends on ARCH_OMAP || COMPILE_TEST |
3c216190 VK |
148 | select DMA_ENGINE |
149 | select DMA_VIRTUAL_CHANNELS | |
509cf0b8 | 150 | select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) |
d5ea7b5e | 151 | |
3c216190 VK |
152 | config DMA_SA11X0 |
153 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 154 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 155 | select DMA_ENGINE |
3c216190 | 156 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 157 | help |
3c216190 VK |
158 | Support the DMA engine found on Intel StrongARM SA-1100 and |
159 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
160 | devices. | |
dc78baa2 | 161 | |
3c216190 VK |
162 | config DMA_SUN4I |
163 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 164 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 165 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 166 | select DMA_ENGINE |
3c216190 | 167 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 168 | help |
3c216190 VK |
169 | Enable support for the DMA controller present in the sun4i, |
170 | sun5i and sun7i Allwinner ARM SoCs. | |
171 | ||
172 | config DMA_SUN6I | |
173 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 174 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
175 | depends on RESET_CONTROLLER |
176 | select DMA_ENGINE | |
177 | select DMA_VIRTUAL_CHANNELS | |
178 | help | |
179 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
180 | ||
181 | config EP93XX_DMA | |
182 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 183 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
184 | select DMA_ENGINE |
185 | help | |
186 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 187 | |
173acc7c | 188 | config FSL_DMA |
8de7a7d9 | 189 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 190 | depends on FSL_SOC |
173acc7c | 191 | select DMA_ENGINE |
5fc6d897 | 192 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 193 | ---help--- |
8de7a7d9 HZ |
194 | Enable support for the Freescale Elo series DMA controllers. |
195 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
196 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
197 | some Txxx and Bxxx parts. | |
173acc7c | 198 | |
3c216190 VK |
199 | config FSL_EDMA |
200 | tristate "Freescale eDMA engine support" | |
201 | depends on OF | |
202 | select DMA_ENGINE | |
203 | select DMA_VIRTUAL_CHANNELS | |
204 | help | |
205 | Support the Freescale eDMA engine with programmable channel | |
206 | multiplexing capability for DMA request sources(slot). | |
207 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
208 | ||
ad80da65 XS |
209 | config FSL_RAID |
210 | tristate "Freescale RAID engine Support" | |
211 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
212 | select DMA_ENGINE | |
213 | select DMA_ENGINE_RAID | |
214 | ---help--- | |
215 | Enable support for Freescale RAID Engine. RAID Engine is | |
216 | available on some QorIQ SoCs (like P5020/P5040). It has | |
217 | the capability to offload memcpy, xor and pq computation | |
218 | for raid5/6. | |
219 | ||
3c216190 VK |
220 | config IMG_MDC_DMA |
221 | tristate "IMG MDC support" | |
222 | depends on MIPS || COMPILE_TEST | |
223 | depends on MFD_SYSCON | |
0fb6f739 | 224 | select DMA_ENGINE |
3c216190 VK |
225 | select DMA_VIRTUAL_CHANNELS |
226 | help | |
227 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 228 | |
3c216190 VK |
229 | config IMX_DMA |
230 | tristate "i.MX DMA support" | |
8e2d41f8 | 231 | depends on ARCH_MXC |
ff7b0479 | 232 | select DMA_ENGINE |
5296b56d | 233 | help |
3c216190 VK |
234 | Support the i.MX DMA engine. This engine is integrated into |
235 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 236 | |
3c216190 VK |
237 | config IMX_SDMA |
238 | tristate "i.MX SDMA support" | |
8e2d41f8 | 239 | depends on ARCH_MXC |
5296b56d | 240 | select DMA_ENGINE |
5296b56d | 241 | help |
3c216190 VK |
242 | Support the i.MX SDMA engine. This engine is integrated into |
243 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 244 | |
9ab8b4e7 | 245 | config INTEL_IDMA64 |
35271227 LT |
246 | tristate "Intel integrated DMA 64-bit support" |
247 | select DMA_ENGINE | |
248 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 249 | help |
35271227 LT |
250 | Enable DMA support for Intel Low Power Subsystem such as found on |
251 | Intel Skylake PCH. | |
5296b56d | 252 | |
3c216190 VK |
253 | config INTEL_IOATDMA |
254 | tristate "Intel I/OAT DMA support" | |
255 | depends on PCI && X86_64 | |
a57e16cf | 256 | select DMA_ENGINE |
3c216190 VK |
257 | select DMA_ENGINE_RAID |
258 | select DCA | |
a57e16cf | 259 | help |
3c216190 VK |
260 | Enable support for the Intel(R) I/OAT DMA engine present |
261 | in recent Intel Xeon chipsets. | |
a57e16cf | 262 | |
3c216190 VK |
263 | Say Y here if you have such a chipset. |
264 | ||
265 | If unsure, say N. | |
266 | ||
267 | config INTEL_IOP_ADMA | |
268 | tristate "Intel IOP ADMA support" | |
269 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
ea76f0b3 | 270 | select DMA_ENGINE |
3c216190 | 271 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 272 | help |
3c216190 | 273 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 274 | |
3c216190 VK |
275 | config INTEL_MIC_X100_DMA |
276 | tristate "Intel MIC X100 DMA Driver" | |
277 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
278 | select DMA_ENGINE |
279 | help | |
3c216190 VK |
280 | This enables DMA support for the Intel Many Integrated Core |
281 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
282 | run a 64 bit Linux OS. This driver will be used by both MIC | |
283 | host and card drivers. | |
ec8a1586 | 284 | |
3c216190 VK |
285 | If you are building host kernel with a MIC device or a card |
286 | kernel for a MIC device, then say M (recommended) or Y, else | |
287 | say N. If unsure say N. | |
288 | ||
289 | More information about the Intel MIC family as well as the Linux | |
290 | OS and tools for MIC to use with this driver are available from | |
291 | <http://software.intel.com/en-us/mic-developer>. | |
292 | ||
293 | config K3_DMA | |
294 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 295 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
296 | select DMA_ENGINE |
297 | select DMA_VIRTUAL_CHANNELS | |
298 | help | |
3c216190 VK |
299 | Support the DMA engine for Hisilicon K3 platform |
300 | devices. | |
ddeccb8d | 301 | |
3c216190 VK |
302 | config LPC18XX_DMAMUX |
303 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
304 | depends on ARCH_LPC18XX || COMPILE_TEST | |
305 | depends on OF && AMBA_PL08X | |
306 | select MFD_SYSCON | |
307 | help | |
308 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
309 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 310 | |
3c216190 VK |
311 | config MMP_PDMA |
312 | bool "MMP PDMA support" | |
cd3a792a | 313 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 314 | select DMA_ENGINE |
61f135b9 | 315 | help |
3c216190 | 316 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 317 | |
3c216190 VK |
318 | config MMP_TDMA |
319 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 320 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 321 | select DMA_ENGINE |
93d05f1e | 322 | select MMP_SRAM if ARCH_MMP |
d6619761 | 323 | select GENERIC_ALLOCATOR |
8d318a50 | 324 | help |
3c216190 VK |
325 | Support the MMP Two-Channel DMA engine. |
326 | This engine used for MMP Audio DMA and pxa910 SQU. | |
327 | It needs sram driver under mach-mmp. | |
8d318a50 | 328 | |
3c216190 VK |
329 | config MOXART_DMA |
330 | tristate "MOXART DMA support" | |
331 | depends on ARCH_MOXART | |
12458ea0 | 332 | select DMA_ENGINE |
3c216190 | 333 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 334 | help |
3c216190 VK |
335 | Enable support for the MOXA ART SoC DMA controller. |
336 | ||
337 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 338 | |
3c216190 VK |
339 | config MPC512X_DMA |
340 | tristate "Freescale MPC512x built-in DMA engine support" | |
341 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 342 | select DMA_ENGINE |
3c216190 VK |
343 | ---help--- |
344 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 345 | |
3c216190 VK |
346 | config MV_XOR |
347 | bool "Marvell XOR engine support" | |
c39290a1 | 348 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 349 | select DMA_ENGINE |
3c216190 VK |
350 | select DMA_ENGINE_RAID |
351 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
352 | ---help--- | |
353 | Enable support for the Marvell XOR engine. | |
ca21a146 | 354 | |
19a340b1 TP |
355 | config MV_XOR_V2 |
356 | bool "Marvell XOR engine version 2 support " | |
357 | depends on ARM64 | |
358 | select DMA_ENGINE | |
359 | select DMA_ENGINE_RAID | |
360 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
361 | select GENERIC_MSI_IRQ_DOMAIN | |
362 | ---help--- | |
363 | Enable support for the Marvell version 2 XOR engine. | |
364 | ||
365 | This engine provides acceleration for copy, XOR and RAID6 | |
366 | operations, and is available on Marvell Armada 7K and 8K | |
367 | platforms. | |
368 | ||
3c216190 VK |
369 | config MXS_DMA |
370 | bool "MXS DMA support" | |
a02eb37a | 371 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL |
3c216190 | 372 | select STMP_DEVICE |
ca21a146 RY |
373 | select DMA_ENGINE |
374 | help | |
3c216190 | 375 | Support the MXS DMA engine. This engine including APBH-DMA |
a02eb37a LW |
376 | and APBX-DMA is integrated into Freescale |
377 | i.MX23/28/MX6Q/MX6DL/MX6UL chips. | |
ca21a146 | 378 | |
3c216190 VK |
379 | config MX3_IPU |
380 | bool "MX3x Image Processing Unit support" | |
381 | depends on ARCH_MXC | |
c2dde5f8 | 382 | select DMA_ENGINE |
3c216190 | 383 | default y |
c2dde5f8 | 384 | help |
3c216190 VK |
385 | If you plan to use the Image Processing unit in the i.MX3x, say |
386 | Y here. If unsure, select Y. | |
a074ae38 | 387 | |
3c216190 VK |
388 | config MX3_IPU_IRQS |
389 | int "Number of dynamically mapped interrupts for IPU" | |
390 | depends on MX3_IPU | |
391 | range 2 137 | |
392 | default 4 | |
393 | help | |
394 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
395 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
396 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 397 | |
3c216190 VK |
398 | config NBPFAXI_DMA |
399 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 400 | select DMA_ENGINE |
3c216190 | 401 | depends on ARM || COMPILE_TEST |
b3040e40 | 402 | help |
3c216190 | 403 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 404 | |
0c42bd0e | 405 | config PCH_DMA |
ca7fe2db | 406 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 407 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
408 | select DMA_ENGINE |
409 | help | |
2cdf2455 TM |
410 | Enable support for Intel EG20T PCH DMA engine. |
411 | ||
e79e72be | 412 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
413 | Output Hub), ML7213, ML7223 and ML7831. |
414 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
415 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
416 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
417 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 418 | |
3c216190 VK |
419 | config PL330_DMA |
420 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 421 | select DMA_ENGINE |
3c216190 | 422 | depends on ARM_AMBA |
1ec1e82f | 423 | help |
3c216190 VK |
424 | Select if your platform has one or more PL330 DMACs. |
425 | You need to provide platform specific settings via | |
426 | platform_data for a dma-pl330 device. | |
1ec1e82f | 427 | |
3c216190 VK |
428 | config PXA_DMA |
429 | bool "PXA DMA support" | |
430 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 431 | select DMA_ENGINE |
3c216190 | 432 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 433 | help |
3c216190 VK |
434 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
435 | platform. The internal DMA IP of all PXA variants is supported, with | |
436 | 16 to 32 channels for peripheral to memory or memory to memory | |
437 | transfers. | |
1f1846c6 | 438 | |
3c216190 VK |
439 | config SIRF_DMA |
440 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
441 | depends on ARCH_SIRF | |
a580b8c5 SG |
442 | select DMA_ENGINE |
443 | help | |
3c216190 | 444 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 445 | |
3c216190 VK |
446 | config STE_DMA40 |
447 | bool "ST-Ericsson DMA40 support" | |
448 | depends on ARCH_U8500 | |
760ee1c4 MW |
449 | select DMA_ENGINE |
450 | help | |
3c216190 | 451 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 452 | |
6b4cd727 PG |
453 | config ST_FDMA |
454 | tristate "ST FDMA dmaengine support" | |
455 | depends on ARCH_STI | |
3d6b3715 | 456 | depends on REMOTEPROC |
6b4cd727 PG |
457 | select ST_SLIM_REMOTEPROC |
458 | select DMA_ENGINE | |
459 | select DMA_VIRTUAL_CHANNELS | |
460 | help | |
461 | Enable support for ST FDMA controller. | |
462 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
463 | ||
464 | Say Y here if you have such a chipset. | |
465 | If unsure, say N. | |
466 | ||
d8b46839 CM |
467 | config STM32_DMA |
468 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 469 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 470 | select DMA_ENGINE |
d8b46839 CM |
471 | select DMA_VIRTUAL_CHANNELS |
472 | help | |
473 | Enable support for the on-chip DMA controller on STMicroelectronics | |
474 | STM32 MCUs. | |
ddf9bd40 | 475 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
476 | here. |
477 | ||
3c216190 | 478 | config S3C24XX_DMAC |
9bdca822 | 479 | bool "Samsung S3C24XX DMA support" |
1609db6f | 480 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 481 | select DMA_ENGINE |
50437bff | 482 | select DMA_VIRTUAL_CHANNELS |
6365bead | 483 | help |
3c216190 VK |
484 | Support for the Samsung S3C24XX DMA controller driver. The |
485 | DMA controller is having multiple DMA channels which can be | |
486 | configured for different peripherals like audio, UART, SPI. | |
487 | The DMA controller can transfer data from memory to peripheral, | |
488 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 489 | |
3c216190 VK |
490 | config TXX9_DMAC |
491 | tristate "Toshiba TXx9 SoC DMA support" | |
492 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
493 | select DMA_ENGINE |
494 | help | |
3c216190 VK |
495 | Support the TXx9 SoC internal DMA controller. This can be |
496 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 497 | |
3c216190 VK |
498 | config TEGRA20_APB_DMA |
499 | bool "NVIDIA Tegra20 APB DMA support" | |
500 | depends on ARCH_TEGRA | |
7bedaa55 | 501 | select DMA_ENGINE |
3c216190 VK |
502 | help |
503 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
504 | DMA controller is having multiple DMA channel which can be | |
505 | configured for different peripherals like audio, UART, SPI, | |
506 | I2C etc which is in APB bus. | |
507 | This DMA controller transfers data from memory to peripheral fifo | |
508 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 509 | |
f46b1957 | 510 | config TEGRA210_ADMA |
3ed16793 | 511 | tristate "NVIDIA Tegra210 ADMA support" |
4cd16941 | 512 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
f46b1957 JH |
513 | select DMA_ENGINE |
514 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
515 | help |
516 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
517 | DMA controller has multiple DMA channels and is used to service | |
518 | various audio clients in the Tegra210 audio processing engine | |
519 | (APE). This DMA controller transfers data from memory to | |
520 | peripheral and vice versa. It does not support memory to | |
521 | memory data transfer. | |
522 | ||
3c216190 VK |
523 | config TIMB_DMA |
524 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 525 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 526 | select DMA_ENGINE |
3c216190 VK |
527 | help |
528 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 529 | |
9b3452d1 | 530 | config TI_CPPI41 |
e3fa49ac AB |
531 | tristate "CPPI 4.1 DMA support" |
532 | depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX) | |
9b3452d1 SAS |
533 | select DMA_ENGINE |
534 | help | |
535 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
e3fa49ac | 536 | is currently used by the USB driver on AM335x and DA8xx platforms. |
9b3452d1 | 537 | |
3c216190 VK |
538 | config TI_DMA_CROSSBAR |
539 | bool | |
d894fc60 | 540 | |
3c216190 VK |
541 | config TI_EDMA |
542 | bool "TI EDMA support" | |
c5df3572 | 543 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST |
8e6152bc ZG |
544 | select DMA_ENGINE |
545 | select DMA_VIRTUAL_CHANNELS | |
509cf0b8 | 546 | select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) |
3c216190 | 547 | default n |
8e6152bc | 548 | help |
3c216190 VK |
549 | Enable support for the TI EDMA controller. This DMA |
550 | engine is found on TI DaVinci and AM33xx parts. | |
8e6152bc | 551 | |
3c216190 VK |
552 | config XGENE_DMA |
553 | tristate "APM X-Gene DMA support" | |
554 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 555 | select DMA_ENGINE |
3c216190 VK |
556 | select DMA_ENGINE_RAID |
557 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 558 | help |
3c216190 | 559 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 560 | |
fde57a7c KA |
561 | config XILINX_DMA |
562 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 563 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
564 | select DMA_ENGINE |
565 | help | |
566 | Enable support for Xilinx AXI VDMA Soft IP. | |
567 | ||
fde57a7c | 568 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
569 | between memory and AXI4-Stream video type target |
570 | peripherals including peripherals which support AXI4- | |
571 | Stream Video Protocol. It has two stream interfaces/ | |
572 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
573 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
574 | AXI CDMA engine provides high-bandwidth direct memory access |
575 | between a memory-mapped source address and a memory-mapped | |
576 | destination address. | |
577 | AXI DMA engine provides high-bandwidth one dimensional direct | |
578 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 579 | |
b0cc417c KA |
580 | config XILINX_ZYNQMP_DMA |
581 | tristate "Xilinx ZynqMP DMA Engine" | |
582 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
583 | select DMA_ENGINE | |
584 | help | |
585 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 586 | |
e3fa9841 | 587 | config ZX_DMA |
253f9f44 | 588 | tristate "ZTE ZX DMA support" |
854d4bd2 | 589 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
590 | select DMA_ENGINE |
591 | select DMA_VIRTUAL_CHANNELS | |
592 | help | |
253f9f44 | 593 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 594 | |
9f2fd0df | 595 | |
3c216190 VK |
596 | # driver files |
597 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 598 | |
d9b31efc SK |
599 | source "drivers/dma/qcom/Kconfig" |
600 | ||
3c216190 | 601 | source "drivers/dma/dw/Kconfig" |
50437bff | 602 | |
3c216190 | 603 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 604 | |
3c216190 | 605 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 606 | |
3c216190 | 607 | # clients |
db217334 | 608 | comment "DMA Clients" |
2ed6dc34 | 609 | depends on DMA_ENGINE |
db217334 | 610 | |
729b5d1b DW |
611 | config ASYNC_TX_DMA |
612 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 613 | depends on DMA_ENGINE |
729b5d1b DW |
614 | help |
615 | This allows the async_tx api to take advantage of offload engines for | |
616 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
617 | a dma engine that can perform raid operations and you have enabled | |
618 | MD_RAID456 say Y. | |
619 | ||
620 | If unsure, say N. | |
621 | ||
4a776f0a HS |
622 | config DMATEST |
623 | tristate "DMA Test client" | |
624 | depends on DMA_ENGINE | |
58532e66 | 625 | select DMA_ENGINE_RAID |
4a776f0a HS |
626 | help |
627 | Simple DMA test client. Say N unless you're debugging a | |
628 | DMA Device driver. | |
629 | ||
3cc377b9 DW |
630 | config DMA_ENGINE_RAID |
631 | bool | |
632 | ||
2ed6dc34 | 633 | endif |