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Commit | Line | Data |
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c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
95b4ecbf SY |
36 | config INTEL_MIC_X100_DMA |
37 | tristate "Intel MIC X100 DMA Driver" | |
38 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
39 | select DMAENGINE | |
40 | default N | |
41 | help | |
42 | This enables DMA support for the Intel Many Integrated Core | |
43 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
44 | run a 64 bit Linux OS. This driver will be used by both MIC | |
45 | host and card drivers. | |
46 | ||
47 | If you are building host kernel with a MIC device or a card | |
48 | kernel for a MIC device, then say M (recommended) or Y, else | |
49 | say N. If unsure say N. | |
50 | ||
51 | More information about the Intel MIC family as well as the Linux | |
52 | OS and tools for MIC to use with this driver are available from | |
53 | <http://software.intel.com/en-us/mic-developer>. | |
54 | ||
b3c567e4 VK |
55 | config INTEL_MID_DMAC |
56 | tristate "Intel MID DMA support for Peripheral DMA controllers" | |
57 | depends on PCI && X86 | |
58 | select DMA_ENGINE | |
59 | default n | |
60 | help | |
61 | Enable support for the Intel(R) MID DMA engine present | |
62 | in Intel MID chipsets. | |
63 | ||
64 | Say Y here if you have such a chipset. | |
65 | ||
66 | If unsure, say N. | |
67 | ||
5fc6d897 | 68 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
138f4c35 DW |
69 | bool |
70 | ||
e8689e63 LW |
71 | config AMBA_PL08X |
72 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 73 | depends on ARM_AMBA |
e8689e63 | 74 | select DMA_ENGINE |
083be28a | 75 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
76 | help |
77 | Platform has a PL08x DMAC device | |
78 | which can provide DMA engine support | |
79 | ||
2ed6dc34 SN |
80 | config INTEL_IOATDMA |
81 | tristate "Intel I/OAT DMA support" | |
82 | depends on PCI && X86 | |
83 | select DMA_ENGINE | |
3cc377b9 | 84 | select DMA_ENGINE_RAID |
2ed6dc34 SN |
85 | select DCA |
86 | help | |
87 | Enable support for the Intel(R) I/OAT DMA engine present | |
88 | in recent Intel Xeon chipsets. | |
89 | ||
90 | Say Y here if you have such a chipset. | |
91 | ||
92 | If unsure, say N. | |
93 | ||
94 | config INTEL_IOP_ADMA | |
95 | tristate "Intel IOP ADMA support" | |
96 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
2ed6dc34 | 97 | select DMA_ENGINE |
5fc6d897 | 98 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 SN |
99 | help |
100 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 101 | |
61a76496 | 102 | source "drivers/dma/dw/Kconfig" |
d5ea7b5e | 103 | |
dc78baa2 NF |
104 | config AT_HDMAC |
105 | tristate "Atmel AHB DMA support" | |
f898fed0 | 106 | depends on ARCH_AT91 |
dc78baa2 NF |
107 | select DMA_ENGINE |
108 | help | |
f898fed0 | 109 | Support the Atmel AHB DMA controller. |
dc78baa2 | 110 | |
173acc7c | 111 | config FSL_DMA |
8de7a7d9 | 112 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 113 | depends on FSL_SOC |
173acc7c | 114 | select DMA_ENGINE |
5fc6d897 | 115 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 116 | ---help--- |
8de7a7d9 HZ |
117 | Enable support for the Freescale Elo series DMA controllers. |
118 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
119 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
120 | some Txxx and Bxxx parts. | |
173acc7c | 121 | |
0fb6f739 PZ |
122 | config MPC512X_DMA |
123 | tristate "Freescale MPC512x built-in DMA engine support" | |
ba2eea25 | 124 | depends on PPC_MPC512x || PPC_MPC831x |
0fb6f739 PZ |
125 | select DMA_ENGINE |
126 | ---help--- | |
127 | Enable support for the Freescale MPC512x built-in DMA engine. | |
128 | ||
9a322993 PDM |
129 | source "drivers/dma/bestcomm/Kconfig" |
130 | ||
ff7b0479 SB |
131 | config MV_XOR |
132 | bool "Marvell XOR engine support" | |
133 | depends on PLAT_ORION | |
ff7b0479 | 134 | select DMA_ENGINE |
3cc377b9 | 135 | select DMA_ENGINE_RAID |
5fc6d897 | 136 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ff7b0479 SB |
137 | ---help--- |
138 | Enable support for the Marvell XOR engine. | |
139 | ||
5296b56d GL |
140 | config MX3_IPU |
141 | bool "MX3x Image Processing Unit support" | |
8e2d41f8 | 142 | depends on ARCH_MXC |
5296b56d GL |
143 | select DMA_ENGINE |
144 | default y | |
145 | help | |
146 | If you plan to use the Image Processing unit in the i.MX3x, say | |
147 | Y here. If unsure, select Y. | |
148 | ||
149 | config MX3_IPU_IRQS | |
150 | int "Number of dynamically mapped interrupts for IPU" | |
151 | depends on MX3_IPU | |
152 | range 2 137 | |
153 | default 4 | |
154 | help | |
155 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
156 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
157 | number of IRQ slots and map them dynamically to specific sources. | |
158 | ||
ea76f0b3 AN |
159 | config TXX9_DMAC |
160 | tristate "Toshiba TXx9 SoC DMA support" | |
161 | depends on MACH_TX49XX || MACH_TX39XX | |
162 | select DMA_ENGINE | |
163 | help | |
164 | Support the TXx9 SoC internal DMA controller. This can be | |
165 | integrated in chips such as the Toshiba TX4927/38/39. | |
166 | ||
ec8a1586 LD |
167 | config TEGRA20_APB_DMA |
168 | bool "NVIDIA Tegra20 APB DMA support" | |
169 | depends on ARCH_TEGRA | |
170 | select DMA_ENGINE | |
171 | help | |
172 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
173 | DMA controller is having multiple DMA channel which can be | |
174 | configured for different peripherals like audio, UART, SPI, | |
175 | I2C etc which is in APB bus. | |
176 | This DMA controller transfers data from memory to peripheral fifo | |
177 | or vice versa. It does not support memory to memory data transfer. | |
178 | ||
ddeccb8d HS |
179 | config S3C24XX_DMAC |
180 | tristate "Samsung S3C24XX DMA support" | |
181 | depends on ARCH_S3C24XX && !S3C24XX_DMA | |
182 | select DMA_ENGINE | |
183 | select DMA_VIRTUAL_CHANNELS | |
184 | help | |
185 | Support for the Samsung S3C24XX DMA controller driver. The | |
186 | DMA controller is having multiple DMA channels which can be | |
187 | configured for different peripherals like audio, UART, SPI. | |
188 | The DMA controller can transfer data from memory to peripheral, | |
189 | periphal to memory, periphal to periphal and memory to memory. | |
190 | ||
189b4ee8 | 191 | source "drivers/dma/sh/Kconfig" |
d8902adc | 192 | |
61f135b9 LW |
193 | config COH901318 |
194 | bool "ST-Ericsson COH901318 DMA support" | |
195 | select DMA_ENGINE | |
196 | depends on ARCH_U300 | |
197 | help | |
198 | Enable support for ST-Ericsson COH 901 318 DMA. | |
199 | ||
8d318a50 LW |
200 | config STE_DMA40 |
201 | bool "ST-Ericsson DMA40 support" | |
202 | depends on ARCH_U8500 | |
203 | select DMA_ENGINE | |
204 | help | |
205 | Support for ST-Ericsson DMA40 controller | |
206 | ||
12458ea0 AG |
207 | config AMCC_PPC440SPE_ADMA |
208 | tristate "AMCC PPC440SPe ADMA support" | |
209 | depends on 440SPe || 440SP | |
210 | select DMA_ENGINE | |
3cc377b9 | 211 | select DMA_ENGINE_RAID |
12458ea0 | 212 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 213 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
12458ea0 AG |
214 | help |
215 | Enable support for the AMCC PPC440SPe RAID engines. | |
216 | ||
de5d4453 RR |
217 | config TIMB_DMA |
218 | tristate "Timberdale FPGA DMA support" | |
2dda47d1 | 219 | depends on MFD_TIMBERDALE |
de5d4453 RR |
220 | select DMA_ENGINE |
221 | help | |
222 | Enable support for the Timberdale FPGA DMA engine. | |
223 | ||
ca21a146 | 224 | config SIRF_DMA |
f7d935dc BS |
225 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
226 | depends on ARCH_SIRF | |
ca21a146 RY |
227 | select DMA_ENGINE |
228 | help | |
229 | Enable support for the CSR SiRFprimaII DMA engine. | |
230 | ||
c2dde5f8 | 231 | config TI_EDMA |
76448041 | 232 | bool "TI EDMA support" |
e7ed8b40 | 233 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
c2dde5f8 MP |
234 | select DMA_ENGINE |
235 | select DMA_VIRTUAL_CHANNELS | |
c2b9e974 | 236 | select TI_PRIV_EDMA |
c2dde5f8 MP |
237 | default n |
238 | help | |
239 | Enable support for the TI EDMA controller. This DMA | |
240 | engine is found on TI DaVinci and AM33xx parts. | |
241 | ||
12458ea0 AG |
242 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
243 | bool | |
244 | ||
b3040e40 JB |
245 | config PL330_DMA |
246 | tristate "DMA API Driver for PL330" | |
247 | select DMA_ENGINE | |
1b9bb715 | 248 | depends on ARM_AMBA |
b3040e40 JB |
249 | help |
250 | Select if your platform has one or more PL330 DMACs. | |
251 | You need to provide platform specific settings via | |
252 | platform_data for a dma-pl330 device. | |
253 | ||
0c42bd0e | 254 | config PCH_DMA |
ca7fe2db | 255 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 256 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
257 | select DMA_ENGINE |
258 | help | |
2cdf2455 TM |
259 | Enable support for Intel EG20T PCH DMA engine. |
260 | ||
e79e72be | 261 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
262 | Output Hub), ML7213, ML7223 and ML7831. |
263 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
264 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
265 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
266 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 267 | |
1ec1e82f SH |
268 | config IMX_SDMA |
269 | tristate "i.MX SDMA support" | |
8e2d41f8 | 270 | depends on ARCH_MXC |
1ec1e82f SH |
271 | select DMA_ENGINE |
272 | help | |
273 | Support the i.MX SDMA engine. This engine is integrated into | |
8e2d41f8 | 274 | Freescale i.MX25/31/35/51/53 chips. |
1ec1e82f | 275 | |
1f1846c6 SH |
276 | config IMX_DMA |
277 | tristate "i.MX DMA support" | |
5b2e02e4 | 278 | depends on ARCH_MXC |
1f1846c6 SH |
279 | select DMA_ENGINE |
280 | help | |
281 | Support the i.MX DMA engine. This engine is integrated into | |
282 | Freescale i.MX1/21/27 chips. | |
283 | ||
a580b8c5 SG |
284 | config MXS_DMA |
285 | bool "MXS DMA support" | |
f5c55847 | 286 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
f5b7efcc | 287 | select STMP_DEVICE |
a580b8c5 SG |
288 | select DMA_ENGINE |
289 | help | |
290 | Support the MXS DMA engine. This engine including APBH-DMA | |
654fa249 | 291 | and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips. |
a580b8c5 | 292 | |
760ee1c4 MW |
293 | config EP93XX_DMA |
294 | bool "Cirrus Logic EP93xx DMA support" | |
295 | depends on ARCH_EP93XX | |
296 | select DMA_ENGINE | |
297 | help | |
298 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
299 | ||
6365bead RK |
300 | config DMA_SA11X0 |
301 | tristate "SA-11x0 DMA support" | |
302 | depends on ARCH_SA1100 | |
303 | select DMA_ENGINE | |
50437bff | 304 | select DMA_VIRTUAL_CHANNELS |
6365bead RK |
305 | help |
306 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
307 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
308 | devices. | |
309 | ||
c6da0ba8 ZG |
310 | config MMP_TDMA |
311 | bool "MMP Two-Channel DMA support" | |
49d57b5e | 312 | depends on ARCH_MMP |
c6da0ba8 | 313 | select DMA_ENGINE |
b9f10a10 | 314 | select MMP_SRAM |
c6da0ba8 ZG |
315 | help |
316 | Support the MMP Two-Channel DMA engine. | |
317 | This engine used for MMP Audio DMA and pxa910 SQU. | |
b9f10a10 | 318 | It needs sram driver under mach-mmp. |
c6da0ba8 ZG |
319 | |
320 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
321 | ||
7bedaa55 RK |
322 | config DMA_OMAP |
323 | tristate "OMAP DMA support" | |
324 | depends on ARCH_OMAP | |
325 | select DMA_ENGINE | |
326 | select DMA_VIRTUAL_CHANNELS | |
327 | ||
96286b57 FM |
328 | config DMA_BCM2835 |
329 | tristate "BCM2835 DMA engine support" | |
dd1ed372 | 330 | depends on ARCH_BCM2835 |
96286b57 FM |
331 | select DMA_ENGINE |
332 | select DMA_VIRTUAL_CHANNELS | |
333 | ||
9b3452d1 SAS |
334 | config TI_CPPI41 |
335 | tristate "AM33xx CPPI41 DMA support" | |
336 | depends on ARCH_OMAP | |
337 | select DMA_ENGINE | |
338 | help | |
339 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
340 | is currently used by the USB driver on AM335x platforms. | |
341 | ||
c8acd6aa ZG |
342 | config MMP_PDMA |
343 | bool "MMP PDMA support" | |
344 | depends on (ARCH_MMP || ARCH_PXA) | |
345 | select DMA_ENGINE | |
346 | help | |
8c88126b | 347 | Support the MMP PDMA engine for PXA and MMP platform. |
c8acd6aa | 348 | |
7c169a42 LPC |
349 | config DMA_JZ4740 |
350 | tristate "JZ4740 DMA support" | |
351 | depends on MACH_JZ4740 | |
352 | select DMA_ENGINE | |
353 | select DMA_VIRTUAL_CHANNELS | |
354 | ||
8e6152bc ZG |
355 | config K3_DMA |
356 | tristate "Hisilicon K3 DMA support" | |
357 | depends on ARCH_HI3xxx | |
358 | select DMA_ENGINE | |
359 | select DMA_VIRTUAL_CHANNELS | |
360 | help | |
361 | Support the DMA engine for Hisilicon K3 platform | |
362 | devices. | |
363 | ||
5f9e685a JJ |
364 | config MOXART_DMA |
365 | tristate "MOXART DMA support" | |
366 | depends on ARCH_MOXART | |
367 | select DMA_ENGINE | |
e803d988 | 368 | select DMA_OF |
5f9e685a JJ |
369 | select DMA_VIRTUAL_CHANNELS |
370 | help | |
371 | Enable support for the MOXA ART SoC DMA controller. | |
d6be34fb JL |
372 | |
373 | config FSL_EDMA | |
374 | tristate "Freescale eDMA engine support" | |
375 | depends on OF | |
376 | select DMA_ENGINE | |
377 | select DMA_VIRTUAL_CHANNELS | |
378 | help | |
379 | Support the Freescale eDMA engine with programmable channel | |
380 | multiplexing capability for DMA request sources(slot). | |
381 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
5f9e685a | 382 | |
9cd4360d ST |
383 | config XILINX_VDMA |
384 | tristate "Xilinx AXI VDMA Engine" | |
385 | depends on (ARCH_ZYNQ || MICROBLAZE) | |
386 | select DMA_ENGINE | |
387 | help | |
388 | Enable support for Xilinx AXI VDMA Soft IP. | |
389 | ||
390 | This engine provides high-bandwidth direct memory access | |
391 | between memory and AXI4-Stream video type target | |
392 | peripherals including peripherals which support AXI4- | |
393 | Stream Video Protocol. It has two stream interfaces/ | |
394 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
395 | Memory Mapped (S2MM) for the data transfers. | |
396 | ||
c13c8260 | 397 | config DMA_ENGINE |
2ed6dc34 | 398 | bool |
c13c8260 | 399 | |
50437bff RK |
400 | config DMA_VIRTUAL_CHANNELS |
401 | tristate | |
402 | ||
1b2e98bc AS |
403 | config DMA_ACPI |
404 | def_bool y | |
405 | depends on ACPI | |
406 | ||
5fa422c9 VK |
407 | config DMA_OF |
408 | def_bool y | |
409 | depends on OF | |
410 | ||
db217334 | 411 | comment "DMA Clients" |
2ed6dc34 | 412 | depends on DMA_ENGINE |
db217334 CL |
413 | |
414 | config NET_DMA | |
415 | bool "Network: TCP receive copy offload" | |
416 | depends on DMA_ENGINE && NET | |
9c402f4e | 417 | default (INTEL_IOATDMA || FSL_DMA) |
77873803 | 418 | depends on BROKEN |
2ed6dc34 | 419 | help |
db217334 CL |
420 | This enables the use of DMA engines in the network stack to |
421 | offload receive copy-to-user operations, freeing CPU cycles. | |
9c402f4e DW |
422 | |
423 | Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise | |
424 | say N. | |
db217334 | 425 | |
729b5d1b DW |
426 | config ASYNC_TX_DMA |
427 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 428 | depends on DMA_ENGINE |
729b5d1b DW |
429 | help |
430 | This allows the async_tx api to take advantage of offload engines for | |
431 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
432 | a dma engine that can perform raid operations and you have enabled | |
433 | MD_RAID456 say Y. | |
434 | ||
435 | If unsure, say N. | |
436 | ||
4a776f0a HS |
437 | config DMATEST |
438 | tristate "DMA Test client" | |
439 | depends on DMA_ENGINE | |
440 | help | |
441 | Simple DMA test client. Say N unless you're debugging a | |
442 | DMA Device driver. | |
443 | ||
3cc377b9 DW |
444 | config DMA_ENGINE_RAID |
445 | bool | |
446 | ||
e7c0fe2a AG |
447 | config QCOM_BAM_DMA |
448 | tristate "QCOM BAM DMA support" | |
449 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) | |
450 | select DMA_ENGINE | |
451 | select DMA_VIRTUAL_CHANNELS | |
452 | ---help--- | |
453 | Enable support for the QCOM BAM DMA controller. This controller | |
454 | provides DMA capabilities for a variety of on-chip devices. | |
455 | ||
2ed6dc34 | 456 | endif |