projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 7acb9391 SM |
1 | /* |
| 2 | * Bestcomm GenBD TX task microcode | |
| 3 | * | |
| 4 | * Copyright (C) 2006 AppSpec Computer Technologies Corp. | |
| 5 | * Jeff Gibbons <jeff.gibbons@appspec.com> | |
| 6 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify it | |
| 9 | * under the terms of the GNU General Public License version 2 as published | |
| 10 | * by the Free Software Foundation. | |
| 11 | * | |
| 12 | * Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex | |
| 13 | * on Tue Mar 4 10:14:12 2006 GMT | |
| 14 | * | |
| 15 | */ | |
| 16 | ||
| 17 | #include <asm/types.h> | |
| 18 | ||
| 19 | /* | |
| 20 | * The header consists of the following fields: | |
| 21 | * u32 magic; | |
| 22 | * u8 desc_size; | |
| 23 | * u8 var_size; | |
| 24 | * u8 inc_size; | |
| 25 | * u8 first_var; | |
| 26 | * u8 reserved[8]; | |
| 27 | * | |
| 28 | * The size fields contain the number of 32-bit words. | |
| 29 | */ | |
| 30 | ||
| 31 | u32 bcom_gen_bd_tx_task[] = { | |
| 32 | /* header */ | |
| 33 | 0x4243544b, | |
| 34 | 0x0f040609, | |
| 35 | 0x00000000, | |
| 36 | 0x00000000, | |
| 37 | ||
| 38 | /* Task descriptors */ | |
| 39 | 0x800220e3, /* LCD: idx0 = var0, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */ | |
| 40 | 0x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */ | |
| 41 | 0xb8808264, /* LCD: idx2 = *idx1, idx3 = var1; idx2 < var9; idx2 += inc4, idx3 += inc4 */ | |
| 42 | 0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */ | |
| 43 | 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */ | |
| 44 | 0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */ | |
| 45 | 0xd9190300, /* LCDEXT: idx2 = idx2; idx2 > var12; idx2 += inc0 */ | |
| 46 | 0xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */ | |
| 47 | 0x03fec398, /* DRD1A: *idx0 = *idx3; FN=0 init=31 WS=3 RS=3 */ | |
| 48 | 0x9919826a, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc5, idx3 += inc2 */ | |
| 49 | 0x0feac398, /* DRD1A: *idx0 = *idx3; FN=0 TFD INT init=31 WS=1 RS=1 */ | |
| 50 | 0x99190036, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc6 */ | |
| 51 | 0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */ | |
| 52 | 0x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */ | |
| 53 | 0x000001f8, /* NOP */ | |
| 54 | ||
| 55 | /* VAR[9]-VAR[12] */ | |
| 56 | 0x40000000, | |
| 57 | 0x7fff7fff, | |
| 58 | 0x00000000, | |
| 59 | 0x40000004, | |
| 60 | ||
| 61 | /* INC[0]-INC[5] */ | |
| 62 | 0x40000000, | |
| 63 | 0xe0000000, | |
| 64 | 0xe0000000, | |
| 65 | 0xa0000008, | |
| 66 | 0x20000000, | |
| 67 | 0x4000ffff, | |
| 68 | }; | |
| 69 |