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dmaengine: dw: fix potential memory leak in dw_dma_parse_dt()
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CommitLineData
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1/*
2 * Platform driver for the Synopsys DesignWare DMA Controller
3 *
4 * Copyright (C) 2007-2008 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2013 Intel Corporation
7 *
8 * Some parts of this driver are derived from the original dw_dmac.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/clk.h>
6acf3998 18#include <linux/pm_runtime.h>
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19#include <linux/platform_device.h>
20#include <linux/dmaengine.h>
21#include <linux/dma-mapping.h>
22#include <linux/of.h>
23#include <linux/of_dma.h>
24#include <linux/acpi.h>
25#include <linux/acpi_dma.h>
26
27#include "internal.h"
28
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29#define DRV_NAME "dw_dmac"
30
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31static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
32 struct of_dma *ofdma)
33{
34 struct dw_dma *dw = ofdma->of_dma_data;
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35 struct dw_dma_slave slave = {
36 .dma_dev = dw->dma.dev,
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37 };
38 dma_cap_mask_t cap;
39
40 if (dma_spec->args_count != 3)
41 return NULL;
42
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43 slave.src_id = dma_spec->args[0];
44 slave.dst_id = dma_spec->args[0];
45 slave.src_master = dma_spec->args[1];
46 slave.dst_master = dma_spec->args[2];
9cade1a4 47
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48 if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
49 slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
50 slave.src_master >= dw->nr_masters ||
51 slave.dst_master >= dw->nr_masters))
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52 return NULL;
53
54 dma_cap_zero(cap);
55 dma_cap_set(DMA_SLAVE, cap);
56
57 /* TODO: there should be a simpler way to do this */
4d130de2 58 return dma_request_channel(cap, dw_dma_filter, &slave);
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59}
60
61#ifdef CONFIG_ACPI
62static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
63{
9cade1a4 64 struct acpi_dma_spec *dma_spec = param;
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65 struct dw_dma_slave slave = {
66 .dma_dev = dma_spec->dev,
67 .src_id = dma_spec->slave_id,
68 .dst_id = dma_spec->slave_id,
69 .src_master = 1,
70 .dst_master = 0,
71 };
9cade1a4 72
4d130de2 73 return dw_dma_filter(chan, &slave);
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74}
75
76static void dw_dma_acpi_controller_register(struct dw_dma *dw)
77{
78 struct device *dev = dw->dma.dev;
79 struct acpi_dma_filter_info *info;
80 int ret;
81
82 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
83 if (!info)
84 return;
85
86 dma_cap_zero(info->dma_cap);
87 dma_cap_set(DMA_SLAVE, info->dma_cap);
88 info->filter_fn = dw_dma_acpi_filter;
89
90 ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
91 info);
92 if (ret)
93 dev_err(dev, "could not register acpi_dma_controller\n");
94}
95#else /* !CONFIG_ACPI */
96static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
97#endif /* !CONFIG_ACPI */
98
99#ifdef CONFIG_OF
100static struct dw_dma_platform_data *
101dw_dma_parse_dt(struct platform_device *pdev)
102{
103 struct device_node *np = pdev->dev.of_node;
104 struct dw_dma_platform_data *pdata;
d8ded50f 105 u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
2b574ba9 106 u32 nr_channels;
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107
108 if (!np) {
109 dev_err(&pdev->dev, "Missing DT data\n");
110 return NULL;
111 }
112
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113 if (of_property_read_u32(np, "dma-channels", &nr_channels))
114 return NULL;
115
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116 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
117 if (!pdata)
118 return NULL;
119
2b574ba9 120 pdata->nr_channels = nr_channels;
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121
122 if (of_property_read_bool(np, "is_private"))
123 pdata->is_private = true;
124
125 if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
126 pdata->chan_allocation_order = (unsigned char)tmp;
127
128 if (!of_property_read_u32(np, "chan_priority", &tmp))
129 pdata->chan_priority = tmp;
130
131 if (!of_property_read_u32(np, "block_size", &tmp))
132 pdata->block_size = tmp;
133
134 if (!of_property_read_u32(np, "dma-masters", &tmp)) {
d8ded50f 135 if (tmp > DW_DMA_MAX_NR_MASTERS)
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136 return NULL;
137
138 pdata->nr_masters = tmp;
139 }
140
141 if (!of_property_read_u32_array(np, "data_width", arr,
142 pdata->nr_masters))
143 for (tmp = 0; tmp < pdata->nr_masters; tmp++)
144 pdata->data_width[tmp] = arr[tmp];
145
146 return pdata;
147}
148#else
149static inline struct dw_dma_platform_data *
150dw_dma_parse_dt(struct platform_device *pdev)
151{
152 return NULL;
153}
154#endif
155
156static int dw_probe(struct platform_device *pdev)
157{
158 struct dw_dma_chip *chip;
159 struct device *dev = &pdev->dev;
160 struct resource *mem;
175267b3 161 const struct acpi_device_id *id;
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162 struct dw_dma_platform_data *pdata;
163 int err;
164
165 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
166 if (!chip)
167 return -ENOMEM;
168
169 chip->irq = platform_get_irq(pdev, 0);
170 if (chip->irq < 0)
171 return chip->irq;
172
173 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
174 chip->regs = devm_ioremap_resource(dev, mem);
175 if (IS_ERR(chip->regs))
176 return PTR_ERR(chip->regs);
177
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178 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
179 if (err)
180 return err;
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181
182 pdata = dev_get_platdata(dev);
183 if (!pdata)
184 pdata = dw_dma_parse_dt(pdev);
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185 if (!pdata && has_acpi_companion(dev)) {
186 id = acpi_match_device(dev->driver->acpi_match_table, dev);
187 if (id)
188 pdata = (struct dw_dma_platform_data *)id->driver_data;
189 }
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190
191 chip->dev = dev;
192
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193 chip->clk = devm_clk_get(chip->dev, "hclk");
194 if (IS_ERR(chip->clk))
195 return PTR_ERR(chip->clk);
196 err = clk_prepare_enable(chip->clk);
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197 if (err)
198 return err;
199
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200 pm_runtime_enable(&pdev->dev);
201
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202 err = dw_dma_probe(chip, pdata);
203 if (err)
204 goto err_dw_dma_probe;
205
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206 platform_set_drvdata(pdev, chip);
207
208 if (pdev->dev.of_node) {
209 err = of_dma_controller_register(pdev->dev.of_node,
210 dw_dma_of_xlate, chip->dw);
211 if (err)
212 dev_err(&pdev->dev,
213 "could not register of_dma_controller\n");
214 }
215
216 if (ACPI_HANDLE(&pdev->dev))
217 dw_dma_acpi_controller_register(chip->dw);
218
219 return 0;
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220
221err_dw_dma_probe:
6acf3998 222 pm_runtime_disable(&pdev->dev);
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223 clk_disable_unprepare(chip->clk);
224 return err;
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225}
226
227static int dw_remove(struct platform_device *pdev)
228{
229 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
230
231 if (pdev->dev.of_node)
232 of_dma_controller_free(pdev->dev.of_node);
233
a15636e8 234 dw_dma_remove(chip);
6acf3998 235 pm_runtime_disable(&pdev->dev);
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236 clk_disable_unprepare(chip->clk);
237
238 return 0;
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239}
240
241static void dw_shutdown(struct platform_device *pdev)
242{
243 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
244
2540f74b 245 dw_dma_disable(chip);
a15636e8 246 clk_disable_unprepare(chip->clk);
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247}
248
249#ifdef CONFIG_OF
250static const struct of_device_id dw_dma_of_id_table[] = {
251 { .compatible = "snps,dma-spear1340" },
252 {}
253};
254MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
255#endif
256
257#ifdef CONFIG_ACPI
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258static struct dw_dma_platform_data dw_dma_acpi_pdata = {
259 .nr_channels = 8,
260 .is_private = true,
261 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
262 .chan_priority = CHAN_PRIORITY_ASCENDING,
263 .block_size = 4095,
264 .nr_masters = 2,
265};
266
9cade1a4 267static const struct acpi_device_id dw_dma_acpi_id_table[] = {
175267b3 268 { "INTL9C60", (kernel_ulong_t)&dw_dma_acpi_pdata },
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269 { }
270};
be480dcb 271MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
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272#endif
273
274#ifdef CONFIG_PM_SLEEP
275
067bd4fd 276static int dw_suspend_late(struct device *dev)
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277{
278 struct platform_device *pdev = to_platform_device(dev);
279 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
280
2540f74b 281 dw_dma_disable(chip);
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282 clk_disable_unprepare(chip->clk);
283
284 return 0;
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285}
286
067bd4fd 287static int dw_resume_early(struct device *dev)
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288{
289 struct platform_device *pdev = to_platform_device(dev);
290 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
291
a15636e8 292 clk_prepare_enable(chip->clk);
2540f74b 293 return dw_dma_enable(chip);
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294}
295
067bd4fd 296#endif /* CONFIG_PM_SLEEP */
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297
298static const struct dev_pm_ops dw_dev_pm_ops = {
067bd4fd 299 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
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300};
301
302static struct platform_driver dw_driver = {
303 .probe = dw_probe,
304 .remove = dw_remove,
2540f74b 305 .shutdown = dw_shutdown,
9cade1a4 306 .driver = {
a104a45b 307 .name = DRV_NAME,
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308 .pm = &dw_dev_pm_ops,
309 .of_match_table = of_match_ptr(dw_dma_of_id_table),
310 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
311 },
312};
313
314static int __init dw_init(void)
315{
316 return platform_driver_register(&dw_driver);
317}
318subsys_initcall(dw_init);
319
320static void __exit dw_exit(void)
321{
322 platform_driver_unregister(&dw_driver);
323}
324module_exit(dw_exit);
325
326MODULE_LICENSE("GPL v2");
327MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
a104a45b 328MODULE_ALIAS("platform:" DRV_NAME);