[mirror_ubuntu-artful-kernel.git] / drivers / dma / ti-dma-crossbar.c

/*
 *  Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
 *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/of_dma.h>

#define TI_XBAR_DRA7		0
#define TI_XBAR_AM335X		1
static const u32 ti_xbar_type[] = {
	[TI_XBAR_DRA7] = TI_XBAR_DRA7,
	[TI_XBAR_AM335X] = TI_XBAR_AM335X,
};

static const struct of_device_id ti_dma_xbar_match[] = {
	{
		.compatible = "ti,dra7-dma-crossbar",
		.data = &ti_xbar_type[TI_XBAR_DRA7],
	},
	{
		.compatible = "ti,am335x-edma-crossbar",
		.data = &ti_xbar_type[TI_XBAR_AM335X],
	},
	{},
};

/* Crossbar on AM335x/AM437x family */
#define TI_AM335X_XBAR_LINES	64

struct ti_am335x_xbar_data {
	void __iomem *iomem;

	struct dma_router dmarouter;

	u32 xbar_events; /* maximum number of events to select in xbar */
	u32 dma_requests; /* number of DMA requests on eDMA */
};

struct ti_am335x_xbar_map {
	u16 dma_line;
	u16 mux_val;
};

static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u16 val)
{
	writeb_relaxed(val & 0x1f, iomem + event);
}

static void ti_am335x_xbar_free(struct device *dev, void *route_data)
{
	struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev);
	struct ti_am335x_xbar_map *map = route_data;

	dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n",
		map->mux_val, map->dma_line);

	ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0);
	kfree(map);
}

static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec,
					   struct of_dma *ofdma)
{
	struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
	struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev);
	struct ti_am335x_xbar_map *map;

	if (dma_spec->args_count != 3)
		return ERR_PTR(-EINVAL);

	if (dma_spec->args[2] >= xbar->xbar_events) {
		dev_err(&pdev->dev, "Invalid XBAR event number: %d\n",
			dma_spec->args[2]);
		return ERR_PTR(-EINVAL);
	}

	if (dma_spec->args[0] >= xbar->dma_requests) {
		dev_err(&pdev->dev, "Invalid DMA request line number: %d\n",
			dma_spec->args[0]);
		return ERR_PTR(-EINVAL);
	}

	/* The of_node_put() will be done in the core for the node */
	dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
	if (!dma_spec->np) {
		dev_err(&pdev->dev, "Can't get DMA master\n");
		return ERR_PTR(-EINVAL);
	}

	map = kzalloc(sizeof(*map), GFP_KERNEL);
	if (!map) {
		of_node_put(dma_spec->np);
		return ERR_PTR(-ENOMEM);
	}

	map->dma_line = (u16)dma_spec->args[0];
	map->mux_val = (u16)dma_spec->args[2];

	dma_spec->args[2] = 0;
	dma_spec->args_count = 2;

	dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n",
		map->mux_val, map->dma_line);

	ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val);

	return map;
}

static const struct of_device_id ti_am335x_master_match[] = {
	{ .compatible = "ti,edma3-tpcc", },
	{},
};

static int ti_am335x_xbar_probe(struct platform_device *pdev)
{
	struct device_node *node = pdev->dev.of_node;
	const struct of_device_id *match;
	struct device_node *dma_node;
	struct ti_am335x_xbar_data *xbar;
	struct resource *res;
	void __iomem *iomem;
	int i, ret;

	if (!node)
		return -ENODEV;

	xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
	if (!xbar)
		return -ENOMEM;

	dma_node = of_parse_phandle(node, "dma-masters", 0);
	if (!dma_node) {
		dev_err(&pdev->dev, "Can't get DMA master node\n");
		return -ENODEV;
	}

	match = of_match_node(ti_am335x_master_match, dma_node);
	if (!match) {
		dev_err(&pdev->dev, "DMA master is not supported\n");
		of_node_put(dma_node);
		return -EINVAL;
	}

	if (of_property_read_u32(dma_node, "dma-requests",
				 &xbar->dma_requests)) {
		dev_info(&pdev->dev,
			 "Missing XBAR output information, using %u.\n",
			 TI_AM335X_XBAR_LINES);
		xbar->dma_requests = TI_AM335X_XBAR_LINES;
	}
	of_node_put(dma_node);

	if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) {
		dev_info(&pdev->dev,
			 "Missing XBAR input information, using %u.\n",
			 TI_AM335X_XBAR_LINES);
		xbar->xbar_events = TI_AM335X_XBAR_LINES;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	iomem = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(iomem))
		return PTR_ERR(iomem);

	xbar->iomem = iomem;

	xbar->dmarouter.dev = &pdev->dev;
	xbar->dmarouter.route_free = ti_am335x_xbar_free;

	platform_set_drvdata(pdev, xbar);

	/* Reset the crossbar */
	for (i = 0; i < xbar->dma_requests; i++)
		ti_am335x_xbar_write(xbar->iomem, i, 0);

	ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate,
				     &xbar->dmarouter);

	return ret;
}

/* Crossbar on DRA7xx family */
#define TI_DRA7_XBAR_OUTPUTS	127
#define TI_DRA7_XBAR_INPUTS	256

struct ti_dra7_xbar_data {
	void __iomem *iomem;

	struct dma_router dmarouter;
	struct mutex mutex;
	unsigned long *dma_inuse;

	u16 safe_val; /* Value to rest the crossbar lines */
	u32 xbar_requests; /* number of DMA requests connected to XBAR */
	u32 dma_requests; /* number of DMA requests forwarded to DMA */
	u32 dma_offset;
};

struct ti_dra7_xbar_map {
	u16 xbar_in;
	int xbar_out;
};

static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val)
{
	writew_relaxed(val, iomem + (xbar * 2));
}

static void ti_dra7_xbar_free(struct device *dev, void *route_data)
{
	struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev);
	struct ti_dra7_xbar_map *map = route_data;

	dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n",
		map->xbar_in, map->xbar_out);

	ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val);
	mutex_lock(&xbar->mutex);
	clear_bit(map->xbar_out, xbar->dma_inuse);
	mutex_unlock(&xbar->mutex);
	kfree(map);
}

static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec,
					 struct of_dma *ofdma)
{
	struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
	struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev);
	struct ti_dra7_xbar_map *map;

	if (dma_spec->args[0] >= xbar->xbar_requests) {
		dev_err(&pdev->dev, "Invalid XBAR request number: %d\n",
			dma_spec->args[0]);
		return ERR_PTR(-EINVAL);
	}

	/* The of_node_put() will be done in the core for the node */
	dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
	if (!dma_spec->np) {
		dev_err(&pdev->dev, "Can't get DMA master\n");
		return ERR_PTR(-EINVAL);
	}

	map = kzalloc(sizeof(*map), GFP_KERNEL);
	if (!map) {
		of_node_put(dma_spec->np);
		return ERR_PTR(-ENOMEM);
	}

	mutex_lock(&xbar->mutex);
	map->xbar_out = find_first_zero_bit(xbar->dma_inuse,
					    xbar->dma_requests);
	mutex_unlock(&xbar->mutex);
	if (map->xbar_out == xbar->dma_requests) {
		dev_err(&pdev->dev, "Run out of free DMA requests\n");
		kfree(map);
		return ERR_PTR(-ENOMEM);
	}
	set_bit(map->xbar_out, xbar->dma_inuse);

	map->xbar_in = (u16)dma_spec->args[0];

	dma_spec->args[0] = map->xbar_out + xbar->dma_offset;

	dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n",
		map->xbar_in, map->xbar_out);

	ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in);

	return map;
}

#define TI_XBAR_EDMA_OFFSET	0
#define TI_XBAR_SDMA_OFFSET	1
static const u32 ti_dma_offset[] = {
	[TI_XBAR_EDMA_OFFSET] = 0,
	[TI_XBAR_SDMA_OFFSET] = 1,
};

static const struct of_device_id ti_dra7_master_match[] = {
	{
		.compatible = "ti,omap4430-sdma",
		.data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET],
	},
	{
		.compatible = "ti,edma3",
		.data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
	},
	{
		.compatible = "ti,edma3-tpcc",
		.data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
	},
	{},
};

static inline void ti_dra7_xbar_reserve(int offset, int len, unsigned long *p)
{
	for (; len > 0; len--)
		clear_bit(offset + (len - 1), p);
}

static int ti_dra7_xbar_probe(struct platform_device *pdev)
{
	struct device_node *node = pdev->dev.of_node;
	const struct of_device_id *match;
	struct device_node *dma_node;
	struct ti_dra7_xbar_data *xbar;
	struct property *prop;
	struct resource *res;
	u32 safe_val;
	int sz;
	void __iomem *iomem;
	int i, ret;

	if (!node)
		return -ENODEV;

	xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
	if (!xbar)
		return -ENOMEM;

	dma_node = of_parse_phandle(node, "dma-masters", 0);
	if (!dma_node) {
		dev_err(&pdev->dev, "Can't get DMA master node\n");
		return -ENODEV;
	}

	match = of_match_node(ti_dra7_master_match, dma_node);
	if (!match) {
		dev_err(&pdev->dev, "DMA master is not supported\n");
		of_node_put(dma_node);
		return -EINVAL;
	}

	if (of_property_read_u32(dma_node, "dma-requests",
				 &xbar->dma_requests)) {
		dev_info(&pdev->dev,
			 "Missing XBAR output information, using %u.\n",
			 TI_DRA7_XBAR_OUTPUTS);
		xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS;
	}
	of_node_put(dma_node);

	xbar->dma_inuse = devm_kcalloc(&pdev->dev,
				       BITS_TO_LONGS(xbar->dma_requests),
				       sizeof(unsigned long), GFP_KERNEL);
	if (!xbar->dma_inuse)
		return -ENOMEM;

	if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) {
		dev_info(&pdev->dev,
			 "Missing XBAR input information, using %u.\n",
			 TI_DRA7_XBAR_INPUTS);
		xbar->xbar_requests = TI_DRA7_XBAR_INPUTS;
	}

	if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val))
		xbar->safe_val = (u16)safe_val;


	prop = of_find_property(node, "ti,reserved-dma-request-ranges", &sz);
	if (prop) {
		const char pname[] = "ti,reserved-dma-request-ranges";
		u32 (*rsv_events)[2];
		size_t nelm = sz / sizeof(*rsv_events);
		int i;

		if (!nelm)
			return -EINVAL;

		rsv_events = kcalloc(nelm, sizeof(*rsv_events), GFP_KERNEL);
		if (!rsv_events)
			return -ENOMEM;

		ret = of_property_read_u32_array(node, pname, (u32 *)rsv_events,
						 nelm * 2);
		if (ret)
			return ret;

		for (i = 0; i < nelm; i++) {
			ti_dra7_xbar_reserve(rsv_events[i][0], rsv_events[i][1],
					     xbar->dma_inuse);
		}
		kfree(rsv_events);
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	iomem = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(iomem))
		return PTR_ERR(iomem);

	xbar->iomem = iomem;

	xbar->dmarouter.dev = &pdev->dev;
	xbar->dmarouter.route_free = ti_dra7_xbar_free;
	xbar->dma_offset = *(u32 *)match->data;

	mutex_init(&xbar->mutex);
	platform_set_drvdata(pdev, xbar);

	/* Reset the crossbar */
	for (i = 0; i < xbar->dma_requests; i++) {
		if (!test_bit(i, xbar->dma_inuse))
			ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val);
	}

	ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate,
				     &xbar->dmarouter);
	if (ret) {
		/* Restore the defaults for the crossbar */
		for (i = 0; i < xbar->dma_requests; i++) {
			if (!test_bit(i, xbar->dma_inuse))
				ti_dra7_xbar_write(xbar->iomem, i, i);
		}
	}

	return ret;
}

static int ti_dma_xbar_probe(struct platform_device *pdev)
{
	const struct of_device_id *match;
	int ret;

	match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node);
	if (unlikely(!match))
		return -EINVAL;

	switch (*(u32 *)match->data) {
	case TI_XBAR_DRA7:
		ret = ti_dra7_xbar_probe(pdev);
		break;
	case TI_XBAR_AM335X:
		ret = ti_am335x_xbar_probe(pdev);
		break;
	default:
		dev_err(&pdev->dev, "Unsupported crossbar\n");
		ret = -ENODEV;
		break;
	}

	return ret;
}

static struct platform_driver ti_dma_xbar_driver = {
	.driver = {
		.name = "ti-dma-crossbar",
		.of_match_table = of_match_ptr(ti_dma_xbar_match),
	},
	.probe	= ti_dma_xbar_probe,
};

static int omap_dmaxbar_init(void)
{
	return platform_driver_register(&ti_dma_xbar_driver);
}
arch_initcall(omap_dmaxbar_init);
Commit	Line	Data
a074ae38 PU	1	/*
	2	* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
	3	* Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	*/
	10	#include <linux/slab.h>
	11	#include <linux/err.h>
	12	#include <linux/init.h>
	13	#include <linux/list.h>
	14	#include <linux/io.h>
a074ae38 PU	15	#include <linux/of_address.h>
	16	#include <linux/of_device.h>
	17	#include <linux/of_dma.h>
	18
42dbdcc6 PU	19	#define TI_XBAR_DRA7 0
42dbdcc6 PU	20	#define TI_XBAR_AM335X 1
5f9367a8 PU	21	static const u32 ti_xbar_type[] = {
	22	[TI_XBAR_DRA7] = TI_XBAR_DRA7,
	23	[TI_XBAR_AM335X] = TI_XBAR_AM335X,
	24	};
42dbdcc6 PU	25
	26	static const struct of_device_id ti_dma_xbar_match[] = {
	27	{
	28	.compatible = "ti,dra7-dma-crossbar",
5f9367a8	29	.data = &ti_xbar_type[TI_XBAR_DRA7],
42dbdcc6 PU	30	},
	31	{
	32	.compatible = "ti,am335x-edma-crossbar",
5f9367a8	33	.data = &ti_xbar_type[TI_XBAR_AM335X],
42dbdcc6 PU	34	},
	35	{},
	36	};
	37
	38	/* Crossbar on AM335x/AM437x family */
	39	#define TI_AM335X_XBAR_LINES 64
	40
	41	struct ti_am335x_xbar_data {
	42	void __iomem *iomem;
	43
	44	struct dma_router dmarouter;
	45
	46	u32 xbar_events; /* maximum number of events to select in xbar */
	47	u32 dma_requests; /* number of DMA requests on eDMA */
	48	};
	49
	50	struct ti_am335x_xbar_map {
	51	u16 dma_line;
	52	u16 mux_val;
	53	};
	54
	55	static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u16 val)
	56	{
	57	writeb_relaxed(val & 0x1f, iomem + event);
	58	}
	59
	60	static void ti_am335x_xbar_free(struct device dev, void route_data)
	61	{
	62	struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev);
	63	struct ti_am335x_xbar_map *map = route_data;
	64
	65	dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n",
	66	map->mux_val, map->dma_line);
	67
	68	ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0);
	69	kfree(map);
	70	}
	71
	72	static void ti_am335x_xbar_route_allocate(struct of_phandle_args dma_spec,
	73	struct of_dma *ofdma)
	74	{
	75	struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
	76	struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev);
	77	struct ti_am335x_xbar_map *map;
	78
	79	if (dma_spec->args_count != 3)
	80	return ERR_PTR(-EINVAL);
	81
	82	if (dma_spec->args[2] >= xbar->xbar_events) {
	83	dev_err(&pdev->dev, "Invalid XBAR event number: %d\n",
	84	dma_spec->args[2]);
	85	return ERR_PTR(-EINVAL);
	86	}
	87
	88	if (dma_spec->args[0] >= xbar->dma_requests) {
	89	dev_err(&pdev->dev, "Invalid DMA request line number: %d\n",
	90	dma_spec->args[0]);
	91	return ERR_PTR(-EINVAL);
	92	}
	93
	94	/* The of_node_put() will be done in the core for the node */
	95	dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
	96	if (!dma_spec->np) {
	97	dev_err(&pdev->dev, "Can't get DMA master\n");
98	return ERR_PTR(-EINVAL);
99	}
100
101	map = kzalloc(sizeof(*map), GFP_KERNEL);
102	if (!map) {
103	of_node_put(dma_spec->np);
104	return ERR_PTR(-ENOMEM);
105	}
106
107	map->dma_line = (u16)dma_spec->args[0];
108	map->mux_val = (u16)dma_spec->args[2];
109
110	dma_spec->args[2] = 0;
111	dma_spec->args_count = 2;
112
113	dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n",
114	map->mux_val, map->dma_line);
115
116	ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val);
117
118	return map;
119	}
120
121	static const struct of_device_id ti_am335x_master_match[] = {
122	{ .compatible = "ti,edma3-tpcc", },
123	{},
124	};
125
126	static int ti_am335x_xbar_probe(struct platform_device *pdev)
127	{
128	struct device_node *node = pdev->dev.of_node;
129	const struct of_device_id *match;
130	struct device_node *dma_node;
131	struct ti_am335x_xbar_data *xbar;
132	struct resource *res;
133	void __iomem *iomem;
134	int i, ret;
135
136	if (!node)
137	return -ENODEV;
138
139	xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
140	if (!xbar)
141	return -ENOMEM;
142
143	dma_node = of_parse_phandle(node, "dma-masters", 0);
144	if (!dma_node) {
145	dev_err(&pdev->dev, "Can't get DMA master node\n");
146	return -ENODEV;
147	}
148
149	match = of_match_node(ti_am335x_master_match, dma_node);
150	if (!match) {
151	dev_err(&pdev->dev, "DMA master is not supported\n");
75bdc7f3	152	of_node_put(dma_node);
42dbdcc6 PU	153	return -EINVAL;
	154	}
	155
	156	if (of_property_read_u32(dma_node, "dma-requests",
	157	&xbar->dma_requests)) {
	158	dev_info(&pdev->dev,
	159	"Missing XBAR output information, using %u.\n",
	160	TI_AM335X_XBAR_LINES);
	161	xbar->dma_requests = TI_AM335X_XBAR_LINES;
	162	}
	163	of_node_put(dma_node);
	164
	165	if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) {
	166	dev_info(&pdev->dev,
	167	"Missing XBAR input information, using %u.\n",
	168	TI_AM335X_XBAR_LINES);
	169	xbar->xbar_events = TI_AM335X_XBAR_LINES;
	170	}
	171
	172	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	173	iomem = devm_ioremap_resource(&pdev->dev, res);
	174	if (IS_ERR(iomem))
	175	return PTR_ERR(iomem);
	176
	177	xbar->iomem = iomem;
	178
	179	xbar->dmarouter.dev = &pdev->dev;
	180	xbar->dmarouter.route_free = ti_am335x_xbar_free;
	181
	182	platform_set_drvdata(pdev, xbar);
	183
	184	/* Reset the crossbar */
	185	for (i = 0; i < xbar->dma_requests; i++)
	186	ti_am335x_xbar_write(xbar->iomem, i, 0);
	187
	188	ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate,
	189	&xbar->dmarouter);
	190
	191	return ret;
	192	}
	193
	194	/* Crossbar on DRA7xx family */
	195	#define TI_DRA7_XBAR_OUTPUTS 127
	196	#define TI_DRA7_XBAR_INPUTS 256
a074ae38	197
42dbdcc6	198	struct ti_dra7_xbar_data {
a074ae38 PU	199	void __iomem *iomem;
	200
	201	struct dma_router dmarouter;
ec9bfa1e PU	202	struct mutex mutex;
ec9bfa1e PU	203	unsigned long *dma_inuse;
a074ae38 PU	204
	205	u16 safe_val; /* Value to rest the crossbar lines */
	206	u32 xbar_requests; /* number of DMA requests connected to XBAR */
	207	u32 dma_requests; /* number of DMA requests forwarded to DMA */
1eb995bb	208	u32 dma_offset;
a074ae38 PU	209	};
a074ae38 PU	210
42dbdcc6	211	struct ti_dra7_xbar_map {
a074ae38 PU	212	u16 xbar_in;
	213	int xbar_out;
	214	};
	215
42dbdcc6	216	static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val)
a074ae38 PU	217	{
	218	writew_relaxed(val, iomem + (xbar * 2));
	219	}
	220
42dbdcc6	221	static void ti_dra7_xbar_free(struct device dev, void route_data)
a074ae38	222	{
42dbdcc6 PU	223	struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev);
42dbdcc6 PU	224	struct ti_dra7_xbar_map *map = route_data;
a074ae38 PU	225
	226	dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n",
	227	map->xbar_in, map->xbar_out);
	228
42dbdcc6	229	ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val);
ec9bfa1e PU	230	mutex_lock(&xbar->mutex);
	231	clear_bit(map->xbar_out, xbar->dma_inuse);
	232	mutex_unlock(&xbar->mutex);
a074ae38 PU	233	kfree(map);
	234	}
	235
42dbdcc6 PU	236	static void ti_dra7_xbar_route_allocate(struct of_phandle_args dma_spec,
42dbdcc6 PU	237	struct of_dma *ofdma)
a074ae38 PU	238	{
a074ae38 PU	239	struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
42dbdcc6 PU	240	struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev);
42dbdcc6 PU	241	struct ti_dra7_xbar_map *map;
a074ae38 PU	242
	243	if (dma_spec->args[0] >= xbar->xbar_requests) {
	244	dev_err(&pdev->dev, "Invalid XBAR request number: %d\n",
	245	dma_spec->args[0]);
	246	return ERR_PTR(-EINVAL);
	247	}
	248
	249	/* The of_node_put() will be done in the core for the node */
	250	dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
	251	if (!dma_spec->np) {
	252	dev_err(&pdev->dev, "Can't get DMA master\n");
	253	return ERR_PTR(-EINVAL);
	254	}
	255
	256	map = kzalloc(sizeof(*map), GFP_KERNEL);
	257	if (!map) {
	258	of_node_put(dma_spec->np);
	259	return ERR_PTR(-ENOMEM);
	260	}
	261
ec9bfa1e PU	262	mutex_lock(&xbar->mutex);
	263	map->xbar_out = find_first_zero_bit(xbar->dma_inuse,
	264	xbar->dma_requests);
	265	mutex_unlock(&xbar->mutex);
	266	if (map->xbar_out == xbar->dma_requests) {
	267	dev_err(&pdev->dev, "Run out of free DMA requests\n");
	268	kfree(map);
	269	return ERR_PTR(-ENOMEM);
	270	}
	271	set_bit(map->xbar_out, xbar->dma_inuse);
	272
a074ae38 PU	273	map->xbar_in = (u16)dma_spec->args[0];
a074ae38 PU	274
1eb995bb	275	dma_spec->args[0] = map->xbar_out + xbar->dma_offset;
a074ae38 PU	276
	277	dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n",
	278	map->xbar_in, map->xbar_out);
	279
42dbdcc6	280	ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in);
a074ae38 PU	281
	282	return map;
	283	}
	284
5f9367a8 PU	285	#define TI_XBAR_EDMA_OFFSET 0
	286	#define TI_XBAR_SDMA_OFFSET 1
	287	static const u32 ti_dma_offset[] = {
	288	[TI_XBAR_EDMA_OFFSET] = 0,
	289	[TI_XBAR_SDMA_OFFSET] = 1,
	290	};
	291
42dbdcc6	292	static const struct of_device_id ti_dra7_master_match[] = {
1eb995bb PU	293	{
1eb995bb PU	294	.compatible = "ti,omap4430-sdma",
5f9367a8	295	.data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET],
1eb995bb PU	296	},
	297	{
	298	.compatible = "ti,edma3",
5f9367a8	299	.data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
1eb995bb	300	},
2adb2743 PU	301	{
2adb2743 PU	302	.compatible = "ti,edma3-tpcc",
5f9367a8	303	.data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
2adb2743	304	},
1eb995bb PU	305	{},
	306	};
	307
0f73f3e8 PU	308	static inline void ti_dra7_xbar_reserve(int offset, int len, unsigned long *p)
	309	{
	310	for (; len > 0; len--)
	311	clear_bit(offset + (len - 1), p);
	312	}
	313
42dbdcc6	314	static int ti_dra7_xbar_probe(struct platform_device *pdev)
a074ae38 PU	315	{
a074ae38 PU	316	struct device_node *node = pdev->dev.of_node;
1eb995bb	317	const struct of_device_id *match;
a074ae38	318	struct device_node *dma_node;
42dbdcc6	319	struct ti_dra7_xbar_data *xbar;
0f73f3e8	320	struct property *prop;
a074ae38 PU	321	struct resource *res;
a074ae38 PU	322	u32 safe_val;
e7282b66	323	int sz;
a074ae38 PU	324	void __iomem *iomem;
	325	int i, ret;
	326
	327	if (!node)
	328	return -ENODEV;
	329
	330	xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
	331	if (!xbar)
	332	return -ENOMEM;
	333
	334	dma_node = of_parse_phandle(node, "dma-masters", 0);
	335	if (!dma_node) {
	336	dev_err(&pdev->dev, "Can't get DMA master node\n");
	337	return -ENODEV;
	338	}
	339
42dbdcc6	340	match = of_match_node(ti_dra7_master_match, dma_node);
1eb995bb PU	341	if (!match) {
1eb995bb PU	342	dev_err(&pdev->dev, "DMA master is not supported\n");
75bdc7f3	343	of_node_put(dma_node);
1eb995bb PU	344	return -EINVAL;
	345	}
	346
a074ae38 PU	347	if (of_property_read_u32(dma_node, "dma-requests",
	348	&xbar->dma_requests)) {
	349	dev_info(&pdev->dev,
	350	"Missing XBAR output information, using %u.\n",
42dbdcc6 PU	351	TI_DRA7_XBAR_OUTPUTS);
42dbdcc6 PU	352	xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS;
a074ae38 PU	353	}
	354	of_node_put(dma_node);
	355
ec9bfa1e PU	356	xbar->dma_inuse = devm_kcalloc(&pdev->dev,
	357	BITS_TO_LONGS(xbar->dma_requests),
	358	sizeof(unsigned long), GFP_KERNEL);
	359	if (!xbar->dma_inuse)
	360	return -ENOMEM;
	361
a074ae38 PU	362	if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) {
	363	dev_info(&pdev->dev,
	364	"Missing XBAR input information, using %u.\n",
42dbdcc6 PU	365	TI_DRA7_XBAR_INPUTS);
42dbdcc6 PU	366	xbar->xbar_requests = TI_DRA7_XBAR_INPUTS;
a074ae38 PU	367	}
	368
	369	if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val))
	370	xbar->safe_val = (u16)safe_val;
	371
0f73f3e8 PU	372
	373	prop = of_find_property(node, "ti,reserved-dma-request-ranges", &sz);
	374	if (prop) {
	375	const char pname[] = "ti,reserved-dma-request-ranges";
	376	u32 (*rsv_events)[2];
	377	size_t nelm = sz / sizeof(*rsv_events);
	378	int i;
	379
	380	if (!nelm)
	381	return -EINVAL;
	382
	383	rsv_events = kcalloc(nelm, sizeof(*rsv_events), GFP_KERNEL);
	384	if (!rsv_events)
	385	return -ENOMEM;
	386
	387	ret = of_property_read_u32_array(node, pname, (u32 *)rsv_events,
	388	nelm * 2);
	389	if (ret)
	390	return ret;
	391
	392	for (i = 0; i < nelm; i++) {
	393	ti_dra7_xbar_reserve(rsv_events[i][0], rsv_events[i][1],
	394	xbar->dma_inuse);
	395	}
	396	kfree(rsv_events);
	397	}
	398
a074ae38	399	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
a074ae38	400	iomem = devm_ioremap_resource(&pdev->dev, res);
28eb232f AL	401	if (IS_ERR(iomem))
28eb232f AL	402	return PTR_ERR(iomem);
a074ae38 PU	403
	404	xbar->iomem = iomem;
	405
	406	xbar->dmarouter.dev = &pdev->dev;
42dbdcc6	407	xbar->dmarouter.route_free = ti_dra7_xbar_free;
5f9367a8	408	xbar->dma_offset = (u32 )match->data;
a074ae38	409
ec9bfa1e	410	mutex_init(&xbar->mutex);
a074ae38 PU	411	platform_set_drvdata(pdev, xbar);
	412
	413	/* Reset the crossbar */
0f73f3e8 PU	414	for (i = 0; i < xbar->dma_requests; i++) {
	415	if (!test_bit(i, xbar->dma_inuse))
	416	ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val);
	417	}
a074ae38	418
42dbdcc6	419	ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate,
a074ae38 PU	420	&xbar->dmarouter);
	421	if (ret) {
	422	/* Restore the defaults for the crossbar */
0f73f3e8 PU	423	for (i = 0; i < xbar->dma_requests; i++) {
	424	if (!test_bit(i, xbar->dma_inuse))
	425	ti_dra7_xbar_write(xbar->iomem, i, i);
	426	}
a074ae38 PU	427	}
	428
	429	return ret;
	430	}
	431
42dbdcc6 PU	432	static int ti_dma_xbar_probe(struct platform_device *pdev)
	433	{
	434	const struct of_device_id *match;
	435	int ret;
	436
	437	match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node);
	438	if (unlikely(!match))
	439	return -EINVAL;
	440
5f9367a8	441	switch ((u32 )match->data) {
42dbdcc6 PU	442	case TI_XBAR_DRA7:
	443	ret = ti_dra7_xbar_probe(pdev);
	444	break;
	445	case TI_XBAR_AM335X:
	446	ret = ti_am335x_xbar_probe(pdev);
	447	break;
	448	default:
	449	dev_err(&pdev->dev, "Unsupported crossbar\n");
	450	ret = -ENODEV;
	451	break;
	452	}
	453
	454	return ret;
	455	}
a074ae38 PU	456
	457	static struct platform_driver ti_dma_xbar_driver = {
	458	.driver = {
	459	.name = "ti-dma-crossbar",
	460	.of_match_table = of_match_ptr(ti_dma_xbar_match),
	461	},
	462	.probe = ti_dma_xbar_probe,
	463	};
	464
d646162b	465	static int omap_dmaxbar_init(void)
a074ae38 PU	466	{
	467	return platform_driver_register(&ti_dma_xbar_driver);
	468	}
	469	arch_initcall(omap_dmaxbar_init);