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a074ae38 PU |
1 | /* |
2 | * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com | |
3 | * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | */ | |
10 | #include <linux/slab.h> | |
11 | #include <linux/err.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/list.h> | |
14 | #include <linux/io.h> | |
a074ae38 PU |
15 | #include <linux/of_address.h> |
16 | #include <linux/of_device.h> | |
17 | #include <linux/of_dma.h> | |
18 | ||
42dbdcc6 PU |
19 | #define TI_XBAR_DRA7 0 |
20 | #define TI_XBAR_AM335X 1 | |
5f9367a8 PU |
21 | static const u32 ti_xbar_type[] = { |
22 | [TI_XBAR_DRA7] = TI_XBAR_DRA7, | |
23 | [TI_XBAR_AM335X] = TI_XBAR_AM335X, | |
24 | }; | |
42dbdcc6 PU |
25 | |
26 | static const struct of_device_id ti_dma_xbar_match[] = { | |
27 | { | |
28 | .compatible = "ti,dra7-dma-crossbar", | |
5f9367a8 | 29 | .data = &ti_xbar_type[TI_XBAR_DRA7], |
42dbdcc6 PU |
30 | }, |
31 | { | |
32 | .compatible = "ti,am335x-edma-crossbar", | |
5f9367a8 | 33 | .data = &ti_xbar_type[TI_XBAR_AM335X], |
42dbdcc6 PU |
34 | }, |
35 | {}, | |
36 | }; | |
37 | ||
38 | /* Crossbar on AM335x/AM437x family */ | |
39 | #define TI_AM335X_XBAR_LINES 64 | |
40 | ||
41 | struct ti_am335x_xbar_data { | |
42 | void __iomem *iomem; | |
43 | ||
44 | struct dma_router dmarouter; | |
45 | ||
46 | u32 xbar_events; /* maximum number of events to select in xbar */ | |
47 | u32 dma_requests; /* number of DMA requests on eDMA */ | |
48 | }; | |
49 | ||
50 | struct ti_am335x_xbar_map { | |
51 | u16 dma_line; | |
52 | u16 mux_val; | |
53 | }; | |
54 | ||
55 | static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u16 val) | |
56 | { | |
57 | writeb_relaxed(val & 0x1f, iomem + event); | |
58 | } | |
59 | ||
60 | static void ti_am335x_xbar_free(struct device *dev, void *route_data) | |
61 | { | |
62 | struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev); | |
63 | struct ti_am335x_xbar_map *map = route_data; | |
64 | ||
65 | dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n", | |
66 | map->mux_val, map->dma_line); | |
67 | ||
68 | ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0); | |
69 | kfree(map); | |
70 | } | |
71 | ||
72 | static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec, | |
73 | struct of_dma *ofdma) | |
74 | { | |
75 | struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); | |
76 | struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev); | |
77 | struct ti_am335x_xbar_map *map; | |
78 | ||
79 | if (dma_spec->args_count != 3) | |
80 | return ERR_PTR(-EINVAL); | |
81 | ||
82 | if (dma_spec->args[2] >= xbar->xbar_events) { | |
83 | dev_err(&pdev->dev, "Invalid XBAR event number: %d\n", | |
84 | dma_spec->args[2]); | |
85 | return ERR_PTR(-EINVAL); | |
86 | } | |
87 | ||
88 | if (dma_spec->args[0] >= xbar->dma_requests) { | |
89 | dev_err(&pdev->dev, "Invalid DMA request line number: %d\n", | |
90 | dma_spec->args[0]); | |
91 | return ERR_PTR(-EINVAL); | |
92 | } | |
93 | ||
94 | /* The of_node_put() will be done in the core for the node */ | |
95 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); | |
96 | if (!dma_spec->np) { | |
97 | dev_err(&pdev->dev, "Can't get DMA master\n"); | |
98 | return ERR_PTR(-EINVAL); | |
99 | } | |
100 | ||
101 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
102 | if (!map) { | |
103 | of_node_put(dma_spec->np); | |
104 | return ERR_PTR(-ENOMEM); | |
105 | } | |
106 | ||
107 | map->dma_line = (u16)dma_spec->args[0]; | |
108 | map->mux_val = (u16)dma_spec->args[2]; | |
109 | ||
110 | dma_spec->args[2] = 0; | |
111 | dma_spec->args_count = 2; | |
112 | ||
113 | dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n", | |
114 | map->mux_val, map->dma_line); | |
115 | ||
116 | ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); | |
117 | ||
118 | return map; | |
119 | } | |
120 | ||
121 | static const struct of_device_id ti_am335x_master_match[] = { | |
122 | { .compatible = "ti,edma3-tpcc", }, | |
123 | {}, | |
124 | }; | |
125 | ||
126 | static int ti_am335x_xbar_probe(struct platform_device *pdev) | |
127 | { | |
128 | struct device_node *node = pdev->dev.of_node; | |
129 | const struct of_device_id *match; | |
130 | struct device_node *dma_node; | |
131 | struct ti_am335x_xbar_data *xbar; | |
132 | struct resource *res; | |
133 | void __iomem *iomem; | |
134 | int i, ret; | |
135 | ||
136 | if (!node) | |
137 | return -ENODEV; | |
138 | ||
139 | xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL); | |
140 | if (!xbar) | |
141 | return -ENOMEM; | |
142 | ||
143 | dma_node = of_parse_phandle(node, "dma-masters", 0); | |
144 | if (!dma_node) { | |
145 | dev_err(&pdev->dev, "Can't get DMA master node\n"); | |
146 | return -ENODEV; | |
147 | } | |
148 | ||
149 | match = of_match_node(ti_am335x_master_match, dma_node); | |
150 | if (!match) { | |
151 | dev_err(&pdev->dev, "DMA master is not supported\n"); | |
75bdc7f3 | 152 | of_node_put(dma_node); |
42dbdcc6 PU |
153 | return -EINVAL; |
154 | } | |
155 | ||
156 | if (of_property_read_u32(dma_node, "dma-requests", | |
157 | &xbar->dma_requests)) { | |
158 | dev_info(&pdev->dev, | |
159 | "Missing XBAR output information, using %u.\n", | |
160 | TI_AM335X_XBAR_LINES); | |
161 | xbar->dma_requests = TI_AM335X_XBAR_LINES; | |
162 | } | |
163 | of_node_put(dma_node); | |
164 | ||
165 | if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) { | |
166 | dev_info(&pdev->dev, | |
167 | "Missing XBAR input information, using %u.\n", | |
168 | TI_AM335X_XBAR_LINES); | |
169 | xbar->xbar_events = TI_AM335X_XBAR_LINES; | |
170 | } | |
171 | ||
172 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
173 | iomem = devm_ioremap_resource(&pdev->dev, res); | |
174 | if (IS_ERR(iomem)) | |
175 | return PTR_ERR(iomem); | |
176 | ||
177 | xbar->iomem = iomem; | |
178 | ||
179 | xbar->dmarouter.dev = &pdev->dev; | |
180 | xbar->dmarouter.route_free = ti_am335x_xbar_free; | |
181 | ||
182 | platform_set_drvdata(pdev, xbar); | |
183 | ||
184 | /* Reset the crossbar */ | |
185 | for (i = 0; i < xbar->dma_requests; i++) | |
186 | ti_am335x_xbar_write(xbar->iomem, i, 0); | |
187 | ||
188 | ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate, | |
189 | &xbar->dmarouter); | |
190 | ||
191 | return ret; | |
192 | } | |
193 | ||
194 | /* Crossbar on DRA7xx family */ | |
195 | #define TI_DRA7_XBAR_OUTPUTS 127 | |
196 | #define TI_DRA7_XBAR_INPUTS 256 | |
a074ae38 | 197 | |
42dbdcc6 | 198 | struct ti_dra7_xbar_data { |
a074ae38 PU |
199 | void __iomem *iomem; |
200 | ||
201 | struct dma_router dmarouter; | |
ec9bfa1e PU |
202 | struct mutex mutex; |
203 | unsigned long *dma_inuse; | |
a074ae38 PU |
204 | |
205 | u16 safe_val; /* Value to rest the crossbar lines */ | |
206 | u32 xbar_requests; /* number of DMA requests connected to XBAR */ | |
207 | u32 dma_requests; /* number of DMA requests forwarded to DMA */ | |
1eb995bb | 208 | u32 dma_offset; |
a074ae38 PU |
209 | }; |
210 | ||
42dbdcc6 | 211 | struct ti_dra7_xbar_map { |
a074ae38 PU |
212 | u16 xbar_in; |
213 | int xbar_out; | |
214 | }; | |
215 | ||
42dbdcc6 | 216 | static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val) |
a074ae38 PU |
217 | { |
218 | writew_relaxed(val, iomem + (xbar * 2)); | |
219 | } | |
220 | ||
42dbdcc6 | 221 | static void ti_dra7_xbar_free(struct device *dev, void *route_data) |
a074ae38 | 222 | { |
42dbdcc6 PU |
223 | struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev); |
224 | struct ti_dra7_xbar_map *map = route_data; | |
a074ae38 PU |
225 | |
226 | dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n", | |
227 | map->xbar_in, map->xbar_out); | |
228 | ||
42dbdcc6 | 229 | ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val); |
ec9bfa1e PU |
230 | mutex_lock(&xbar->mutex); |
231 | clear_bit(map->xbar_out, xbar->dma_inuse); | |
232 | mutex_unlock(&xbar->mutex); | |
a074ae38 PU |
233 | kfree(map); |
234 | } | |
235 | ||
42dbdcc6 PU |
236 | static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec, |
237 | struct of_dma *ofdma) | |
a074ae38 PU |
238 | { |
239 | struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); | |
42dbdcc6 PU |
240 | struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev); |
241 | struct ti_dra7_xbar_map *map; | |
a074ae38 PU |
242 | |
243 | if (dma_spec->args[0] >= xbar->xbar_requests) { | |
244 | dev_err(&pdev->dev, "Invalid XBAR request number: %d\n", | |
245 | dma_spec->args[0]); | |
246 | return ERR_PTR(-EINVAL); | |
247 | } | |
248 | ||
249 | /* The of_node_put() will be done in the core for the node */ | |
250 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); | |
251 | if (!dma_spec->np) { | |
252 | dev_err(&pdev->dev, "Can't get DMA master\n"); | |
253 | return ERR_PTR(-EINVAL); | |
254 | } | |
255 | ||
256 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
257 | if (!map) { | |
258 | of_node_put(dma_spec->np); | |
259 | return ERR_PTR(-ENOMEM); | |
260 | } | |
261 | ||
ec9bfa1e PU |
262 | mutex_lock(&xbar->mutex); |
263 | map->xbar_out = find_first_zero_bit(xbar->dma_inuse, | |
264 | xbar->dma_requests); | |
ec9bfa1e | 265 | if (map->xbar_out == xbar->dma_requests) { |
2ccb4837 | 266 | mutex_unlock(&xbar->mutex); |
ec9bfa1e PU |
267 | dev_err(&pdev->dev, "Run out of free DMA requests\n"); |
268 | kfree(map); | |
269 | return ERR_PTR(-ENOMEM); | |
270 | } | |
271 | set_bit(map->xbar_out, xbar->dma_inuse); | |
2ccb4837 | 272 | mutex_unlock(&xbar->mutex); |
ec9bfa1e | 273 | |
a074ae38 PU |
274 | map->xbar_in = (u16)dma_spec->args[0]; |
275 | ||
1eb995bb | 276 | dma_spec->args[0] = map->xbar_out + xbar->dma_offset; |
a074ae38 PU |
277 | |
278 | dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n", | |
279 | map->xbar_in, map->xbar_out); | |
280 | ||
42dbdcc6 | 281 | ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in); |
a074ae38 PU |
282 | |
283 | return map; | |
284 | } | |
285 | ||
5f9367a8 PU |
286 | #define TI_XBAR_EDMA_OFFSET 0 |
287 | #define TI_XBAR_SDMA_OFFSET 1 | |
288 | static const u32 ti_dma_offset[] = { | |
289 | [TI_XBAR_EDMA_OFFSET] = 0, | |
290 | [TI_XBAR_SDMA_OFFSET] = 1, | |
291 | }; | |
292 | ||
42dbdcc6 | 293 | static const struct of_device_id ti_dra7_master_match[] = { |
1eb995bb PU |
294 | { |
295 | .compatible = "ti,omap4430-sdma", | |
5f9367a8 | 296 | .data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET], |
1eb995bb PU |
297 | }, |
298 | { | |
299 | .compatible = "ti,edma3", | |
5f9367a8 | 300 | .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET], |
1eb995bb | 301 | }, |
2adb2743 PU |
302 | { |
303 | .compatible = "ti,edma3-tpcc", | |
5f9367a8 | 304 | .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET], |
2adb2743 | 305 | }, |
1eb995bb PU |
306 | {}, |
307 | }; | |
308 | ||
0f73f3e8 PU |
309 | static inline void ti_dra7_xbar_reserve(int offset, int len, unsigned long *p) |
310 | { | |
311 | for (; len > 0; len--) | |
a2f6721b | 312 | set_bit(offset + (len - 1), p); |
0f73f3e8 PU |
313 | } |
314 | ||
42dbdcc6 | 315 | static int ti_dra7_xbar_probe(struct platform_device *pdev) |
a074ae38 PU |
316 | { |
317 | struct device_node *node = pdev->dev.of_node; | |
1eb995bb | 318 | const struct of_device_id *match; |
a074ae38 | 319 | struct device_node *dma_node; |
42dbdcc6 | 320 | struct ti_dra7_xbar_data *xbar; |
0f73f3e8 | 321 | struct property *prop; |
a074ae38 PU |
322 | struct resource *res; |
323 | u32 safe_val; | |
e7282b66 | 324 | int sz; |
a074ae38 PU |
325 | void __iomem *iomem; |
326 | int i, ret; | |
327 | ||
328 | if (!node) | |
329 | return -ENODEV; | |
330 | ||
331 | xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL); | |
332 | if (!xbar) | |
333 | return -ENOMEM; | |
334 | ||
335 | dma_node = of_parse_phandle(node, "dma-masters", 0); | |
336 | if (!dma_node) { | |
337 | dev_err(&pdev->dev, "Can't get DMA master node\n"); | |
338 | return -ENODEV; | |
339 | } | |
340 | ||
42dbdcc6 | 341 | match = of_match_node(ti_dra7_master_match, dma_node); |
1eb995bb PU |
342 | if (!match) { |
343 | dev_err(&pdev->dev, "DMA master is not supported\n"); | |
75bdc7f3 | 344 | of_node_put(dma_node); |
1eb995bb PU |
345 | return -EINVAL; |
346 | } | |
347 | ||
a074ae38 PU |
348 | if (of_property_read_u32(dma_node, "dma-requests", |
349 | &xbar->dma_requests)) { | |
350 | dev_info(&pdev->dev, | |
351 | "Missing XBAR output information, using %u.\n", | |
42dbdcc6 PU |
352 | TI_DRA7_XBAR_OUTPUTS); |
353 | xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS; | |
a074ae38 PU |
354 | } |
355 | of_node_put(dma_node); | |
356 | ||
ec9bfa1e PU |
357 | xbar->dma_inuse = devm_kcalloc(&pdev->dev, |
358 | BITS_TO_LONGS(xbar->dma_requests), | |
359 | sizeof(unsigned long), GFP_KERNEL); | |
360 | if (!xbar->dma_inuse) | |
361 | return -ENOMEM; | |
362 | ||
a074ae38 PU |
363 | if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) { |
364 | dev_info(&pdev->dev, | |
365 | "Missing XBAR input information, using %u.\n", | |
42dbdcc6 PU |
366 | TI_DRA7_XBAR_INPUTS); |
367 | xbar->xbar_requests = TI_DRA7_XBAR_INPUTS; | |
a074ae38 PU |
368 | } |
369 | ||
370 | if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val)) | |
371 | xbar->safe_val = (u16)safe_val; | |
372 | ||
0f73f3e8 PU |
373 | |
374 | prop = of_find_property(node, "ti,reserved-dma-request-ranges", &sz); | |
375 | if (prop) { | |
376 | const char pname[] = "ti,reserved-dma-request-ranges"; | |
377 | u32 (*rsv_events)[2]; | |
378 | size_t nelm = sz / sizeof(*rsv_events); | |
379 | int i; | |
380 | ||
381 | if (!nelm) | |
382 | return -EINVAL; | |
383 | ||
384 | rsv_events = kcalloc(nelm, sizeof(*rsv_events), GFP_KERNEL); | |
385 | if (!rsv_events) | |
386 | return -ENOMEM; | |
387 | ||
388 | ret = of_property_read_u32_array(node, pname, (u32 *)rsv_events, | |
389 | nelm * 2); | |
390 | if (ret) | |
391 | return ret; | |
392 | ||
393 | for (i = 0; i < nelm; i++) { | |
394 | ti_dra7_xbar_reserve(rsv_events[i][0], rsv_events[i][1], | |
395 | xbar->dma_inuse); | |
396 | } | |
397 | kfree(rsv_events); | |
398 | } | |
399 | ||
a074ae38 | 400 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
a074ae38 | 401 | iomem = devm_ioremap_resource(&pdev->dev, res); |
28eb232f AL |
402 | if (IS_ERR(iomem)) |
403 | return PTR_ERR(iomem); | |
a074ae38 PU |
404 | |
405 | xbar->iomem = iomem; | |
406 | ||
407 | xbar->dmarouter.dev = &pdev->dev; | |
42dbdcc6 | 408 | xbar->dmarouter.route_free = ti_dra7_xbar_free; |
5f9367a8 | 409 | xbar->dma_offset = *(u32 *)match->data; |
a074ae38 | 410 | |
ec9bfa1e | 411 | mutex_init(&xbar->mutex); |
a074ae38 PU |
412 | platform_set_drvdata(pdev, xbar); |
413 | ||
414 | /* Reset the crossbar */ | |
0f73f3e8 PU |
415 | for (i = 0; i < xbar->dma_requests; i++) { |
416 | if (!test_bit(i, xbar->dma_inuse)) | |
417 | ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val); | |
418 | } | |
a074ae38 | 419 | |
42dbdcc6 | 420 | ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate, |
a074ae38 PU |
421 | &xbar->dmarouter); |
422 | if (ret) { | |
423 | /* Restore the defaults for the crossbar */ | |
0f73f3e8 PU |
424 | for (i = 0; i < xbar->dma_requests; i++) { |
425 | if (!test_bit(i, xbar->dma_inuse)) | |
426 | ti_dra7_xbar_write(xbar->iomem, i, i); | |
427 | } | |
a074ae38 PU |
428 | } |
429 | ||
430 | return ret; | |
431 | } | |
432 | ||
42dbdcc6 PU |
433 | static int ti_dma_xbar_probe(struct platform_device *pdev) |
434 | { | |
435 | const struct of_device_id *match; | |
436 | int ret; | |
437 | ||
438 | match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node); | |
439 | if (unlikely(!match)) | |
440 | return -EINVAL; | |
441 | ||
5f9367a8 | 442 | switch (*(u32 *)match->data) { |
42dbdcc6 PU |
443 | case TI_XBAR_DRA7: |
444 | ret = ti_dra7_xbar_probe(pdev); | |
445 | break; | |
446 | case TI_XBAR_AM335X: | |
447 | ret = ti_am335x_xbar_probe(pdev); | |
448 | break; | |
449 | default: | |
450 | dev_err(&pdev->dev, "Unsupported crossbar\n"); | |
451 | ret = -ENODEV; | |
452 | break; | |
453 | } | |
454 | ||
455 | return ret; | |
456 | } | |
a074ae38 PU |
457 | |
458 | static struct platform_driver ti_dma_xbar_driver = { | |
459 | .driver = { | |
460 | .name = "ti-dma-crossbar", | |
461 | .of_match_table = of_match_ptr(ti_dma_xbar_match), | |
462 | }, | |
463 | .probe = ti_dma_xbar_probe, | |
464 | }; | |
465 | ||
d646162b | 466 | static int omap_dmaxbar_init(void) |
a074ae38 PU |
467 | { |
468 | return platform_driver_register(&ti_dma_xbar_driver); | |
469 | } | |
470 | arch_initcall(omap_dmaxbar_init); |