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e941759c
ML
1/*
2 * Fence mechanism for dma-buf and to allow for asynchronous dma access
3 *
4 * Copyright (C) 2012 Canonical Ltd
5 * Copyright (C) 2012 Texas Instruments
6 *
7 * Authors:
8 * Rob Clark <robdclark@gmail.com>
9 * Maarten Lankhorst <maarten.lankhorst@canonical.com>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published by
13 * the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * more details.
19 */
20
21#include <linux/slab.h>
22#include <linux/export.h>
23#include <linux/atomic.h>
f54d1867 24#include <linux/dma-fence.h>
e941759c
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25
26#define CREATE_TRACE_POINTS
f54d1867 27#include <trace/events/dma_fence.h>
e941759c 28
f54d1867
CW
29EXPORT_TRACEPOINT_SYMBOL(dma_fence_annotate_wait_on);
30EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit);
e941759c 31
e9f3b796 32/*
e941759c
ML
33 * fence context counter: each execution context should have its own
34 * fence context, this allows checking if fences belong to the same
35 * context or not. One device can have multiple separate contexts,
36 * and they're used if some engine can run independently of another.
37 */
f54d1867 38static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0);
e941759c
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39
40/**
f54d1867 41 * dma_fence_context_alloc - allocate an array of fence contexts
e941759c
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42 * @num: [in] amount of contexts to allocate
43 *
44 * This function will return the first index of the number of fences allocated.
45 * The fence context is used for setting fence->context to a unique number.
46 */
f54d1867 47u64 dma_fence_context_alloc(unsigned num)
e941759c
ML
48{
49 BUG_ON(!num);
f54d1867 50 return atomic64_add_return(num, &dma_fence_context_counter) - num;
e941759c 51}
f54d1867 52EXPORT_SYMBOL(dma_fence_context_alloc);
e941759c
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53
54/**
f54d1867 55 * dma_fence_signal_locked - signal completion of a fence
e941759c
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56 * @fence: the fence to signal
57 *
58 * Signal completion for software callbacks on a fence, this will unblock
f54d1867
CW
59 * dma_fence_wait() calls and run all the callbacks added with
60 * dma_fence_add_callback(). Can be called multiple times, but since a fence
e941759c
ML
61 * can only go from unsignaled to signaled state, it will only be effective
62 * the first time.
63 *
f54d1867 64 * Unlike dma_fence_signal, this function must be called with fence->lock held.
e941759c 65 */
f54d1867 66int dma_fence_signal_locked(struct dma_fence *fence)
e941759c 67{
f54d1867 68 struct dma_fence_cb *cur, *tmp;
e941759c
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69 int ret = 0;
70
78010cd9
RC
71 lockdep_assert_held(fence->lock);
72
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73 if (WARN_ON(!fence))
74 return -EINVAL;
75
76 if (!ktime_to_ns(fence->timestamp)) {
77 fence->timestamp = ktime_get();
78 smp_mb__before_atomic();
79 }
80
f54d1867 81 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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82 ret = -EINVAL;
83
84 /*
f54d1867 85 * we might have raced with the unlocked dma_fence_signal,
e941759c
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86 * still run through all callbacks
87 */
88 } else
f54d1867 89 trace_dma_fence_signaled(fence);
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90
91 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
92 list_del_init(&cur->node);
93 cur->func(fence, cur);
94 }
95 return ret;
96}
f54d1867 97EXPORT_SYMBOL(dma_fence_signal_locked);
e941759c
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98
99/**
f54d1867 100 * dma_fence_signal - signal completion of a fence
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101 * @fence: the fence to signal
102 *
103 * Signal completion for software callbacks on a fence, this will unblock
f54d1867
CW
104 * dma_fence_wait() calls and run all the callbacks added with
105 * dma_fence_add_callback(). Can be called multiple times, but since a fence
e941759c
ML
106 * can only go from unsignaled to signaled state, it will only be effective
107 * the first time.
108 */
f54d1867 109int dma_fence_signal(struct dma_fence *fence)
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110{
111 unsigned long flags;
112
113 if (!fence)
114 return -EINVAL;
115
116 if (!ktime_to_ns(fence->timestamp)) {
117 fence->timestamp = ktime_get();
118 smp_mb__before_atomic();
119 }
120
f54d1867 121 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
e941759c
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122 return -EINVAL;
123
f54d1867 124 trace_dma_fence_signaled(fence);
e941759c 125
f54d1867
CW
126 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) {
127 struct dma_fence_cb *cur, *tmp;
e941759c
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128
129 spin_lock_irqsave(fence->lock, flags);
130 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
131 list_del_init(&cur->node);
132 cur->func(fence, cur);
133 }
134 spin_unlock_irqrestore(fence->lock, flags);
135 }
136 return 0;
137}
f54d1867 138EXPORT_SYMBOL(dma_fence_signal);
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139
140/**
f54d1867 141 * dma_fence_wait_timeout - sleep until the fence gets signaled
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142 * or until timeout elapses
143 * @fence: [in] the fence to wait on
144 * @intr: [in] if true, do an interruptible wait
145 * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
146 *
147 * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
148 * remaining timeout in jiffies on success. Other error values may be
149 * returned on custom implementations.
150 *
151 * Performs a synchronous wait on this fence. It is assumed the caller
152 * directly or indirectly (buf-mgr between reservation and committing)
153 * holds a reference to the fence, otherwise the fence might be
154 * freed before return, resulting in undefined behavior.
155 */
156signed long
f54d1867 157dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)
e941759c
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158{
159 signed long ret;
160
161 if (WARN_ON(timeout < 0))
162 return -EINVAL;
163
f54d1867 164 trace_dma_fence_wait_start(fence);
e941759c 165 ret = fence->ops->wait(fence, intr, timeout);
f54d1867 166 trace_dma_fence_wait_end(fence);
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167 return ret;
168}
f54d1867 169EXPORT_SYMBOL(dma_fence_wait_timeout);
e941759c 170
f54d1867 171void dma_fence_release(struct kref *kref)
e941759c 172{
f54d1867
CW
173 struct dma_fence *fence =
174 container_of(kref, struct dma_fence, refcount);
e941759c 175
f54d1867 176 trace_dma_fence_destroy(fence);
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177
178 BUG_ON(!list_empty(&fence->cb_list));
179
180 if (fence->ops->release)
181 fence->ops->release(fence);
182 else
f54d1867 183 dma_fence_free(fence);
e941759c 184}
f54d1867 185EXPORT_SYMBOL(dma_fence_release);
e941759c 186
f54d1867 187void dma_fence_free(struct dma_fence *fence)
e941759c 188{
3c3b177a 189 kfree_rcu(fence, rcu);
e941759c 190}
f54d1867 191EXPORT_SYMBOL(dma_fence_free);
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192
193/**
f54d1867 194 * dma_fence_enable_sw_signaling - enable signaling on fence
e941759c
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195 * @fence: [in] the fence to enable
196 *
197 * this will request for sw signaling to be enabled, to make the fence
198 * complete as soon as possible
199 */
f54d1867 200void dma_fence_enable_sw_signaling(struct dma_fence *fence)
e941759c
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201{
202 unsigned long flags;
203
f54d1867
CW
204 if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
205 &fence->flags) &&
206 !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
207 trace_dma_fence_enable_signal(fence);
e941759c
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208
209 spin_lock_irqsave(fence->lock, flags);
210
211 if (!fence->ops->enable_signaling(fence))
f54d1867 212 dma_fence_signal_locked(fence);
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213
214 spin_unlock_irqrestore(fence->lock, flags);
215 }
216}
f54d1867 217EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
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218
219/**
f54d1867 220 * dma_fence_add_callback - add a callback to be called when the fence
e941759c
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221 * is signaled
222 * @fence: [in] the fence to wait on
223 * @cb: [in] the callback to register
224 * @func: [in] the function to call
225 *
f54d1867 226 * cb will be initialized by dma_fence_add_callback, no initialization
e941759c
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227 * by the caller is required. Any number of callbacks can be registered
228 * to a fence, but a callback can only be registered to one fence at a time.
229 *
230 * Note that the callback can be called from an atomic context. If
231 * fence is already signaled, this function will return -ENOENT (and
232 * *not* call the callback)
233 *
234 * Add a software callback to the fence. Same restrictions apply to
f54d1867 235 * refcount as it does to dma_fence_wait, however the caller doesn't need to
e941759c
ML
236 * keep a refcount to fence afterwards: when software access is enabled,
237 * the creator of the fence is required to keep the fence alive until
f54d1867 238 * after it signals with dma_fence_signal. The callback itself can be called
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239 * from irq context.
240 *
241 */
f54d1867
CW
242int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
243 dma_fence_func_t func)
e941759c
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244{
245 unsigned long flags;
246 int ret = 0;
247 bool was_set;
248
249 if (WARN_ON(!fence || !func))
250 return -EINVAL;
251
f54d1867 252 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
e941759c
ML
253 INIT_LIST_HEAD(&cb->node);
254 return -ENOENT;
255 }
256
257 spin_lock_irqsave(fence->lock, flags);
258
f54d1867
CW
259 was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
260 &fence->flags);
e941759c 261
f54d1867 262 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
e941759c
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263 ret = -ENOENT;
264 else if (!was_set) {
f54d1867 265 trace_dma_fence_enable_signal(fence);
e941759c
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266
267 if (!fence->ops->enable_signaling(fence)) {
f54d1867 268 dma_fence_signal_locked(fence);
e941759c
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269 ret = -ENOENT;
270 }
271 }
272
273 if (!ret) {
274 cb->func = func;
275 list_add_tail(&cb->node, &fence->cb_list);
276 } else
277 INIT_LIST_HEAD(&cb->node);
278 spin_unlock_irqrestore(fence->lock, flags);
279
280 return ret;
281}
f54d1867 282EXPORT_SYMBOL(dma_fence_add_callback);
e941759c
ML
283
284/**
f54d1867 285 * dma_fence_remove_callback - remove a callback from the signaling list
e941759c
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286 * @fence: [in] the fence to wait on
287 * @cb: [in] the callback to remove
288 *
289 * Remove a previously queued callback from the fence. This function returns
f353d71f 290 * true if the callback is successfully removed, or false if the fence has
e941759c
ML
291 * already been signaled.
292 *
293 * *WARNING*:
294 * Cancelling a callback should only be done if you really know what you're
295 * doing, since deadlocks and race conditions could occur all too easily. For
296 * this reason, it should only ever be done on hardware lockup recovery,
297 * with a reference held to the fence.
298 */
299bool
f54d1867 300dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb)
e941759c
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301{
302 unsigned long flags;
303 bool ret;
304
305 spin_lock_irqsave(fence->lock, flags);
306
307 ret = !list_empty(&cb->node);
308 if (ret)
309 list_del_init(&cb->node);
310
311 spin_unlock_irqrestore(fence->lock, flags);
312
313 return ret;
314}
f54d1867 315EXPORT_SYMBOL(dma_fence_remove_callback);
e941759c
ML
316
317struct default_wait_cb {
f54d1867 318 struct dma_fence_cb base;
e941759c
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319 struct task_struct *task;
320};
321
322static void
f54d1867 323dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
e941759c
ML
324{
325 struct default_wait_cb *wait =
326 container_of(cb, struct default_wait_cb, base);
327
328 wake_up_state(wait->task, TASK_NORMAL);
329}
330
331/**
f54d1867 332 * dma_fence_default_wait - default sleep until the fence gets signaled
e941759c
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333 * or until timeout elapses
334 * @fence: [in] the fence to wait on
335 * @intr: [in] if true, do an interruptible wait
336 * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
337 *
338 * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
bcc004b6
AD
339 * remaining timeout in jiffies on success. If timeout is zero the value one is
340 * returned if the fence is already signaled for consistency with other
341 * functions taking a jiffies timeout.
e941759c
ML
342 */
343signed long
f54d1867 344dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
e941759c
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345{
346 struct default_wait_cb cb;
347 unsigned long flags;
bcc004b6 348 signed long ret = timeout ? timeout : 1;
e941759c
ML
349 bool was_set;
350
f54d1867 351 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
bcc004b6 352 return ret;
e941759c
ML
353
354 spin_lock_irqsave(fence->lock, flags);
355
356 if (intr && signal_pending(current)) {
357 ret = -ERESTARTSYS;
358 goto out;
359 }
360
f54d1867
CW
361 was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
362 &fence->flags);
e941759c 363
f54d1867 364 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
e941759c
ML
365 goto out;
366
367 if (!was_set) {
f54d1867 368 trace_dma_fence_enable_signal(fence);
e941759c
ML
369
370 if (!fence->ops->enable_signaling(fence)) {
f54d1867 371 dma_fence_signal_locked(fence);
e941759c
ML
372 goto out;
373 }
374 }
375
080f7feb
AR
376 if (!timeout) {
377 ret = 0;
378 goto out;
379 }
380
f54d1867 381 cb.base.func = dma_fence_default_wait_cb;
e941759c
ML
382 cb.task = current;
383 list_add(&cb.base.node, &fence->cb_list);
384
f54d1867 385 while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) {
e941759c
ML
386 if (intr)
387 __set_current_state(TASK_INTERRUPTIBLE);
388 else
389 __set_current_state(TASK_UNINTERRUPTIBLE);
390 spin_unlock_irqrestore(fence->lock, flags);
391
392 ret = schedule_timeout(ret);
393
394 spin_lock_irqsave(fence->lock, flags);
395 if (ret > 0 && intr && signal_pending(current))
396 ret = -ERESTARTSYS;
397 }
398
399 if (!list_empty(&cb.base.node))
400 list_del(&cb.base.node);
401 __set_current_state(TASK_RUNNING);
402
403out:
404 spin_unlock_irqrestore(fence->lock, flags);
405 return ret;
406}
f54d1867 407EXPORT_SYMBOL(dma_fence_default_wait);
e941759c 408
a519435a 409static bool
7392b4bb 410dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
411 uint32_t *idx)
a519435a
CK
412{
413 int i;
414
415 for (i = 0; i < count; ++i) {
f54d1867 416 struct dma_fence *fence = fences[i];
7392b4bb 417 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
418 if (idx)
419 *idx = i;
a519435a 420 return true;
7392b4bb 421 }
a519435a
CK
422 }
423 return false;
424}
425
426/**
f54d1867 427 * dma_fence_wait_any_timeout - sleep until any fence gets signaled
a519435a
CK
428 * or until timeout elapses
429 * @fences: [in] array of fences to wait on
430 * @count: [in] number of fences to wait on
431 * @intr: [in] if true, do an interruptible wait
432 * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
7392b4bb 433 * @idx: [out] the first signaled fence index, meaningful only on
434 * positive return
a519435a
CK
435 *
436 * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
437 * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
438 * on success.
439 *
440 * Synchronous waits for the first fence in the array to be signaled. The
441 * caller needs to hold a reference to all fences in the array, otherwise a
442 * fence might be freed before return, resulting in undefined behavior.
443 */
444signed long
f54d1867 445dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
7392b4bb 446 bool intr, signed long timeout, uint32_t *idx)
a519435a
CK
447{
448 struct default_wait_cb *cb;
449 signed long ret = timeout;
450 unsigned i;
451
452 if (WARN_ON(!fences || !count || timeout < 0))
453 return -EINVAL;
454
455 if (timeout == 0) {
456 for (i = 0; i < count; ++i)
7392b4bb 457 if (dma_fence_is_signaled(fences[i])) {
458 if (idx)
459 *idx = i;
a519435a 460 return 1;
7392b4bb 461 }
a519435a
CK
462
463 return 0;
464 }
465
466 cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
467 if (cb == NULL) {
468 ret = -ENOMEM;
469 goto err_free_cb;
470 }
471
472 for (i = 0; i < count; ++i) {
f54d1867 473 struct dma_fence *fence = fences[i];
a519435a 474
f54d1867 475 if (fence->ops->wait != dma_fence_default_wait) {
a519435a
CK
476 ret = -EINVAL;
477 goto fence_rm_cb;
478 }
479
480 cb[i].task = current;
f54d1867
CW
481 if (dma_fence_add_callback(fence, &cb[i].base,
482 dma_fence_default_wait_cb)) {
a519435a 483 /* This fence is already signaled */
7392b4bb 484 if (idx)
485 *idx = i;
a519435a
CK
486 goto fence_rm_cb;
487 }
488 }
489
490 while (ret > 0) {
491 if (intr)
492 set_current_state(TASK_INTERRUPTIBLE);
493 else
494 set_current_state(TASK_UNINTERRUPTIBLE);
495
7392b4bb 496 if (dma_fence_test_signaled_any(fences, count, idx))
a519435a
CK
497 break;
498
499 ret = schedule_timeout(ret);
500
501 if (ret > 0 && intr && signal_pending(current))
502 ret = -ERESTARTSYS;
503 }
504
505 __set_current_state(TASK_RUNNING);
506
507fence_rm_cb:
508 while (i-- > 0)
f54d1867 509 dma_fence_remove_callback(fences[i], &cb[i].base);
a519435a
CK
510
511err_free_cb:
512 kfree(cb);
513
514 return ret;
515}
f54d1867 516EXPORT_SYMBOL(dma_fence_wait_any_timeout);
a519435a 517
e941759c 518/**
f54d1867 519 * dma_fence_init - Initialize a custom fence.
e941759c 520 * @fence: [in] the fence to initialize
f54d1867 521 * @ops: [in] the dma_fence_ops for operations on this fence
e941759c
ML
522 * @lock: [in] the irqsafe spinlock to use for locking this fence
523 * @context: [in] the execution context this fence is run on
524 * @seqno: [in] a linear increasing sequence number for this context
525 *
526 * Initializes an allocated fence, the caller doesn't have to keep its
527 * refcount after committing with this fence, but it will need to hold a
f54d1867 528 * refcount again if dma_fence_ops.enable_signaling gets called. This can
e941759c
ML
529 * be used for other implementing other types of fence.
530 *
531 * context and seqno are used for easy comparison between fences, allowing
f54d1867 532 * to check which fence is later by simply using dma_fence_later.
e941759c
ML
533 */
534void
f54d1867
CW
535dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
536 spinlock_t *lock, u64 context, unsigned seqno)
e941759c
ML
537{
538 BUG_ON(!lock);
539 BUG_ON(!ops || !ops->wait || !ops->enable_signaling ||
540 !ops->get_driver_name || !ops->get_timeline_name);
541
542 kref_init(&fence->refcount);
543 fence->ops = ops;
544 INIT_LIST_HEAD(&fence->cb_list);
545 fence->lock = lock;
546 fence->context = context;
547 fence->seqno = seqno;
548 fence->flags = 0UL;
549
f54d1867 550 trace_dma_fence_init(fence);
e941759c 551}
f54d1867 552EXPORT_SYMBOL(dma_fence_init);