]>
Commit | Line | Data |
---|---|---|
e941759c ML |
1 | /* |
2 | * Fence mechanism for dma-buf and to allow for asynchronous dma access | |
3 | * | |
4 | * Copyright (C) 2012 Canonical Ltd | |
5 | * Copyright (C) 2012 Texas Instruments | |
6 | * | |
7 | * Authors: | |
8 | * Rob Clark <robdclark@gmail.com> | |
9 | * Maarten Lankhorst <maarten.lankhorst@canonical.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License version 2 as published by | |
13 | * the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 | * more details. | |
19 | */ | |
20 | ||
21 | #include <linux/slab.h> | |
22 | #include <linux/export.h> | |
23 | #include <linux/atomic.h> | |
f54d1867 | 24 | #include <linux/dma-fence.h> |
e941759c ML |
25 | |
26 | #define CREATE_TRACE_POINTS | |
f54d1867 | 27 | #include <trace/events/dma_fence.h> |
e941759c | 28 | |
f54d1867 CW |
29 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_annotate_wait_on); |
30 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit); | |
8c96c678 | 31 | EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal); |
e941759c | 32 | |
e9f3b796 | 33 | /* |
e941759c ML |
34 | * fence context counter: each execution context should have its own |
35 | * fence context, this allows checking if fences belong to the same | |
36 | * context or not. One device can have multiple separate contexts, | |
37 | * and they're used if some engine can run independently of another. | |
38 | */ | |
f54d1867 | 39 | static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0); |
e941759c ML |
40 | |
41 | /** | |
f54d1867 | 42 | * dma_fence_context_alloc - allocate an array of fence contexts |
e941759c ML |
43 | * @num: [in] amount of contexts to allocate |
44 | * | |
45 | * This function will return the first index of the number of fences allocated. | |
46 | * The fence context is used for setting fence->context to a unique number. | |
47 | */ | |
f54d1867 | 48 | u64 dma_fence_context_alloc(unsigned num) |
e941759c ML |
49 | { |
50 | BUG_ON(!num); | |
f54d1867 | 51 | return atomic64_add_return(num, &dma_fence_context_counter) - num; |
e941759c | 52 | } |
f54d1867 | 53 | EXPORT_SYMBOL(dma_fence_context_alloc); |
e941759c ML |
54 | |
55 | /** | |
f54d1867 | 56 | * dma_fence_signal_locked - signal completion of a fence |
e941759c ML |
57 | * @fence: the fence to signal |
58 | * | |
59 | * Signal completion for software callbacks on a fence, this will unblock | |
f54d1867 CW |
60 | * dma_fence_wait() calls and run all the callbacks added with |
61 | * dma_fence_add_callback(). Can be called multiple times, but since a fence | |
e941759c ML |
62 | * can only go from unsignaled to signaled state, it will only be effective |
63 | * the first time. | |
64 | * | |
f54d1867 | 65 | * Unlike dma_fence_signal, this function must be called with fence->lock held. |
e941759c | 66 | */ |
f54d1867 | 67 | int dma_fence_signal_locked(struct dma_fence *fence) |
e941759c | 68 | { |
f54d1867 | 69 | struct dma_fence_cb *cur, *tmp; |
e941759c ML |
70 | int ret = 0; |
71 | ||
78010cd9 RC |
72 | lockdep_assert_held(fence->lock); |
73 | ||
e941759c ML |
74 | if (WARN_ON(!fence)) |
75 | return -EINVAL; | |
76 | ||
77 | if (!ktime_to_ns(fence->timestamp)) { | |
78 | fence->timestamp = ktime_get(); | |
79 | smp_mb__before_atomic(); | |
80 | } | |
81 | ||
f54d1867 | 82 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
e941759c ML |
83 | ret = -EINVAL; |
84 | ||
85 | /* | |
f54d1867 | 86 | * we might have raced with the unlocked dma_fence_signal, |
e941759c ML |
87 | * still run through all callbacks |
88 | */ | |
89 | } else | |
f54d1867 | 90 | trace_dma_fence_signaled(fence); |
e941759c ML |
91 | |
92 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { | |
93 | list_del_init(&cur->node); | |
94 | cur->func(fence, cur); | |
95 | } | |
96 | return ret; | |
97 | } | |
f54d1867 | 98 | EXPORT_SYMBOL(dma_fence_signal_locked); |
e941759c ML |
99 | |
100 | /** | |
f54d1867 | 101 | * dma_fence_signal - signal completion of a fence |
e941759c ML |
102 | * @fence: the fence to signal |
103 | * | |
104 | * Signal completion for software callbacks on a fence, this will unblock | |
f54d1867 CW |
105 | * dma_fence_wait() calls and run all the callbacks added with |
106 | * dma_fence_add_callback(). Can be called multiple times, but since a fence | |
e941759c ML |
107 | * can only go from unsignaled to signaled state, it will only be effective |
108 | * the first time. | |
109 | */ | |
f54d1867 | 110 | int dma_fence_signal(struct dma_fence *fence) |
e941759c ML |
111 | { |
112 | unsigned long flags; | |
113 | ||
114 | if (!fence) | |
115 | return -EINVAL; | |
116 | ||
117 | if (!ktime_to_ns(fence->timestamp)) { | |
118 | fence->timestamp = ktime_get(); | |
119 | smp_mb__before_atomic(); | |
120 | } | |
121 | ||
f54d1867 | 122 | if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
123 | return -EINVAL; |
124 | ||
f54d1867 | 125 | trace_dma_fence_signaled(fence); |
e941759c | 126 | |
f54d1867 CW |
127 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) { |
128 | struct dma_fence_cb *cur, *tmp; | |
e941759c ML |
129 | |
130 | spin_lock_irqsave(fence->lock, flags); | |
131 | list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) { | |
132 | list_del_init(&cur->node); | |
133 | cur->func(fence, cur); | |
134 | } | |
135 | spin_unlock_irqrestore(fence->lock, flags); | |
136 | } | |
137 | return 0; | |
138 | } | |
f54d1867 | 139 | EXPORT_SYMBOL(dma_fence_signal); |
e941759c ML |
140 | |
141 | /** | |
f54d1867 | 142 | * dma_fence_wait_timeout - sleep until the fence gets signaled |
e941759c ML |
143 | * or until timeout elapses |
144 | * @fence: [in] the fence to wait on | |
145 | * @intr: [in] if true, do an interruptible wait | |
146 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
147 | * | |
148 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the | |
149 | * remaining timeout in jiffies on success. Other error values may be | |
150 | * returned on custom implementations. | |
151 | * | |
152 | * Performs a synchronous wait on this fence. It is assumed the caller | |
153 | * directly or indirectly (buf-mgr between reservation and committing) | |
154 | * holds a reference to the fence, otherwise the fence might be | |
155 | * freed before return, resulting in undefined behavior. | |
156 | */ | |
157 | signed long | |
f54d1867 | 158 | dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) |
e941759c ML |
159 | { |
160 | signed long ret; | |
161 | ||
162 | if (WARN_ON(timeout < 0)) | |
163 | return -EINVAL; | |
164 | ||
f54d1867 | 165 | trace_dma_fence_wait_start(fence); |
e941759c | 166 | ret = fence->ops->wait(fence, intr, timeout); |
f54d1867 | 167 | trace_dma_fence_wait_end(fence); |
e941759c ML |
168 | return ret; |
169 | } | |
f54d1867 | 170 | EXPORT_SYMBOL(dma_fence_wait_timeout); |
e941759c | 171 | |
f54d1867 | 172 | void dma_fence_release(struct kref *kref) |
e941759c | 173 | { |
f54d1867 CW |
174 | struct dma_fence *fence = |
175 | container_of(kref, struct dma_fence, refcount); | |
e941759c | 176 | |
f54d1867 | 177 | trace_dma_fence_destroy(fence); |
e941759c ML |
178 | |
179 | BUG_ON(!list_empty(&fence->cb_list)); | |
180 | ||
181 | if (fence->ops->release) | |
182 | fence->ops->release(fence); | |
183 | else | |
f54d1867 | 184 | dma_fence_free(fence); |
e941759c | 185 | } |
f54d1867 | 186 | EXPORT_SYMBOL(dma_fence_release); |
e941759c | 187 | |
f54d1867 | 188 | void dma_fence_free(struct dma_fence *fence) |
e941759c | 189 | { |
3c3b177a | 190 | kfree_rcu(fence, rcu); |
e941759c | 191 | } |
f54d1867 | 192 | EXPORT_SYMBOL(dma_fence_free); |
e941759c ML |
193 | |
194 | /** | |
f54d1867 | 195 | * dma_fence_enable_sw_signaling - enable signaling on fence |
e941759c ML |
196 | * @fence: [in] the fence to enable |
197 | * | |
198 | * this will request for sw signaling to be enabled, to make the fence | |
199 | * complete as soon as possible | |
200 | */ | |
f54d1867 | 201 | void dma_fence_enable_sw_signaling(struct dma_fence *fence) |
e941759c ML |
202 | { |
203 | unsigned long flags; | |
204 | ||
f54d1867 CW |
205 | if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
206 | &fence->flags) && | |
207 | !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { | |
208 | trace_dma_fence_enable_signal(fence); | |
e941759c ML |
209 | |
210 | spin_lock_irqsave(fence->lock, flags); | |
211 | ||
212 | if (!fence->ops->enable_signaling(fence)) | |
f54d1867 | 213 | dma_fence_signal_locked(fence); |
e941759c ML |
214 | |
215 | spin_unlock_irqrestore(fence->lock, flags); | |
216 | } | |
217 | } | |
f54d1867 | 218 | EXPORT_SYMBOL(dma_fence_enable_sw_signaling); |
e941759c ML |
219 | |
220 | /** | |
f54d1867 | 221 | * dma_fence_add_callback - add a callback to be called when the fence |
e941759c ML |
222 | * is signaled |
223 | * @fence: [in] the fence to wait on | |
224 | * @cb: [in] the callback to register | |
225 | * @func: [in] the function to call | |
226 | * | |
f54d1867 | 227 | * cb will be initialized by dma_fence_add_callback, no initialization |
e941759c ML |
228 | * by the caller is required. Any number of callbacks can be registered |
229 | * to a fence, but a callback can only be registered to one fence at a time. | |
230 | * | |
231 | * Note that the callback can be called from an atomic context. If | |
232 | * fence is already signaled, this function will return -ENOENT (and | |
233 | * *not* call the callback) | |
234 | * | |
235 | * Add a software callback to the fence. Same restrictions apply to | |
f54d1867 | 236 | * refcount as it does to dma_fence_wait, however the caller doesn't need to |
e941759c ML |
237 | * keep a refcount to fence afterwards: when software access is enabled, |
238 | * the creator of the fence is required to keep the fence alive until | |
f54d1867 | 239 | * after it signals with dma_fence_signal. The callback itself can be called |
e941759c ML |
240 | * from irq context. |
241 | * | |
242 | */ | |
f54d1867 CW |
243 | int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, |
244 | dma_fence_func_t func) | |
e941759c ML |
245 | { |
246 | unsigned long flags; | |
247 | int ret = 0; | |
248 | bool was_set; | |
249 | ||
250 | if (WARN_ON(!fence || !func)) | |
251 | return -EINVAL; | |
252 | ||
f54d1867 | 253 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
e941759c ML |
254 | INIT_LIST_HEAD(&cb->node); |
255 | return -ENOENT; | |
256 | } | |
257 | ||
258 | spin_lock_irqsave(fence->lock, flags); | |
259 | ||
f54d1867 CW |
260 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
261 | &fence->flags); | |
e941759c | 262 | |
f54d1867 | 263 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
264 | ret = -ENOENT; |
265 | else if (!was_set) { | |
f54d1867 | 266 | trace_dma_fence_enable_signal(fence); |
e941759c ML |
267 | |
268 | if (!fence->ops->enable_signaling(fence)) { | |
f54d1867 | 269 | dma_fence_signal_locked(fence); |
e941759c ML |
270 | ret = -ENOENT; |
271 | } | |
272 | } | |
273 | ||
274 | if (!ret) { | |
275 | cb->func = func; | |
276 | list_add_tail(&cb->node, &fence->cb_list); | |
277 | } else | |
278 | INIT_LIST_HEAD(&cb->node); | |
279 | spin_unlock_irqrestore(fence->lock, flags); | |
280 | ||
281 | return ret; | |
282 | } | |
f54d1867 | 283 | EXPORT_SYMBOL(dma_fence_add_callback); |
e941759c | 284 | |
d6c99f4b CW |
285 | /** |
286 | * dma_fence_get_status - returns the status upon completion | |
287 | * @fence: [in] the dma_fence to query | |
288 | * | |
289 | * This wraps dma_fence_get_status_locked() to return the error status | |
290 | * condition on a signaled fence. See dma_fence_get_status_locked() for more | |
291 | * details. | |
292 | * | |
293 | * Returns 0 if the fence has not yet been signaled, 1 if the fence has | |
294 | * been signaled without an error condition, or a negative error code | |
295 | * if the fence has been completed in err. | |
296 | */ | |
297 | int dma_fence_get_status(struct dma_fence *fence) | |
298 | { | |
299 | unsigned long flags; | |
300 | int status; | |
301 | ||
302 | spin_lock_irqsave(fence->lock, flags); | |
303 | status = dma_fence_get_status_locked(fence); | |
304 | spin_unlock_irqrestore(fence->lock, flags); | |
305 | ||
306 | return status; | |
307 | } | |
308 | EXPORT_SYMBOL(dma_fence_get_status); | |
309 | ||
e941759c | 310 | /** |
f54d1867 | 311 | * dma_fence_remove_callback - remove a callback from the signaling list |
e941759c ML |
312 | * @fence: [in] the fence to wait on |
313 | * @cb: [in] the callback to remove | |
314 | * | |
315 | * Remove a previously queued callback from the fence. This function returns | |
f353d71f | 316 | * true if the callback is successfully removed, or false if the fence has |
e941759c ML |
317 | * already been signaled. |
318 | * | |
319 | * *WARNING*: | |
320 | * Cancelling a callback should only be done if you really know what you're | |
321 | * doing, since deadlocks and race conditions could occur all too easily. For | |
322 | * this reason, it should only ever be done on hardware lockup recovery, | |
323 | * with a reference held to the fence. | |
324 | */ | |
325 | bool | |
f54d1867 | 326 | dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb) |
e941759c ML |
327 | { |
328 | unsigned long flags; | |
329 | bool ret; | |
330 | ||
331 | spin_lock_irqsave(fence->lock, flags); | |
332 | ||
333 | ret = !list_empty(&cb->node); | |
334 | if (ret) | |
335 | list_del_init(&cb->node); | |
336 | ||
337 | spin_unlock_irqrestore(fence->lock, flags); | |
338 | ||
339 | return ret; | |
340 | } | |
f54d1867 | 341 | EXPORT_SYMBOL(dma_fence_remove_callback); |
e941759c ML |
342 | |
343 | struct default_wait_cb { | |
f54d1867 | 344 | struct dma_fence_cb base; |
e941759c ML |
345 | struct task_struct *task; |
346 | }; | |
347 | ||
348 | static void | |
f54d1867 | 349 | dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb) |
e941759c ML |
350 | { |
351 | struct default_wait_cb *wait = | |
352 | container_of(cb, struct default_wait_cb, base); | |
353 | ||
354 | wake_up_state(wait->task, TASK_NORMAL); | |
355 | } | |
356 | ||
357 | /** | |
f54d1867 | 358 | * dma_fence_default_wait - default sleep until the fence gets signaled |
e941759c ML |
359 | * or until timeout elapses |
360 | * @fence: [in] the fence to wait on | |
361 | * @intr: [in] if true, do an interruptible wait | |
362 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
363 | * | |
364 | * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the | |
bcc004b6 AD |
365 | * remaining timeout in jiffies on success. If timeout is zero the value one is |
366 | * returned if the fence is already signaled for consistency with other | |
367 | * functions taking a jiffies timeout. | |
e941759c ML |
368 | */ |
369 | signed long | |
f54d1867 | 370 | dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) |
e941759c ML |
371 | { |
372 | struct default_wait_cb cb; | |
373 | unsigned long flags; | |
bcc004b6 | 374 | signed long ret = timeout ? timeout : 1; |
e941759c ML |
375 | bool was_set; |
376 | ||
f54d1867 | 377 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
bcc004b6 | 378 | return ret; |
e941759c ML |
379 | |
380 | spin_lock_irqsave(fence->lock, flags); | |
381 | ||
382 | if (intr && signal_pending(current)) { | |
383 | ret = -ERESTARTSYS; | |
384 | goto out; | |
385 | } | |
386 | ||
f54d1867 CW |
387 | was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, |
388 | &fence->flags); | |
e941759c | 389 | |
f54d1867 | 390 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) |
e941759c ML |
391 | goto out; |
392 | ||
393 | if (!was_set) { | |
f54d1867 | 394 | trace_dma_fence_enable_signal(fence); |
e941759c ML |
395 | |
396 | if (!fence->ops->enable_signaling(fence)) { | |
f54d1867 | 397 | dma_fence_signal_locked(fence); |
e941759c ML |
398 | goto out; |
399 | } | |
400 | } | |
401 | ||
f54d1867 | 402 | cb.base.func = dma_fence_default_wait_cb; |
e941759c ML |
403 | cb.task = current; |
404 | list_add(&cb.base.node, &fence->cb_list); | |
405 | ||
f54d1867 | 406 | while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) { |
e941759c ML |
407 | if (intr) |
408 | __set_current_state(TASK_INTERRUPTIBLE); | |
409 | else | |
410 | __set_current_state(TASK_UNINTERRUPTIBLE); | |
411 | spin_unlock_irqrestore(fence->lock, flags); | |
412 | ||
413 | ret = schedule_timeout(ret); | |
414 | ||
415 | spin_lock_irqsave(fence->lock, flags); | |
416 | if (ret > 0 && intr && signal_pending(current)) | |
417 | ret = -ERESTARTSYS; | |
418 | } | |
419 | ||
420 | if (!list_empty(&cb.base.node)) | |
421 | list_del(&cb.base.node); | |
422 | __set_current_state(TASK_RUNNING); | |
423 | ||
424 | out: | |
425 | spin_unlock_irqrestore(fence->lock, flags); | |
426 | return ret; | |
427 | } | |
f54d1867 | 428 | EXPORT_SYMBOL(dma_fence_default_wait); |
e941759c | 429 | |
a519435a | 430 | static bool |
7392b4bb | 431 | dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count, |
432 | uint32_t *idx) | |
a519435a CK |
433 | { |
434 | int i; | |
435 | ||
436 | for (i = 0; i < count; ++i) { | |
f54d1867 | 437 | struct dma_fence *fence = fences[i]; |
7392b4bb | 438 | if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) { |
439 | if (idx) | |
440 | *idx = i; | |
a519435a | 441 | return true; |
7392b4bb | 442 | } |
a519435a CK |
443 | } |
444 | return false; | |
445 | } | |
446 | ||
447 | /** | |
f54d1867 | 448 | * dma_fence_wait_any_timeout - sleep until any fence gets signaled |
a519435a CK |
449 | * or until timeout elapses |
450 | * @fences: [in] array of fences to wait on | |
451 | * @count: [in] number of fences to wait on | |
452 | * @intr: [in] if true, do an interruptible wait | |
453 | * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT | |
7392b4bb | 454 | * @idx: [out] the first signaled fence index, meaningful only on |
455 | * positive return | |
a519435a CK |
456 | * |
457 | * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if | |
458 | * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies | |
459 | * on success. | |
460 | * | |
461 | * Synchronous waits for the first fence in the array to be signaled. The | |
462 | * caller needs to hold a reference to all fences in the array, otherwise a | |
463 | * fence might be freed before return, resulting in undefined behavior. | |
464 | */ | |
465 | signed long | |
f54d1867 | 466 | dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, |
7392b4bb | 467 | bool intr, signed long timeout, uint32_t *idx) |
a519435a CK |
468 | { |
469 | struct default_wait_cb *cb; | |
470 | signed long ret = timeout; | |
471 | unsigned i; | |
472 | ||
473 | if (WARN_ON(!fences || !count || timeout < 0)) | |
474 | return -EINVAL; | |
475 | ||
476 | if (timeout == 0) { | |
477 | for (i = 0; i < count; ++i) | |
7392b4bb | 478 | if (dma_fence_is_signaled(fences[i])) { |
479 | if (idx) | |
480 | *idx = i; | |
a519435a | 481 | return 1; |
7392b4bb | 482 | } |
a519435a CK |
483 | |
484 | return 0; | |
485 | } | |
486 | ||
487 | cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL); | |
488 | if (cb == NULL) { | |
489 | ret = -ENOMEM; | |
490 | goto err_free_cb; | |
491 | } | |
492 | ||
493 | for (i = 0; i < count; ++i) { | |
f54d1867 | 494 | struct dma_fence *fence = fences[i]; |
a519435a | 495 | |
f54d1867 | 496 | if (fence->ops->wait != dma_fence_default_wait) { |
a519435a CK |
497 | ret = -EINVAL; |
498 | goto fence_rm_cb; | |
499 | } | |
500 | ||
501 | cb[i].task = current; | |
f54d1867 CW |
502 | if (dma_fence_add_callback(fence, &cb[i].base, |
503 | dma_fence_default_wait_cb)) { | |
a519435a | 504 | /* This fence is already signaled */ |
7392b4bb | 505 | if (idx) |
506 | *idx = i; | |
a519435a CK |
507 | goto fence_rm_cb; |
508 | } | |
509 | } | |
510 | ||
511 | while (ret > 0) { | |
512 | if (intr) | |
513 | set_current_state(TASK_INTERRUPTIBLE); | |
514 | else | |
515 | set_current_state(TASK_UNINTERRUPTIBLE); | |
516 | ||
7392b4bb | 517 | if (dma_fence_test_signaled_any(fences, count, idx)) |
a519435a CK |
518 | break; |
519 | ||
520 | ret = schedule_timeout(ret); | |
521 | ||
522 | if (ret > 0 && intr && signal_pending(current)) | |
523 | ret = -ERESTARTSYS; | |
524 | } | |
525 | ||
526 | __set_current_state(TASK_RUNNING); | |
527 | ||
528 | fence_rm_cb: | |
529 | while (i-- > 0) | |
f54d1867 | 530 | dma_fence_remove_callback(fences[i], &cb[i].base); |
a519435a CK |
531 | |
532 | err_free_cb: | |
533 | kfree(cb); | |
534 | ||
535 | return ret; | |
536 | } | |
f54d1867 | 537 | EXPORT_SYMBOL(dma_fence_wait_any_timeout); |
a519435a | 538 | |
e941759c | 539 | /** |
f54d1867 | 540 | * dma_fence_init - Initialize a custom fence. |
e941759c | 541 | * @fence: [in] the fence to initialize |
f54d1867 | 542 | * @ops: [in] the dma_fence_ops for operations on this fence |
e941759c ML |
543 | * @lock: [in] the irqsafe spinlock to use for locking this fence |
544 | * @context: [in] the execution context this fence is run on | |
545 | * @seqno: [in] a linear increasing sequence number for this context | |
546 | * | |
547 | * Initializes an allocated fence, the caller doesn't have to keep its | |
548 | * refcount after committing with this fence, but it will need to hold a | |
f54d1867 | 549 | * refcount again if dma_fence_ops.enable_signaling gets called. This can |
e941759c ML |
550 | * be used for other implementing other types of fence. |
551 | * | |
552 | * context and seqno are used for easy comparison between fences, allowing | |
f54d1867 | 553 | * to check which fence is later by simply using dma_fence_later. |
e941759c ML |
554 | */ |
555 | void | |
f54d1867 CW |
556 | dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, |
557 | spinlock_t *lock, u64 context, unsigned seqno) | |
e941759c ML |
558 | { |
559 | BUG_ON(!lock); | |
560 | BUG_ON(!ops || !ops->wait || !ops->enable_signaling || | |
561 | !ops->get_driver_name || !ops->get_timeline_name); | |
562 | ||
563 | kref_init(&fence->refcount); | |
564 | fence->ops = ops; | |
565 | INIT_LIST_HEAD(&fence->cb_list); | |
566 | fence->lock = lock; | |
567 | fence->context = context; | |
568 | fence->seqno = seqno; | |
569 | fence->flags = 0UL; | |
a009e975 | 570 | fence->error = 0; |
e941759c | 571 | |
f54d1867 | 572 | trace_dma_fence_init(fence); |
e941759c | 573 | } |
f54d1867 | 574 | EXPORT_SYMBOL(dma_fence_init); |