projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| da9bb1d2 AC |
1 | # |
| 2 | # EDAC Kconfig | |
| 3 | # Copyright (c) 2003 Linux Networx | |
| 4 | # Licensed and distributed under the GPL | |
| 5 | # | |
| da9bb1d2 | 6 | |
| 751cb5e5 | 7 | menuconfig EDAC |
| b113a3f7 | 8 | bool "EDAC - error detection and reporting (EXPERIMENTAL)" |
| e25df120 | 9 | depends on HAS_IOMEM |
| b113a3f7 | 10 | depends on EXPERIMENTAL |
| 4c6a1c13 | 11 | depends on X86 || PPC |
| da9bb1d2 AC |
12 | help |
| 13 | EDAC is designed to report errors in the core system. | |
| 14 | These are low-level errors that are reported in the CPU or | |
| 8cb2a398 DT |
15 | supporting chipset or other subsystems: |
| 16 | memory errors, cache errors, PCI errors, thermal throttling, etc.. | |
| 17 | If unsure, select 'Y'. | |
| da9bb1d2 | 18 | |
| 57c432b5 TS |
19 | If this code is reporting problems on your system, please |
| 20 | see the EDAC project web pages for more information at: | |
| 21 | ||
| 22 | <http://bluesmoke.sourceforge.net/> | |
| 23 | ||
| 24 | and: | |
| 25 | ||
| 26 | <http://buttersideup.com/edacwiki> | |
| 27 | ||
| 28 | There is also a mailing list for the EDAC project, which can | |
| 29 | be found via the sourceforge page. | |
| 30 | ||
| 751cb5e5 | 31 | if EDAC |
| da9bb1d2 AC |
32 | |
| 33 | comment "Reporting subsystems" | |
| da9bb1d2 AC |
34 | |
| 35 | config EDAC_DEBUG | |
| 36 | bool "Debugging" | |
| da9bb1d2 AC |
37 | help |
| 38 | This turns on debugging information for the entire EDAC | |
| 39 | sub-system. You can insert module with "debug_level=x", current | |
| 40 | there're four debug levels (x=0,1,2,3 from low to high). | |
| 41 | Usually you should select 'N'. | |
| 42 | ||
| 43 | config EDAC_MM_EDAC | |
| 44 | tristate "Main Memory EDAC (Error Detection And Correction) reporting" | |
| da9bb1d2 AC |
45 | default y |
| 46 | help | |
| 47 | Some systems are able to detect and correct errors in main | |
| 48 | memory. EDAC can report statistics on memory error | |
| 49 | detection and correction (EDAC - or commonly referred to ECC | |
| 50 | errors). EDAC will also try to decode where these errors | |
| 51 | occurred so that a particular failing memory module can be | |
| 52 | replaced. If unsure, select 'Y'. | |
| 53 | ||
| 54 | ||
| 55 | config EDAC_AMD76X | |
| 56 | tristate "AMD 76x (760, 762, 768)" | |
| 90cbc45b | 57 | depends on EDAC_MM_EDAC && PCI && X86_32 |
| da9bb1d2 AC |
58 | help |
| 59 | Support for error detection and correction on the AMD 76x | |
| 60 | series of chipsets used with the Athlon processor. | |
| 61 | ||
| 62 | config EDAC_E7XXX | |
| 63 | tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | |
| 39f1d8d3 | 64 | depends on EDAC_MM_EDAC && PCI && X86_32 |
| da9bb1d2 AC |
65 | help |
| 66 | Support for error detection and correction on the Intel | |
| 67 | E7205, E7500, E7501 and E7505 server chipsets. | |
| 68 | ||
| 69 | config EDAC_E752X | |
| 70 | tristate "Intel e752x (e7520, e7525, e7320)" | |
| da960a6a | 71 | depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG |
| da9bb1d2 AC |
72 | help |
| 73 | Support for error detection and correction on the Intel | |
| 74 | E7520, E7525, E7320 server chipsets. | |
| 75 | ||
| 5a2c675c TS |
76 | config EDAC_I82443BXGX |
| 77 | tristate "Intel 82443BX/GX (440BX/GX)" | |
| 78 | depends on EDAC_MM_EDAC && PCI && X86_32 | |
| 28f96eea | 79 | depends on BROKEN |
| 5a2c675c TS |
80 | help |
| 81 | Support for error detection and correction on the Intel | |
| 82 | 82443BX/GX memory controllers (440BX/GX chipsets). | |
| 83 | ||
| da9bb1d2 AC |
84 | config EDAC_I82875P |
| 85 | tristate "Intel 82875p (D82875P, E7210)" | |
| 39f1d8d3 | 86 | depends on EDAC_MM_EDAC && PCI && X86_32 |
| da9bb1d2 AC |
87 | help |
| 88 | Support for error detection and correction on the Intel | |
| 89 | DP82785P and E7210 server chipsets. | |
| 90 | ||
| 420390f0 RD |
91 | config EDAC_I82975X |
| 92 | tristate "Intel 82975x (D82975x)" | |
| 93 | depends on EDAC_MM_EDAC && PCI && X86 | |
| 94 | help | |
| 95 | Support for error detection and correction on the Intel | |
| 96 | DP82975x server chipsets. | |
| 97 | ||
| 535c6a53 JU |
98 | config EDAC_I3000 |
| 99 | tristate "Intel 3000/3010" | |
| 100 | depends on EDAC_MM_EDAC && PCI && X86_32 | |
| 101 | help | |
| 102 | Support for error detection and correction on the Intel | |
| 103 | 3000 and 3010 server chipsets. | |
| 104 | ||
| da9bb1d2 AC |
105 | config EDAC_I82860 |
| 106 | tristate "Intel 82860" | |
| 39f1d8d3 | 107 | depends on EDAC_MM_EDAC && PCI && X86_32 |
| da9bb1d2 AC |
108 | help |
| 109 | Support for error detection and correction on the Intel | |
| 110 | 82860 chipset. | |
| 111 | ||
| 112 | config EDAC_R82600 | |
| 113 | tristate "Radisys 82600 embedded chipset" | |
| 39f1d8d3 | 114 | depends on EDAC_MM_EDAC && PCI && X86_32 |
| da9bb1d2 AC |
115 | help |
| 116 | Support for error detection and correction on the Radisys | |
| 117 | 82600 embedded chipset. | |
| 118 | ||
| eb60705a EW |
119 | config EDAC_I5000 |
| 120 | tristate "Intel Greencreek/Blackford chipset" | |
| 121 | depends on EDAC_MM_EDAC && X86 && PCI | |
| 122 | help | |
| 123 | Support for error detection and correction the Intel | |
| 124 | Greekcreek/Blackford chipsets. | |
| 125 | ||
| 7d8536fb EM |
126 | config EDAC_PASEMI |
| 127 | tristate "PA Semi PWRficient" | |
| 128 | depends on EDAC_MM_EDAC && PCI | |
| ddcc3050 | 129 | depends on PPC_PASEMI |
| 7d8536fb EM |
130 | help |
| 131 | Support for error detection and correction on PA Semi | |
| 132 | PWRficient. | |
| 133 | ||
| 48764e41 BH |
134 | config EDAC_CELL |
| 135 | tristate "Cell Broadband Engine memory controller" | |
| 136 | depends on EDAC_MM_EDAC && PPC_CELL_NATIVE | |
| 137 | help | |
| 138 | Support for error detection and correction on the | |
| 139 | Cell Broadband Engine internal memory controller | |
| 140 | on platform without a hypervisor | |
| 7d8536fb | 141 | |
| 751cb5e5 | 142 | endif # EDAC |