[mirror_ubuntu-bionic-kernel.git] / drivers / edac / cell_edac.c

/*
 * Cell MIC driver for ECC counting
 *
 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
 *                <benh@kernel.crashing.org>
 *
 * This file may be distributed under the terms of the
 * GNU General Public License.
 */
#undef DEBUG

#include <linux/edac.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/stop_machine.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/cell-regs.h>

#include "edac_core.h"

struct cell_edac_priv
{
	struct cbe_mic_tm_regs __iomem	*regs;
	int				node;
	int				chanmask;
#ifdef DEBUG
	u64				prev_fir;
#endif
};

static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
{
	struct cell_edac_priv		*priv = mci->pvt_info;
	struct csrow_info		*csrow = &mci->csrows[0];
	unsigned long			address, pfn, offset, syndrome;

	dev_dbg(mci->dev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
		priv->node, chan, ar);

	/* Address decoding is likely a bit bogus, to dbl check */
	address = (ar & 0xffffffffe0000000ul) >> 29;
	if (priv->chanmask == 0x3)
		address = (address << 1) | chan;
	pfn = address >> PAGE_SHIFT;
	offset = address & ~PAGE_MASK;
	syndrome = (ar & 0x000000001fe00000ul) >> 21;

	/* TODO: Decoding of the error address */
	edac_mc_handle_ce(mci, csrow->first_page + pfn, offset,
			  syndrome, 0, chan, "");
}

static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
{
	struct cell_edac_priv		*priv = mci->pvt_info;
	struct csrow_info		*csrow = &mci->csrows[0];
	unsigned long			address, pfn, offset;

	dev_dbg(mci->dev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
		priv->node, chan, ar);

	/* Address decoding is likely a bit bogus, to dbl check */
	address = (ar & 0xffffffffe0000000ul) >> 29;
	if (priv->chanmask == 0x3)
		address = (address << 1) | chan;
	pfn = address >> PAGE_SHIFT;
	offset = address & ~PAGE_MASK;

	/* TODO: Decoding of the error address */
	edac_mc_handle_ue(mci, csrow->first_page + pfn, offset, 0, "");
}

static void cell_edac_check(struct mem_ctl_info *mci)
{
	struct cell_edac_priv		*priv = mci->pvt_info;
	u64				fir, addreg, clear = 0;

	fir = in_be64(&priv->regs->mic_fir);
#ifdef DEBUG
	if (fir != priv->prev_fir) {
		dev_dbg(mci->dev, "fir change : 0x%016lx\n", fir);
		priv->prev_fir = fir;
	}
#endif
	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_SINGLE_0_ERR)) {
		addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
		clear |= CBE_MIC_FIR_ECC_SINGLE_0_RESET;
		cell_edac_count_ce(mci, 0, addreg);
	}
	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_SINGLE_1_ERR)) {
		addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
		clear |= CBE_MIC_FIR_ECC_SINGLE_1_RESET;
		cell_edac_count_ce(mci, 1, addreg);
	}
	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_MULTI_0_ERR)) {
		addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
		clear |= CBE_MIC_FIR_ECC_MULTI_0_RESET;
		cell_edac_count_ue(mci, 0, addreg);
	}
	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_MULTI_1_ERR)) {
		addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
		clear |= CBE_MIC_FIR_ECC_MULTI_1_RESET;
		cell_edac_count_ue(mci, 1, addreg);
	}

	/* The procedure for clearing FIR bits is a bit ... weird */
	if (clear) {
		fir &= ~(CBE_MIC_FIR_ECC_ERR_MASK | CBE_MIC_FIR_ECC_SET_MASK);
		fir |= CBE_MIC_FIR_ECC_RESET_MASK;
		fir &= ~clear;
		out_be64(&priv->regs->mic_fir, fir);
		(void)in_be64(&priv->regs->mic_fir);

		mb();	/* sync up */
#ifdef DEBUG
		fir = in_be64(&priv->regs->mic_fir);
		dev_dbg(mci->dev, "fir clear  : 0x%016lx\n", fir);
#endif
	}
}

static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
{
	struct csrow_info		*csrow = &mci->csrows[0];
	struct dimm_info		*dimm;
	struct cell_edac_priv		*priv = mci->pvt_info;
	struct device_node		*np;
	int				j;
	u32				nr_pages;

	for (np = NULL;
	     (np = of_find_node_by_name(np, "memory")) != NULL;) {
		struct resource r;

		/* We "know" that the Cell firmware only creates one entry
		 * in the "memory" nodes. If that changes, this code will
		 * need to be adapted.
		 */
		if (of_address_to_resource(np, 0, &r))
			continue;
		if (of_node_to_nid(np) != priv->node)
			continue;
		csrow->first_page = r.start >> PAGE_SHIFT;
		nr_pages = resource_size(&r) >> PAGE_SHIFT;
		csrow->last_page = csrow->first_page + nr_pages - 1;

		for (j = 0; j < csrow->nr_channels; j++) {
			dimm = csrow->channels[j].dimm;
			dimm->mtype = MEM_XDR;
			dimm->edac_mode = EDAC_SECDED;
			dimm->nr_pages = nr_pages / csrow->nr_channels;
		}
		dev_dbg(mci->dev,
			"Initialized on node %d, chanmask=0x%x,"
			" first_page=0x%lx, nr_pages=0x%x\n",
			priv->node, priv->chanmask,
			csrow->first_page, dimm->nr_pages);
		break;
	}
}

static int __devinit cell_edac_probe(struct platform_device *pdev)
{
	struct cbe_mic_tm_regs __iomem	*regs;
	struct mem_ctl_info		*mci;
	struct cell_edac_priv		*priv;
	u64				reg;
	int				rc, chanmask;

	regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev->id));
	if (regs == NULL)
		return -ENODEV;

	edac_op_state = EDAC_OPSTATE_POLL;

	/* Get channel population */
	reg = in_be64(&regs->mic_mnt_cfg);
	dev_dbg(&pdev->dev, "MIC_MNT_CFG = 0x%016llx\n", reg);
	chanmask = 0;
	if (reg & CBE_MIC_MNT_CFG_CHAN_0_POP)
		chanmask |= 0x1;
	if (reg & CBE_MIC_MNT_CFG_CHAN_1_POP)
		chanmask |= 0x2;
	if (chanmask == 0) {
		dev_warn(&pdev->dev,
			 "Yuck ! No channel populated ? Aborting !\n");
		return -ENODEV;
	}
	dev_dbg(&pdev->dev, "Initial FIR = 0x%016llx\n",
		in_be64(&regs->mic_fir));

	/* Allocate & init EDAC MC data structure */
	mci = edac_mc_alloc(sizeof(struct cell_edac_priv), 1,
			    chanmask == 3 ? 2 : 1, pdev->id);
	if (mci == NULL)
		return -ENOMEM;
	priv = mci->pvt_info;
	priv->regs = regs;
	priv->node = pdev->id;
	priv->chanmask = chanmask;
	mci->dev = &pdev->dev;
	mci->mtype_cap = MEM_FLAG_XDR;
	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
	mci->edac_cap = EDAC_FLAG_EC | EDAC_FLAG_SECDED;
	mci->mod_name = "cell_edac";
	mci->ctl_name = "MIC";
	mci->dev_name = dev_name(&pdev->dev);
	mci->edac_check = cell_edac_check;
	cell_edac_init_csrows(mci);

	/* Register with EDAC core */
	rc = edac_mc_add_mc(mci);
	if (rc) {
		dev_err(&pdev->dev, "failed to register with EDAC core\n");
		edac_mc_free(mci);
		return rc;
	}

	return 0;
}

static int __devexit cell_edac_remove(struct platform_device *pdev)
{
	struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);
	if (mci)
		edac_mc_free(mci);
	return 0;
}

static struct platform_driver cell_edac_driver = {
	.driver		= {
		.name	= "cbe-mic",
		.owner	= THIS_MODULE,
	},
	.probe		= cell_edac_probe,
	.remove		= __devexit_p(cell_edac_remove),
};

static int __init cell_edac_init(void)
{
	/* Sanity check registers data structure */
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_df_ecc_address_0) != 0xf8);
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_df_ecc_address_1) != 0x1b8);
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_df_config) != 0x218);
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_fir) != 0x230);
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_mnt_cfg) != 0x210);
	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
			      mic_exc) != 0x208);

	return platform_driver_register(&cell_edac_driver);
}

static void __exit cell_edac_exit(void)
{
	platform_driver_unregister(&cell_edac_driver);
}

module_init(cell_edac_init);
module_exit(cell_edac_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
MODULE_DESCRIPTION("ECC counting for Cell MIC");
Commit	Line	Data
48764e41 BH	1	/*
	2	* Cell MIC driver for ECC counting
	3	*
	4	* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
	5	* <benh@kernel.crashing.org>
	6	*
	7	* This file may be distributed under the terms of the
	8	* GNU General Public License.
	9	*/
	10	#undef DEBUG
	11
992b692d	12	#include <linux/edac.h>
48764e41 BH	13	#include <linux/module.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/stop_machine.h>
	17	#include <linux/io.h>
	18	#include <asm/machdep.h>
	19	#include <asm/cell-regs.h>
	20
	21	#include "edac_core.h"
	22
	23	struct cell_edac_priv
	24	{
	25	struct cbe_mic_tm_regs __iomem *regs;
	26	int node;
	27	int chanmask;
	28	#ifdef DEBUG
	29	u64 prev_fir;
	30	#endif
	31	};
	32
	33	static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
	34	{
	35	struct cell_edac_priv *priv = mci->pvt_info;
	36	struct csrow_info *csrow = &mci->csrows[0];
c134fd86	37	unsigned long address, pfn, offset, syndrome;
48764e41	38
4712fff9	39	dev_dbg(mci->dev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
48764e41 BH	40	priv->node, chan, ar);
	41
	42	/* Address decoding is likely a bit bogus, to dbl check */
	43	address = (ar & 0xffffffffe0000000ul) >> 29;
	44	if (priv->chanmask == 0x3)
	45	address = (address << 1) \| chan;
	46	pfn = address >> PAGE_SHIFT;
	47	offset = address & ~PAGE_MASK;
c134fd86	48	syndrome = (ar & 0x000000001fe00000ul) >> 21;
48764e41	49
b595076a	50	/* TODO: Decoding of the error address */
48764e41	51	edac_mc_handle_ce(mci, csrow->first_page + pfn, offset,
c134fd86	52	syndrome, 0, chan, "");
48764e41 BH	53	}
	54
	55	static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
	56	{
	57	struct cell_edac_priv *priv = mci->pvt_info;
	58	struct csrow_info *csrow = &mci->csrows[0];
	59	unsigned long address, pfn, offset;
	60
4712fff9	61	dev_dbg(mci->dev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
48764e41 BH	62	priv->node, chan, ar);
	63
	64	/* Address decoding is likely a bit bogus, to dbl check */
	65	address = (ar & 0xffffffffe0000000ul) >> 29;
	66	if (priv->chanmask == 0x3)
	67	address = (address << 1) \| chan;
	68	pfn = address >> PAGE_SHIFT;
	69	offset = address & ~PAGE_MASK;
	70
b595076a	71	/* TODO: Decoding of the error address */
48764e41 BH	72	edac_mc_handle_ue(mci, csrow->first_page + pfn, offset, 0, "");
	73	}
	74
	75	static void cell_edac_check(struct mem_ctl_info *mci)
	76	{
	77	struct cell_edac_priv *priv = mci->pvt_info;
	78	u64 fir, addreg, clear = 0;
	79
	80	fir = in_be64(&priv->regs->mic_fir);
	81	#ifdef DEBUG
	82	if (fir != priv->prev_fir) {
	83	dev_dbg(mci->dev, "fir change : 0x%016lx\n", fir);
	84	priv->prev_fir = fir;
	85	}
	86	#endif
	87	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_SINGLE_0_ERR)) {
	88	addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
	89	clear \|= CBE_MIC_FIR_ECC_SINGLE_0_RESET;
	90	cell_edac_count_ce(mci, 0, addreg);
	91	}
	92	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_SINGLE_1_ERR)) {
	93	addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
	94	clear \|= CBE_MIC_FIR_ECC_SINGLE_1_RESET;
	95	cell_edac_count_ce(mci, 1, addreg);
	96	}
	97	if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_MULTI_0_ERR)) {
	98	addreg = in_be64(&priv->regs->mic_df_ecc_address_0);
	99	clear \|= CBE_MIC_FIR_ECC_MULTI_0_RESET;
	100	cell_edac_count_ue(mci, 0, addreg);
	101	}
	102	if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_MULTI_1_ERR)) {
	103	addreg = in_be64(&priv->regs->mic_df_ecc_address_1);
	104	clear \|= CBE_MIC_FIR_ECC_MULTI_1_RESET;
	105	cell_edac_count_ue(mci, 1, addreg);
	106	}
	107
	108	/* The procedure for clearing FIR bits is a bit ... weird */
	109	if (clear) {
	110	fir &= ~(CBE_MIC_FIR_ECC_ERR_MASK \| CBE_MIC_FIR_ECC_SET_MASK);
	111	fir \|= CBE_MIC_FIR_ECC_RESET_MASK;
	112	fir &= ~clear;
	113	out_be64(&priv->regs->mic_fir, fir);
	114	(void)in_be64(&priv->regs->mic_fir);
	115
	116	mb(); /* sync up */
	117	#ifdef DEBUG
	118	fir = in_be64(&priv->regs->mic_fir);
	119	dev_dbg(mci->dev, "fir clear : 0x%016lx\n", fir);
	120	#endif
	121	}
	122	}
	123
	124	static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
	125	{
	126	struct csrow_info *csrow = &mci->csrows[0];
084a4fcc	127	struct dimm_info *dimm;
48764e41 BH	128	struct cell_edac_priv *priv = mci->pvt_info;
48764e41 BH	129	struct device_node *np;
084a4fcc	130	int j;
a895bf8b	131	u32 nr_pages;
48764e41 BH	132
	133	for (np = NULL;
	134	(np = of_find_node_by_name(np, "memory")) != NULL;) {
	135	struct resource r;
	136
	137	/* We "know" that the Cell firmware only creates one entry
	138	* in the "memory" nodes. If that changes, this code will
	139	* need to be adapted.
	140	*/
	141	if (of_address_to_resource(np, 0, &r))
	142	continue;
	143	if (of_node_to_nid(np) != priv->node)
	144	continue;
	145	csrow->first_page = r.start >> PAGE_SHIFT;
a895bf8b MCC	146	nr_pages = resource_size(&r) >> PAGE_SHIFT;
a895bf8b MCC	147	csrow->last_page = csrow->first_page + nr_pages - 1;
084a4fcc MCC	148
	149	for (j = 0; j < csrow->nr_channels; j++) {
	150	dimm = csrow->channels[j].dimm;
	151	dimm->mtype = MEM_XDR;
	152	dimm->edac_mode = EDAC_SECDED;
a895bf8b	153	dimm->nr_pages = nr_pages / csrow->nr_channels;
084a4fcc	154	}
48764e41 BH	155	dev_dbg(mci->dev,
	156	"Initialized on node %d, chanmask=0x%x,"
	157	" first_page=0x%lx, nr_pages=0x%x\n",
	158	priv->node, priv->chanmask,
a895bf8b	159	csrow->first_page, dimm->nr_pages);
48764e41 BH	160	break;
	161	}
	162	}
	163
	164	static int __devinit cell_edac_probe(struct platform_device *pdev)
	165	{
	166	struct cbe_mic_tm_regs __iomem *regs;
	167	struct mem_ctl_info *mci;
	168	struct cell_edac_priv *priv;
	169	u64 reg;
	170	int rc, chanmask;
	171
	172	regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev->id));
	173	if (regs == NULL)
	174	return -ENODEV;
	175
992b692d BH	176	edac_op_state = EDAC_OPSTATE_POLL;
992b692d BH	177
48764e41 BH	178	/* Get channel population */
48764e41 BH	179	reg = in_be64(&regs->mic_mnt_cfg);
4712fff9	180	dev_dbg(&pdev->dev, "MIC_MNT_CFG = 0x%016llx\n", reg);
48764e41 BH	181	chanmask = 0;
	182	if (reg & CBE_MIC_MNT_CFG_CHAN_0_POP)
	183	chanmask \|= 0x1;
	184	if (reg & CBE_MIC_MNT_CFG_CHAN_1_POP)
	185	chanmask \|= 0x2;
	186	if (chanmask == 0) {
	187	dev_warn(&pdev->dev,
	188	"Yuck ! No channel populated ? Aborting !\n");
	189	return -ENODEV;
	190	}
4712fff9	191	dev_dbg(&pdev->dev, "Initial FIR = 0x%016llx\n",
48764e41 BH	192	in_be64(&regs->mic_fir));
	193
	194	/* Allocate & init EDAC MC data structure */
	195	mci = edac_mc_alloc(sizeof(struct cell_edac_priv), 1,
	196	chanmask == 3 ? 2 : 1, pdev->id);
	197	if (mci == NULL)
	198	return -ENOMEM;
	199	priv = mci->pvt_info;
	200	priv->regs = regs;
	201	priv->node = pdev->id;
	202	priv->chanmask = chanmask;
	203	mci->dev = &pdev->dev;
	204	mci->mtype_cap = MEM_FLAG_XDR;
	205	mci->edac_ctl_cap = EDAC_FLAG_NONE \| EDAC_FLAG_EC \| EDAC_FLAG_SECDED;
	206	mci->edac_cap = EDAC_FLAG_EC \| EDAC_FLAG_SECDED;
	207	mci->mod_name = "cell_edac";
	208	mci->ctl_name = "MIC";
031d5518	209	mci->dev_name = dev_name(&pdev->dev);
48764e41 BH	210	mci->edac_check = cell_edac_check;
	211	cell_edac_init_csrows(mci);
	212
	213	/* Register with EDAC core */
	214	rc = edac_mc_add_mc(mci);
	215	if (rc) {
	216	dev_err(&pdev->dev, "failed to register with EDAC core\n");
	217	edac_mc_free(mci);
	218	return rc;
	219	}
	220
	221	return 0;
	222	}
	223
	224	static int __devexit cell_edac_remove(struct platform_device *pdev)
	225	{
	226	struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);
	227	if (mci)
	228	edac_mc_free(mci);
	229	return 0;
	230	}
	231
	232	static struct platform_driver cell_edac_driver = {
	233	.driver = {
	234	.name = "cbe-mic",
	235	.owner = THIS_MODULE,
	236	},
	237	.probe = cell_edac_probe,
20ea8fad	238	.remove = __devexit_p(cell_edac_remove),
48764e41 BH	239	};
	240
	241	static int __init cell_edac_init(void)
	242	{
	243	/* Sanity check registers data structure */
	244	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	245	mic_df_ecc_address_0) != 0xf8);
	246	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	247	mic_df_ecc_address_1) != 0x1b8);
	248	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	249	mic_df_config) != 0x218);
	250	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	251	mic_fir) != 0x230);
	252	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	253	mic_mnt_cfg) != 0x210);
	254	BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,
	255	mic_exc) != 0x208);
	256
	257	return platform_driver_register(&cell_edac_driver);
	258	}
	259
	260	static void __exit cell_edac_exit(void)
	261	{
	262	platform_driver_unregister(&cell_edac_driver);
	263	}
	264
	265	module_init(cell_edac_init);
	266	module_exit(cell_edac_exit);
	267
	268	MODULE_LICENSE("GPL");
	269	MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
	270	MODULE_DESCRIPTION("ECC counting for Cell MIC");