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1/*
2 * edac_mc kernel module
49c0dab7 3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
da9bb1d2
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4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
10 *
11 * Modified by Dave Peterson and Doug Thompson
12 *
13 */
14
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15#include <linux/module.h>
16#include <linux/proc_fs.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/smp.h>
20#include <linux/init.h>
21#include <linux/sysctl.h>
22#include <linux/highmem.h>
23#include <linux/timer.h>
24#include <linux/slab.h>
25#include <linux/jiffies.h>
26#include <linux/spinlock.h>
27#include <linux/list.h>
28#include <linux/sysdev.h>
29#include <linux/ctype.h>
f2fe42ab 30#include <linux/kthread.h>
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31#include <asm/uaccess.h>
32#include <asm/page.h>
33#include <asm/edac.h>
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34#include "edac_mc.h"
35
49c0dab7 36#define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__
da9bb1d2 37
ceb2ca9c 38
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39#ifdef CONFIG_EDAC_DEBUG
40/* Values of 0 to 4 will generate output */
41int edac_debug_level = 1;
9110540f 42EXPORT_SYMBOL_GPL(edac_debug_level);
da9bb1d2
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43#endif
44
45/* EDAC Controls, setable by module parameter, and sysfs */
46static int log_ue = 1;
47static int log_ce = 1;
ceb2ca9c 48static int panic_on_ue;
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49static int poll_msec = 1000;
50
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51/* lock to memory controller's control array */
52static DECLARE_MUTEX(mem_ctls_mutex);
53static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
54
f2fe42ab
DP
55static struct task_struct *edac_thread;
56
37f04581
DT
57#ifdef CONFIG_PCI
58static int check_pci_parity = 0; /* default YES check PCI parity */
59static int panic_on_pci_parity; /* default no panic on PCI Parity */
60static atomic_t pci_parity_count = ATOMIC_INIT(0);
61
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62static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
63static struct completion edac_pci_kobj_complete;
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64#endif /* CONFIG_PCI */
65
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66/* START sysfs data and methods */
67
ceb2ca9c 68
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69static const char *mem_types[] = {
70 [MEM_EMPTY] = "Empty",
71 [MEM_RESERVED] = "Reserved",
72 [MEM_UNKNOWN] = "Unknown",
73 [MEM_FPM] = "FPM",
74 [MEM_EDO] = "EDO",
75 [MEM_BEDO] = "BEDO",
76 [MEM_SDR] = "Unbuffered-SDR",
77 [MEM_RDR] = "Registered-SDR",
78 [MEM_DDR] = "Unbuffered-DDR",
79 [MEM_RDDR] = "Registered-DDR",
80 [MEM_RMBS] = "RMBS"
81};
82
83static const char *dev_types[] = {
84 [DEV_UNKNOWN] = "Unknown",
85 [DEV_X1] = "x1",
86 [DEV_X2] = "x2",
87 [DEV_X4] = "x4",
88 [DEV_X8] = "x8",
89 [DEV_X16] = "x16",
90 [DEV_X32] = "x32",
91 [DEV_X64] = "x64"
92};
93
94static const char *edac_caps[] = {
95 [EDAC_UNKNOWN] = "Unknown",
96 [EDAC_NONE] = "None",
97 [EDAC_RESERVED] = "Reserved",
98 [EDAC_PARITY] = "PARITY",
99 [EDAC_EC] = "EC",
100 [EDAC_SECDED] = "SECDED",
101 [EDAC_S2ECD2ED] = "S2ECD2ED",
102 [EDAC_S4ECD4ED] = "S4ECD4ED",
103 [EDAC_S8ECD8ED] = "S8ECD8ED",
104 [EDAC_S16ECD16ED] = "S16ECD16ED"
105};
106
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107/* sysfs object: /sys/devices/system/edac */
108static struct sysdev_class edac_class = {
109 set_kset_name("edac"),
110};
111
37f04581 112/* sysfs object:
da9bb1d2 113 * /sys/devices/system/edac/mc
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114 */
115static struct kobject edac_memctrl_kobj;
da9bb1d2 116
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117/* We use these to wait for the reference counts on edac_memctrl_kobj and
118 * edac_pci_kobj to reach 0.
119 */
120static struct completion edac_memctrl_kobj_complete;
472678eb 121
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122/*
123 * /sys/devices/system/edac/mc;
e7ecd891 124 * data structures and methods
da9bb1d2 125 */
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126static ssize_t memctrl_int_show(void *ptr, char *buffer)
127{
128 int *value = (int*) ptr;
49c0dab7 129 return sprintf(buffer, "%u\n", *value);
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130}
131
132static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
133{
134 int *value = (int*) ptr;
135
136 if (isdigit(*buffer))
137 *value = simple_strtoul(buffer, NULL, 0);
138
139 return count;
140}
141
142struct memctrl_dev_attribute {
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143 struct attribute attr;
144 void *value;
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145 ssize_t (*show)(void *,char *);
146 ssize_t (*store)(void *, const char *, size_t);
147};
148
149/* Set of show/store abstract level functions for memory control object */
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150static ssize_t memctrl_dev_show(struct kobject *kobj,
151 struct attribute *attr, char *buffer)
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152{
153 struct memctrl_dev_attribute *memctrl_dev;
154 memctrl_dev = (struct memctrl_dev_attribute*)attr;
155
156 if (memctrl_dev->show)
157 return memctrl_dev->show(memctrl_dev->value, buffer);
e7ecd891 158
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159 return -EIO;
160}
161
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162static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
163 const char *buffer, size_t count)
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164{
165 struct memctrl_dev_attribute *memctrl_dev;
166 memctrl_dev = (struct memctrl_dev_attribute*)attr;
167
168 if (memctrl_dev->store)
169 return memctrl_dev->store(memctrl_dev->value, buffer, count);
e7ecd891 170
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171 return -EIO;
172}
173
174static struct sysfs_ops memctrlfs_ops = {
175 .show = memctrl_dev_show,
176 .store = memctrl_dev_store
177};
178
179#define MEMCTRL_ATTR(_name,_mode,_show,_store) \
180struct memctrl_dev_attribute attr_##_name = { \
181 .attr = {.name = __stringify(_name), .mode = _mode }, \
182 .value = &_name, \
183 .show = _show, \
184 .store = _store, \
185};
186
187#define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
188struct memctrl_dev_attribute attr_##_name = { \
189 .attr = {.name = __stringify(_name), .mode = _mode }, \
190 .value = _data, \
191 .show = _show, \
192 .store = _store, \
193};
194
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195/* csrow<id> control files */
196MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
197MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
198MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
199MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
200
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201/* Base Attributes of the memory ECC object */
202static struct memctrl_dev_attribute *memctrl_attr[] = {
203 &attr_panic_on_ue,
204 &attr_log_ue,
205 &attr_log_ce,
206 &attr_poll_msec,
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207 NULL,
208};
209
210/* Main MC kobject release() function */
211static void edac_memctrl_master_release(struct kobject *kobj)
212{
537fba28 213 debugf1("%s()\n", __func__);
472678eb 214 complete(&edac_memctrl_kobj_complete);
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215}
216
217static struct kobj_type ktype_memctrl = {
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218 .release = edac_memctrl_master_release,
219 .sysfs_ops = &memctrlfs_ops,
220 .default_attrs = (struct attribute **) memctrl_attr,
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221};
222
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223/* Initialize the main sysfs entries for edac:
224 * /sys/devices/system/edac
225 *
226 * and children
227 *
228 * Return: 0 SUCCESS
229 * !0 FAILURE
230 */
231static int edac_sysfs_memctrl_setup(void)
232{
77d6e139 233 int err = 0;
da9bb1d2 234
537fba28 235 debugf1("%s()\n", __func__);
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236
237 /* create the /sys/devices/system/edac directory */
238 err = sysdev_class_register(&edac_class);
e7ecd891 239
77d6e139 240 if (err) {
537fba28 241 debugf1("%s() error=%d\n", __func__, err);
77d6e139
AM
242 return err;
243 }
da9bb1d2 244
77d6e139
AM
245 /* Init the MC's kobject */
246 memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
247 edac_memctrl_kobj.parent = &edac_class.kset.kobj;
248 edac_memctrl_kobj.ktype = &ktype_memctrl;
249
250 /* generate sysfs "..../edac/mc" */
251 err = kobject_set_name(&edac_memctrl_kobj,"mc");
252
253 if (err)
254 goto fail;
255
256 /* FIXME: maybe new sysdev_create_subdir() */
257 err = kobject_register(&edac_memctrl_kobj);
258
259 if (err) {
260 debugf1("Failed to register '.../edac/mc'\n");
261 goto fail;
262 }
263
264 debugf1("Registered '.../edac/mc' kobject\n");
265
266 return 0;
267
268fail:
269 sysdev_class_unregister(&edac_class);
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270 return err;
271}
272
273/*
274 * MC teardown:
275 * the '..../edac/mc' kobject followed by '..../edac' itself
276 */
277static void edac_sysfs_memctrl_teardown(void)
278{
279 debugf0("MC: " __FILE__ ": %s()\n", __func__);
280
472678eb
DP
281 /* Unregister the MC's kobject and wait for reference count to reach
282 * 0.
283 */
284 init_completion(&edac_memctrl_kobj_complete);
da9bb1d2 285 kobject_unregister(&edac_memctrl_kobj);
472678eb 286 wait_for_completion(&edac_memctrl_kobj_complete);
da9bb1d2 287
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288 /* Unregister the 'edac' object */
289 sysdev_class_unregister(&edac_class);
290}
291
37f04581 292#ifdef CONFIG_PCI
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293static ssize_t edac_pci_int_show(void *ptr, char *buffer)
294{
295 int *value = ptr;
296 return sprintf(buffer,"%d\n",*value);
297}
298
299static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
300{
301 int *value = ptr;
302
303 if (isdigit(*buffer))
304 *value = simple_strtoul(buffer,NULL,0);
305
306 return count;
307}
308
309struct edac_pci_dev_attribute {
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DP
310 struct attribute attr;
311 void *value;
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312 ssize_t (*show)(void *,char *);
313 ssize_t (*store)(void *, const char *,size_t);
314};
315
316/* Set of show/store abstract level functions for PCI Parity object */
317static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
e7ecd891 318 char *buffer)
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319{
320 struct edac_pci_dev_attribute *edac_pci_dev;
321 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
322
323 if (edac_pci_dev->show)
324 return edac_pci_dev->show(edac_pci_dev->value, buffer);
325 return -EIO;
326}
327
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DP
328static ssize_t edac_pci_dev_store(struct kobject *kobj,
329 struct attribute *attr, const char *buffer, size_t count)
da9bb1d2
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330{
331 struct edac_pci_dev_attribute *edac_pci_dev;
332 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
333
334 if (edac_pci_dev->show)
335 return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
336 return -EIO;
337}
338
339static struct sysfs_ops edac_pci_sysfs_ops = {
340 .show = edac_pci_dev_show,
341 .store = edac_pci_dev_store
342};
343
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344#define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
345struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
346 .attr = {.name = __stringify(_name), .mode = _mode }, \
347 .value = &_name, \
348 .show = _show, \
349 .store = _store, \
350};
351
352#define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
353struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
354 .attr = {.name = __stringify(_name), .mode = _mode }, \
355 .value = _data, \
356 .show = _show, \
357 .store = _store, \
358};
359
da9bb1d2 360/* PCI Parity control files */
e7ecd891
DP
361EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
362 edac_pci_int_store);
363EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
364 edac_pci_int_store);
365EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
da9bb1d2
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366
367/* Base Attributes of the memory ECC object */
368static struct edac_pci_dev_attribute *edac_pci_attr[] = {
369 &edac_pci_attr_check_pci_parity,
370 &edac_pci_attr_panic_on_pci_parity,
371 &edac_pci_attr_pci_parity_count,
da9bb1d2
AC
372 NULL,
373};
374
375/* No memory to release */
376static void edac_pci_release(struct kobject *kobj)
377{
537fba28 378 debugf1("%s()\n", __func__);
472678eb 379 complete(&edac_pci_kobj_complete);
da9bb1d2
AC
380}
381
382static struct kobj_type ktype_edac_pci = {
e7ecd891
DP
383 .release = edac_pci_release,
384 .sysfs_ops = &edac_pci_sysfs_ops,
385 .default_attrs = (struct attribute **) edac_pci_attr,
da9bb1d2
AC
386};
387
388/**
389 * edac_sysfs_pci_setup()
390 *
391 */
392static int edac_sysfs_pci_setup(void)
393{
394 int err;
395
537fba28 396 debugf1("%s()\n", __func__);
da9bb1d2
AC
397
398 memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
da9bb1d2
AC
399 edac_pci_kobj.parent = &edac_class.kset.kobj;
400 edac_pci_kobj.ktype = &ktype_edac_pci;
da9bb1d2 401 err = kobject_set_name(&edac_pci_kobj, "pci");
e7ecd891 402
da9bb1d2
AC
403 if (!err) {
404 /* Instanstiate the csrow object */
405 /* FIXME: maybe new sysdev_create_subdir() */
406 err = kobject_register(&edac_pci_kobj);
e7ecd891 407
da9bb1d2
AC
408 if (err)
409 debugf1("Failed to register '.../edac/pci'\n");
410 else
411 debugf1("Registered '.../edac/pci' kobject\n");
412 }
e7ecd891 413
da9bb1d2
AC
414 return err;
415}
da9bb1d2
AC
416
417static void edac_sysfs_pci_teardown(void)
418{
537fba28 419 debugf0("%s()\n", __func__);
472678eb 420 init_completion(&edac_pci_kobj_complete);
da9bb1d2 421 kobject_unregister(&edac_pci_kobj);
472678eb 422 wait_for_completion(&edac_pci_kobj_complete);
da9bb1d2
AC
423}
424
37f04581
DT
425
426static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
427{
428 int where;
429 u16 status;
430
431 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
432 pci_read_config_word(dev, where, &status);
433
434 /* If we get back 0xFFFF then we must suspect that the card has been
435 * pulled but the Linux PCI layer has not yet finished cleaning up.
436 * We don't want to report on such devices
437 */
438
439 if (status == 0xFFFF) {
440 u32 sanity;
441
442 pci_read_config_dword(dev, 0, &sanity);
443
444 if (sanity == 0xFFFFFFFF)
445 return 0;
446 }
447
448 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
449 PCI_STATUS_PARITY;
450
451 if (status)
452 /* reset only the bits we are interested in */
453 pci_write_config_word(dev, where, status);
454
455 return status;
456}
457
458typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
459
460/* Clear any PCI parity errors logged by this device. */
461static void edac_pci_dev_parity_clear(struct pci_dev *dev)
462{
463 u8 header_type;
464
465 get_pci_parity_status(dev, 0);
466
467 /* read the device TYPE, looking for bridges */
468 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
469
470 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
471 get_pci_parity_status(dev, 1);
472}
473
474/*
475 * PCI Parity polling
476 *
477 */
478static void edac_pci_dev_parity_test(struct pci_dev *dev)
479{
480 u16 status;
481 u8 header_type;
482
483 /* read the STATUS register on this device
484 */
485 status = get_pci_parity_status(dev, 0);
486
487 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
488
489 /* check the status reg for errors */
490 if (status) {
491 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
492 edac_printk(KERN_CRIT, EDAC_PCI,
493 "Signaled System Error on %s\n",
494 pci_name(dev));
495
496 if (status & (PCI_STATUS_PARITY)) {
497 edac_printk(KERN_CRIT, EDAC_PCI,
498 "Master Data Parity Error on %s\n",
499 pci_name(dev));
500
501 atomic_inc(&pci_parity_count);
502 }
503
504 if (status & (PCI_STATUS_DETECTED_PARITY)) {
505 edac_printk(KERN_CRIT, EDAC_PCI,
506 "Detected Parity Error on %s\n",
507 pci_name(dev));
508
509 atomic_inc(&pci_parity_count);
510 }
511 }
512
513 /* read the device TYPE, looking for bridges */
514 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
515
516 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
517
518 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
519 /* On bridges, need to examine secondary status register */
520 status = get_pci_parity_status(dev, 1);
521
522 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
523 status, dev->dev.bus_id );
524
525 /* check the secondary status reg for errors */
526 if (status) {
527 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
528 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
529 "Signaled System Error on %s\n",
530 pci_name(dev));
531
532 if (status & (PCI_STATUS_PARITY)) {
533 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
534 "Master Data Parity Error on "
535 "%s\n", pci_name(dev));
536
537 atomic_inc(&pci_parity_count);
538 }
539
540 if (status & (PCI_STATUS_DETECTED_PARITY)) {
541 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
542 "Detected Parity Error on %s\n",
543 pci_name(dev));
544
545 atomic_inc(&pci_parity_count);
546 }
547 }
548 }
549}
550
37f04581
DT
551/*
552 * pci_dev parity list iterator
553 * Scan the PCI device list for one iteration, looking for SERRORs
554 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
555 */
556static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
557{
558 struct pci_dev *dev = NULL;
559
560 /* request for kernel access to the next PCI device, if any,
561 * and while we are looking at it have its reference count
562 * bumped until we are done with it
563 */
564 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
49c0dab7 565 fn(dev);
37f04581
DT
566 }
567}
568
569static void do_pci_parity_check(void)
570{
571 unsigned long flags;
572 int before_count;
573
574 debugf3("%s()\n", __func__);
575
576 if (!check_pci_parity)
577 return;
578
579 before_count = atomic_read(&pci_parity_count);
580
581 /* scan all PCI devices looking for a Parity Error on devices and
582 * bridges
583 */
584 local_irq_save(flags);
585 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
586 local_irq_restore(flags);
587
588 /* Only if operator has selected panic on PCI Error */
589 if (panic_on_pci_parity) {
590 /* If the count is different 'after' from 'before' */
591 if (before_count != atomic_read(&pci_parity_count))
592 panic("EDAC: PCI Parity Error");
593 }
594}
595
596static inline void clear_pci_parity_errors(void)
597{
598 /* Clear any PCI bus parity errors that devices initially have logged
599 * in their registers.
600 */
601 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
602}
603
604#else /* CONFIG_PCI */
605
49c0dab7
DT
606/* pre-process these away */
607#define do_pci_parity_check()
608#define clear_pci_parity_errors()
609#define edac_sysfs_pci_teardown()
610#define edac_sysfs_pci_setup() (0)
37f04581 611
37f04581
DT
612#endif /* CONFIG_PCI */
613
49c0dab7
DT
614/* EDAC sysfs CSROW data structures and methods
615 */
da9bb1d2 616
49c0dab7
DT
617/* Set of more default csrow<id> attribute show/store functions */
618static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 619{
49c0dab7 620 return sprintf(data,"%u\n", csrow->ue_count);
da9bb1d2
AC
621}
622
49c0dab7 623static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 624{
49c0dab7 625 return sprintf(data,"%u\n", csrow->ce_count);
da9bb1d2
AC
626}
627
49c0dab7 628static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 629{
49c0dab7 630 return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
da9bb1d2
AC
631}
632
49c0dab7 633static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 634{
49c0dab7 635 return sprintf(data,"%s\n", mem_types[csrow->mtype]);
da9bb1d2
AC
636}
637
49c0dab7 638static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 639{
49c0dab7 640 return sprintf(data,"%s\n", dev_types[csrow->dtype]);
da9bb1d2
AC
641}
642
49c0dab7 643static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private)
da9bb1d2 644{
49c0dab7 645 return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
da9bb1d2
AC
646}
647
49c0dab7
DT
648/* show/store functions for DIMM Label attributes */
649static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
650 char *data, int channel)
da9bb1d2 651{
49c0dab7
DT
652 return snprintf(data, EDAC_MC_LABEL_LEN,"%s",
653 csrow->channels[channel].label);
da9bb1d2
AC
654}
655
49c0dab7
DT
656static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
657 const char *data,
658 size_t count,
659 int channel)
da9bb1d2 660{
49c0dab7 661 ssize_t max_size = 0;
da9bb1d2 662
49c0dab7
DT
663 max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1);
664 strncpy(csrow->channels[channel].label, data, max_size);
665 csrow->channels[channel].label[max_size] = '\0';
da9bb1d2 666
49c0dab7 667 return max_size;
da9bb1d2
AC
668}
669
49c0dab7
DT
670/* show function for dynamic chX_ce_count attribute */
671static ssize_t channel_ce_count_show(struct csrow_info *csrow,
672 char *data,
673 int channel)
da9bb1d2 674{
49c0dab7 675 return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
da9bb1d2
AC
676}
677
49c0dab7 678/* csrow specific attribute structure */
da9bb1d2 679struct csrowdev_attribute {
e7ecd891 680 struct attribute attr;
49c0dab7
DT
681 ssize_t (*show)(struct csrow_info *,char *,int);
682 ssize_t (*store)(struct csrow_info *, const char *,size_t,int);
683 int private;
da9bb1d2
AC
684};
685
686#define to_csrow(k) container_of(k, struct csrow_info, kobj)
687#define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
688
49c0dab7
DT
689/* Set of show/store higher level functions for default csrow attributes */
690static ssize_t csrowdev_show(struct kobject *kobj,
691 struct attribute *attr,
692 char *buffer)
da9bb1d2
AC
693{
694 struct csrow_info *csrow = to_csrow(kobj);
695 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
696
697 if (csrowdev_attr->show)
49c0dab7
DT
698 return csrowdev_attr->show(csrow,
699 buffer,
700 csrowdev_attr->private);
da9bb1d2
AC
701 return -EIO;
702}
703
704static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
e7ecd891 705 const char *buffer, size_t count)
da9bb1d2
AC
706{
707 struct csrow_info *csrow = to_csrow(kobj);
708 struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
709
710 if (csrowdev_attr->store)
49c0dab7
DT
711 return csrowdev_attr->store(csrow,
712 buffer,
713 count,
714 csrowdev_attr->private);
da9bb1d2
AC
715 return -EIO;
716}
717
718static struct sysfs_ops csrowfs_ops = {
719 .show = csrowdev_show,
720 .store = csrowdev_store
721};
722
49c0dab7 723#define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
da9bb1d2
AC
724struct csrowdev_attribute attr_##_name = { \
725 .attr = {.name = __stringify(_name), .mode = _mode }, \
726 .show = _show, \
727 .store = _store, \
49c0dab7 728 .private = _private, \
da9bb1d2
AC
729};
730
49c0dab7
DT
731/* default cwrow<id>/attribute files */
732CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0);
733CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0);
734CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0);
735CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0);
736CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0);
737CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0);
da9bb1d2 738
49c0dab7
DT
739/* default attributes of the CSROW<id> object */
740static struct csrowdev_attribute *default_csrow_attr[] = {
da9bb1d2
AC
741 &attr_dev_type,
742 &attr_mem_type,
743 &attr_edac_mode,
744 &attr_size_mb,
745 &attr_ue_count,
746 &attr_ce_count,
da9bb1d2
AC
747 NULL,
748};
749
49c0dab7
DT
750
751/* possible dynamic channel DIMM Label attribute files */
752CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
753 channel_dimm_label_show,
754 channel_dimm_label_store,
755 0 );
756CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
757 channel_dimm_label_show,
758 channel_dimm_label_store,
759 1 );
760CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR,
761 channel_dimm_label_show,
762 channel_dimm_label_store,
763 2 );
764CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR,
765 channel_dimm_label_show,
766 channel_dimm_label_store,
767 3 );
768CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR,
769 channel_dimm_label_show,
770 channel_dimm_label_store,
771 4 );
772CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR,
773 channel_dimm_label_show,
774 channel_dimm_label_store,
775 5 );
776
777/* Total possible dynamic DIMM Label attribute file table */
778static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
779 &attr_ch0_dimm_label,
780 &attr_ch1_dimm_label,
781 &attr_ch2_dimm_label,
782 &attr_ch3_dimm_label,
783 &attr_ch4_dimm_label,
784 &attr_ch5_dimm_label
785};
786
787/* possible dynamic channel ce_count attribute files */
788CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR,
789 channel_ce_count_show,
790 NULL,
791 0 );
792CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR,
793 channel_ce_count_show,
794 NULL,
795 1 );
796CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR,
797 channel_ce_count_show,
798 NULL,
799 2 );
800CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR,
801 channel_ce_count_show,
802 NULL,
803 3 );
804CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR,
805 channel_ce_count_show,
806 NULL,
807 4 );
808CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR,
809 channel_ce_count_show,
810 NULL,
811 5 );
812
813/* Total possible dynamic ce_count attribute file table */
814static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
815 &attr_ch0_ce_count,
816 &attr_ch1_ce_count,
817 &attr_ch2_ce_count,
818 &attr_ch3_ce_count,
819 &attr_ch4_ce_count,
820 &attr_ch5_ce_count
821};
822
823
824#define EDAC_NR_CHANNELS 6
825
826/* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
827static int edac_create_channel_files(struct kobject *kobj, int chan)
828{
829 int err=-ENODEV;
830
831 if (chan >= EDAC_NR_CHANNELS)
832 return err;
833
834 /* create the DIMM label attribute file */
835 err = sysfs_create_file(kobj,
836 (struct attribute *) dynamic_csrow_dimm_attr[chan]);
837
838 if (!err) {
839 /* create the CE Count attribute file */
840 err = sysfs_create_file(kobj,
841 (struct attribute *) dynamic_csrow_ce_count_attr[chan]);
842 } else {
843 debugf1("%s() dimm labels and ce_count files created", __func__);
844 }
845
846 return err;
847}
848
849/* No memory to release for this kobj */
da9bb1d2
AC
850static void edac_csrow_instance_release(struct kobject *kobj)
851{
472678eb
DP
852 struct csrow_info *cs;
853
472678eb
DP
854 cs = container_of(kobj, struct csrow_info, kobj);
855 complete(&cs->kobj_complete);
da9bb1d2
AC
856}
857
49c0dab7 858/* the kobj_type instance for a CSROW */
da9bb1d2 859static struct kobj_type ktype_csrow = {
e7ecd891
DP
860 .release = edac_csrow_instance_release,
861 .sysfs_ops = &csrowfs_ops,
49c0dab7 862 .default_attrs = (struct attribute **) default_csrow_attr,
da9bb1d2
AC
863};
864
865/* Create a CSROW object under specifed edac_mc_device */
49c0dab7
DT
866static int edac_create_csrow_object(
867 struct kobject *edac_mci_kobj,
868 struct csrow_info *csrow,
869 int index)
da9bb1d2
AC
870{
871 int err = 0;
49c0dab7 872 int chan;
da9bb1d2 873
da9bb1d2
AC
874 memset(&csrow->kobj, 0, sizeof(csrow->kobj));
875
876 /* generate ..../edac/mc/mc<id>/csrow<index> */
877
da9bb1d2
AC
878 csrow->kobj.parent = edac_mci_kobj;
879 csrow->kobj.ktype = &ktype_csrow;
880
881 /* name this instance of csrow<id> */
882 err = kobject_set_name(&csrow->kobj,"csrow%d",index);
49c0dab7
DT
883 if (err)
884 goto error_exit;
e7ecd891 885
49c0dab7
DT
886 /* Instanstiate the csrow object */
887 err = kobject_register(&csrow->kobj);
da9bb1d2 888 if (!err) {
49c0dab7
DT
889 /* Create the dyanmic attribute files on this csrow,
890 * namely, the DIMM labels and the channel ce_count
891 */
892 for (chan = 0; chan < csrow->nr_channels; chan++) {
893 err = edac_create_channel_files(&csrow->kobj,chan);
894 if (err)
895 break;
896 }
da9bb1d2
AC
897 }
898
49c0dab7 899error_exit:
da9bb1d2
AC
900 return err;
901}
902
49c0dab7 903/* default sysfs methods and data structures for the main MCI kobject */
da9bb1d2 904
e7ecd891
DP
905static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
906 const char *data, size_t count)
da9bb1d2
AC
907{
908 int row, chan;
909
910 mci->ue_noinfo_count = 0;
911 mci->ce_noinfo_count = 0;
912 mci->ue_count = 0;
913 mci->ce_count = 0;
e7ecd891 914
da9bb1d2
AC
915 for (row = 0; row < mci->nr_csrows; row++) {
916 struct csrow_info *ri = &mci->csrows[row];
917
918 ri->ue_count = 0;
919 ri->ce_count = 0;
e7ecd891 920
da9bb1d2
AC
921 for (chan = 0; chan < ri->nr_channels; chan++)
922 ri->channels[chan].ce_count = 0;
923 }
da9bb1d2 924
e7ecd891 925 mci->start_time = jiffies;
da9bb1d2
AC
926 return count;
927}
928
49c0dab7 929/* default attribute files for the MCI object */
da9bb1d2
AC
930static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
931{
932 return sprintf(data,"%d\n", mci->ue_count);
933}
934
935static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
936{
937 return sprintf(data,"%d\n", mci->ce_count);
938}
939
940static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
941{
942 return sprintf(data,"%d\n", mci->ce_noinfo_count);
943}
944
945static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
946{
947 return sprintf(data,"%d\n", mci->ue_noinfo_count);
948}
949
950static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
951{
952 return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
953}
954
da9bb1d2
AC
955static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
956{
957 return sprintf(data,"%s\n", mci->ctl_name);
958}
959
da9bb1d2
AC
960static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
961{
962 int total_pages, csrow_idx;
963
964 for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
965 csrow_idx++) {
966 struct csrow_info *csrow = &mci->csrows[csrow_idx];
967
968 if (!csrow->nr_pages)
969 continue;
e7ecd891 970
da9bb1d2
AC
971 total_pages += csrow->nr_pages;
972 }
973
974 return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
975}
976
977struct mcidev_attribute {
e7ecd891 978 struct attribute attr;
da9bb1d2
AC
979 ssize_t (*show)(struct mem_ctl_info *,char *);
980 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
981};
982
983#define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
984#define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
985
49c0dab7 986/* MCI show/store functions for top most object */
da9bb1d2 987static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
e7ecd891 988 char *buffer)
da9bb1d2
AC
989{
990 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
991 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
992
993 if (mcidev_attr->show)
994 return mcidev_attr->show(mem_ctl_info, buffer);
e7ecd891 995
da9bb1d2
AC
996 return -EIO;
997}
998
999static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
e7ecd891 1000 const char *buffer, size_t count)
da9bb1d2
AC
1001{
1002 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
1003 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
1004
1005 if (mcidev_attr->store)
1006 return mcidev_attr->store(mem_ctl_info, buffer, count);
e7ecd891 1007
da9bb1d2
AC
1008 return -EIO;
1009}
1010
1011static struct sysfs_ops mci_ops = {
e7ecd891
DP
1012 .show = mcidev_show,
1013 .store = mcidev_store
da9bb1d2
AC
1014};
1015
1016#define MCIDEV_ATTR(_name,_mode,_show,_store) \
1017struct mcidev_attribute mci_attr_##_name = { \
1018 .attr = {.name = __stringify(_name), .mode = _mode }, \
1019 .show = _show, \
1020 .store = _store, \
1021};
1022
49c0dab7 1023/* default Control file */
da9bb1d2
AC
1024MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
1025
49c0dab7 1026/* default Attribute files */
da9bb1d2 1027MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
da9bb1d2
AC
1028MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
1029MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
1030MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
1031MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
1032MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
1033MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
da9bb1d2 1034
da9bb1d2
AC
1035static struct mcidev_attribute *mci_attr[] = {
1036 &mci_attr_reset_counters,
da9bb1d2 1037 &mci_attr_mc_name,
da9bb1d2
AC
1038 &mci_attr_size_mb,
1039 &mci_attr_seconds_since_reset,
1040 &mci_attr_ue_noinfo_count,
1041 &mci_attr_ce_noinfo_count,
1042 &mci_attr_ue_count,
1043 &mci_attr_ce_count,
1044 NULL
1045};
1046
da9bb1d2
AC
1047/*
1048 * Release of a MC controlling instance
1049 */
1050static void edac_mci_instance_release(struct kobject *kobj)
1051{
1052 struct mem_ctl_info *mci;
da9bb1d2 1053
472678eb
DP
1054 mci = to_mci(kobj);
1055 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1056 complete(&mci->kobj_complete);
da9bb1d2
AC
1057}
1058
1059static struct kobj_type ktype_mci = {
e7ecd891
DP
1060 .release = edac_mci_instance_release,
1061 .sysfs_ops = &mci_ops,
1062 .default_attrs = (struct attribute **) mci_attr,
da9bb1d2
AC
1063};
1064
ceb2ca9c 1065
da9bb1d2
AC
1066#define EDAC_DEVICE_SYMLINK "device"
1067
1068/*
1069 * Create a new Memory Controller kobject instance,
1070 * mc<id> under the 'mc' directory
1071 *
1072 * Return:
1073 * 0 Success
1074 * !0 Failure
1075 */
1076static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
1077{
1078 int i;
1079 int err;
1080 struct csrow_info *csrow;
1081 struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
1082
537fba28 1083 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
da9bb1d2 1084 memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
da9bb1d2
AC
1085
1086 /* set the name of the mc<id> object */
1087 err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
1088 if (err)
1089 return err;
1090
1091 /* link to our parent the '..../edac/mc' object */
1092 edac_mci_kobj->parent = &edac_memctrl_kobj;
1093 edac_mci_kobj->ktype = &ktype_mci;
1094
1095 /* register the mc<id> kobject */
1096 err = kobject_register(edac_mci_kobj);
1097 if (err)
1098 return err;
1099
1100 /* create a symlink for the device */
37f04581 1101 err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
da9bb1d2 1102 EDAC_DEVICE_SYMLINK);
6e5a8748
DP
1103 if (err)
1104 goto fail0;
da9bb1d2
AC
1105
1106 /* Make directories for each CSROW object
1107 * under the mc<id> kobject
1108 */
1109 for (i = 0; i < mci->nr_csrows; i++) {
da9bb1d2
AC
1110 csrow = &mci->csrows[i];
1111
1112 /* Only expose populated CSROWs */
1113 if (csrow->nr_pages > 0) {
1114 err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
1115 if (err)
6e5a8748 1116 goto fail1;
da9bb1d2
AC
1117 }
1118 }
1119
da9bb1d2
AC
1120 return 0;
1121
da9bb1d2 1122 /* CSROW error: backout what has already been registered, */
6e5a8748 1123fail1:
da9bb1d2 1124 for ( i--; i >= 0; i--) {
472678eb
DP
1125 if (csrow->nr_pages > 0) {
1126 init_completion(&csrow->kobj_complete);
da9bb1d2 1127 kobject_unregister(&mci->csrows[i].kobj);
472678eb
DP
1128 wait_for_completion(&csrow->kobj_complete);
1129 }
da9bb1d2
AC
1130 }
1131
6e5a8748 1132fail0:
472678eb 1133 init_completion(&mci->kobj_complete);
da9bb1d2 1134 kobject_unregister(edac_mci_kobj);
472678eb 1135 wait_for_completion(&mci->kobj_complete);
da9bb1d2
AC
1136 return err;
1137}
1138
1139/*
1140 * remove a Memory Controller instance
1141 */
1142static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1143{
1144 int i;
1145
537fba28 1146 debugf0("%s()\n", __func__);
da9bb1d2
AC
1147
1148 /* remove all csrow kobjects */
1149 for (i = 0; i < mci->nr_csrows; i++) {
472678eb
DP
1150 if (mci->csrows[i].nr_pages > 0) {
1151 init_completion(&mci->csrows[i].kobj_complete);
da9bb1d2 1152 kobject_unregister(&mci->csrows[i].kobj);
472678eb
DP
1153 wait_for_completion(&mci->csrows[i].kobj_complete);
1154 }
da9bb1d2
AC
1155 }
1156
1157 sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
472678eb 1158 init_completion(&mci->kobj_complete);
da9bb1d2 1159 kobject_unregister(&mci->edac_mci_kobj);
472678eb 1160 wait_for_completion(&mci->kobj_complete);
da9bb1d2
AC
1161}
1162
1163/* END OF sysfs data and methods */
1164
1165#ifdef CONFIG_EDAC_DEBUG
1166
da9bb1d2
AC
1167void edac_mc_dump_channel(struct channel_info *chan)
1168{
1169 debugf4("\tchannel = %p\n", chan);
1170 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
1171 debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
1172 debugf4("\tchannel->label = '%s'\n", chan->label);
1173 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
1174}
9110540f 1175EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
da9bb1d2 1176
da9bb1d2
AC
1177void edac_mc_dump_csrow(struct csrow_info *csrow)
1178{
1179 debugf4("\tcsrow = %p\n", csrow);
1180 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
1181 debugf4("\tcsrow->first_page = 0x%lx\n",
1182 csrow->first_page);
1183 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
1184 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
1185 debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
1186 debugf4("\tcsrow->nr_channels = %d\n",
1187 csrow->nr_channels);
1188 debugf4("\tcsrow->channels = %p\n", csrow->channels);
1189 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
1190}
9110540f 1191EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
da9bb1d2 1192
da9bb1d2
AC
1193void edac_mc_dump_mci(struct mem_ctl_info *mci)
1194{
1195 debugf3("\tmci = %p\n", mci);
1196 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
1197 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
1198 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
1199 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
1200 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
1201 mci->nr_csrows, mci->csrows);
37f04581 1202 debugf3("\tdev = %p\n", mci->dev);
da9bb1d2
AC
1203 debugf3("\tmod_name:ctl_name = %s:%s\n",
1204 mci->mod_name, mci->ctl_name);
1205 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
1206}
9110540f 1207EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
da9bb1d2 1208
e7ecd891 1209#endif /* CONFIG_EDAC_DEBUG */
da9bb1d2
AC
1210
1211/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
1212 * Adjust 'ptr' so that its alignment is at least as stringent as what the
1213 * compiler would provide for X and return the aligned result.
1214 *
1215 * If 'size' is a constant, the compiler will optimize this whole function
1216 * down to either a no-op or the addition of a constant to the value of 'ptr'.
1217 */
e7ecd891 1218static inline char * align_ptr(void *ptr, unsigned size)
da9bb1d2
AC
1219{
1220 unsigned align, r;
1221
1222 /* Here we assume that the alignment of a "long long" is the most
1223 * stringent alignment that the compiler will ever provide by default.
1224 * As far as I know, this is a reasonable assumption.
1225 */
1226 if (size > sizeof(long))
1227 align = sizeof(long long);
1228 else if (size > sizeof(int))
1229 align = sizeof(long);
1230 else if (size > sizeof(short))
1231 align = sizeof(int);
1232 else if (size > sizeof(char))
1233 align = sizeof(short);
1234 else
1235 return (char *) ptr;
1236
1237 r = size % align;
1238
1239 if (r == 0)
1240 return (char *) ptr;
1241
1242 return (char *) (((unsigned long) ptr) + align - r);
1243}
1244
da9bb1d2
AC
1245/**
1246 * edac_mc_alloc: Allocate a struct mem_ctl_info structure
1247 * @size_pvt: size of private storage needed
1248 * @nr_csrows: Number of CWROWS needed for this MC
1249 * @nr_chans: Number of channels for the MC
1250 *
1251 * Everything is kmalloc'ed as one big chunk - more efficient.
1252 * Only can be used if all structures have the same lifetime - otherwise
1253 * you have to allocate and initialize your own structures.
1254 *
1255 * Use edac_mc_free() to free mc structures allocated by this function.
1256 *
1257 * Returns:
1258 * NULL allocation failed
1259 * struct mem_ctl_info pointer
1260 */
1261struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
e7ecd891 1262 unsigned nr_chans)
da9bb1d2
AC
1263{
1264 struct mem_ctl_info *mci;
1265 struct csrow_info *csi, *csrow;
1266 struct channel_info *chi, *chp, *chan;
1267 void *pvt;
1268 unsigned size;
1269 int row, chn;
1270
1271 /* Figure out the offsets of the various items from the start of an mc
1272 * structure. We want the alignment of each item to be at least as
1273 * stringent as what the compiler would provide if we could simply
1274 * hardcode everything into a single struct.
1275 */
1276 mci = (struct mem_ctl_info *) 0;
1277 csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
1278 chi = (struct channel_info *)
1279 align_ptr(&csi[nr_csrows], sizeof(*chi));
1280 pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
1281 size = ((unsigned long) pvt) + sz_pvt;
1282
1283 if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
1284 return NULL;
1285
1286 /* Adjust pointers so they point within the memory we just allocated
1287 * rather than an imaginary chunk of memory located at address 0.
1288 */
1289 csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
1290 chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
1291 pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
1292
e7ecd891 1293 memset(mci, 0, size); /* clear all fields */
da9bb1d2
AC
1294 mci->csrows = csi;
1295 mci->pvt_info = pvt;
1296 mci->nr_csrows = nr_csrows;
1297
1298 for (row = 0; row < nr_csrows; row++) {
1299 csrow = &csi[row];
1300 csrow->csrow_idx = row;
1301 csrow->mci = mci;
1302 csrow->nr_channels = nr_chans;
1303 chp = &chi[row * nr_chans];
1304 csrow->channels = chp;
1305
1306 for (chn = 0; chn < nr_chans; chn++) {
1307 chan = &chp[chn];
1308 chan->chan_idx = chn;
1309 chan->csrow = csrow;
1310 }
1311 }
1312
1313 return mci;
1314}
9110540f 1315EXPORT_SYMBOL_GPL(edac_mc_alloc);
da9bb1d2 1316
da9bb1d2
AC
1317/**
1318 * edac_mc_free: Free a previously allocated 'mci' structure
1319 * @mci: pointer to a struct mem_ctl_info structure
da9bb1d2
AC
1320 */
1321void edac_mc_free(struct mem_ctl_info *mci)
1322{
472678eb 1323 kfree(mci);
da9bb1d2 1324}
9110540f 1325EXPORT_SYMBOL_GPL(edac_mc_free);
da9bb1d2 1326
37f04581 1327static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
da9bb1d2
AC
1328{
1329 struct mem_ctl_info *mci;
1330 struct list_head *item;
1331
537fba28 1332 debugf3("%s()\n", __func__);
da9bb1d2
AC
1333
1334 list_for_each(item, &mc_devices) {
1335 mci = list_entry(item, struct mem_ctl_info, link);
1336
37f04581 1337 if (mci->dev == dev)
da9bb1d2
AC
1338 return mci;
1339 }
1340
1341 return NULL;
1342}
1343
2d7bbb91
DT
1344/* Return 0 on success, 1 on failure.
1345 * Before calling this function, caller must
1346 * assign a unique value to mci->mc_idx.
1347 */
1348static int add_mc_to_global_list (struct mem_ctl_info *mci)
da9bb1d2
AC
1349{
1350 struct list_head *item, *insert_before;
1351 struct mem_ctl_info *p;
da9bb1d2 1352
2d7bbb91 1353 insert_before = &mc_devices;
da9bb1d2 1354
2d7bbb91
DT
1355 if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
1356 goto fail0;
da9bb1d2 1357
2d7bbb91
DT
1358 list_for_each(item, &mc_devices) {
1359 p = list_entry(item, struct mem_ctl_info, link);
da9bb1d2 1360
2d7bbb91
DT
1361 if (p->mc_idx >= mci->mc_idx) {
1362 if (unlikely(p->mc_idx == mci->mc_idx))
1363 goto fail1;
da9bb1d2 1364
2d7bbb91
DT
1365 insert_before = item;
1366 break;
da9bb1d2 1367 }
da9bb1d2
AC
1368 }
1369
1370 list_add_tail_rcu(&mci->link, insert_before);
1371 return 0;
2d7bbb91
DT
1372
1373fail0:
1374 edac_printk(KERN_WARNING, EDAC_MC,
1375 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
1376 dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
1377 return 1;
1378
1379fail1:
1380 edac_printk(KERN_WARNING, EDAC_MC,
1381 "bug in low-level driver: attempt to assign\n"
1382 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
1383 return 1;
da9bb1d2
AC
1384}
1385
e7ecd891 1386static void complete_mc_list_del(struct rcu_head *head)
a1d03fcc
DP
1387{
1388 struct mem_ctl_info *mci;
1389
1390 mci = container_of(head, struct mem_ctl_info, rcu);
1391 INIT_LIST_HEAD(&mci->link);
1392 complete(&mci->complete);
1393}
1394
e7ecd891 1395static void del_mc_from_global_list(struct mem_ctl_info *mci)
a1d03fcc
DP
1396{
1397 list_del_rcu(&mci->link);
1398 init_completion(&mci->complete);
1399 call_rcu(&mci->rcu, complete_mc_list_del);
1400 wait_for_completion(&mci->complete);
1401}
1402
da9bb1d2 1403/**
472678eb
DP
1404 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
1405 * create sysfs entries associated with mci structure
da9bb1d2 1406 * @mci: pointer to the mci structure to be added to the list
2d7bbb91 1407 * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
da9bb1d2
AC
1408 *
1409 * Return:
1410 * 0 Success
1411 * !0 Failure
1412 */
1413
1414/* FIXME - should a warning be printed if no error detection? correction? */
2d7bbb91 1415int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
da9bb1d2 1416{
537fba28 1417 debugf0("%s()\n", __func__);
2d7bbb91 1418 mci->mc_idx = mc_idx;
da9bb1d2
AC
1419#ifdef CONFIG_EDAC_DEBUG
1420 if (edac_debug_level >= 3)
1421 edac_mc_dump_mci(mci);
e7ecd891 1422
da9bb1d2
AC
1423 if (edac_debug_level >= 4) {
1424 int i;
1425
1426 for (i = 0; i < mci->nr_csrows; i++) {
1427 int j;
e7ecd891 1428
da9bb1d2
AC
1429 edac_mc_dump_csrow(&mci->csrows[i]);
1430 for (j = 0; j < mci->csrows[i].nr_channels; j++)
e7ecd891
DP
1431 edac_mc_dump_channel(
1432 &mci->csrows[i].channels[j]);
da9bb1d2
AC
1433 }
1434 }
1435#endif
1436 down(&mem_ctls_mutex);
1437
1438 if (add_mc_to_global_list(mci))
028a7b6d 1439 goto fail0;
da9bb1d2
AC
1440
1441 /* set load time so that error rate can be tracked */
1442 mci->start_time = jiffies;
1443
1444 if (edac_create_sysfs_mci_device(mci)) {
537fba28
DP
1445 edac_mc_printk(mci, KERN_WARNING,
1446 "failed to create sysfs device\n");
028a7b6d 1447 goto fail1;
da9bb1d2
AC
1448 }
1449
1450 /* Report action taken */
37f04581
DT
1451 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
1452 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
da9bb1d2 1453
028a7b6d
DP
1454 up(&mem_ctls_mutex);
1455 return 0;
da9bb1d2 1456
028a7b6d
DP
1457fail1:
1458 del_mc_from_global_list(mci);
1459
1460fail0:
da9bb1d2 1461 up(&mem_ctls_mutex);
028a7b6d 1462 return 1;
da9bb1d2 1463}
9110540f 1464EXPORT_SYMBOL_GPL(edac_mc_add_mc);
da9bb1d2 1465
da9bb1d2 1466/**
472678eb
DP
1467 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
1468 * remove mci structure from global list
37f04581 1469 * @pdev: Pointer to 'struct device' representing mci structure to remove.
da9bb1d2 1470 *
18dbc337 1471 * Return pointer to removed mci structure, or NULL if device not found.
da9bb1d2 1472 */
37f04581 1473struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
da9bb1d2 1474{
18dbc337 1475 struct mem_ctl_info *mci;
da9bb1d2 1476
18dbc337 1477 debugf0("MC: %s()\n", __func__);
da9bb1d2 1478 down(&mem_ctls_mutex);
18dbc337 1479
37f04581 1480 if ((mci = find_mci_by_dev(dev)) == NULL) {
18dbc337
DP
1481 up(&mem_ctls_mutex);
1482 return NULL;
1483 }
1484
1485 edac_remove_sysfs_mci_device(mci);
da9bb1d2 1486 del_mc_from_global_list(mci);
18dbc337 1487 up(&mem_ctls_mutex);
537fba28 1488 edac_printk(KERN_INFO, EDAC_MC,
37f04581
DT
1489 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
1490 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
18dbc337 1491 return mci;
da9bb1d2 1492}
9110540f 1493EXPORT_SYMBOL_GPL(edac_mc_del_mc);
da9bb1d2 1494
e7ecd891 1495void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
da9bb1d2
AC
1496{
1497 struct page *pg;
1498 void *virt_addr;
1499 unsigned long flags = 0;
1500
537fba28 1501 debugf3("%s()\n", __func__);
da9bb1d2
AC
1502
1503 /* ECC error page was not in our memory. Ignore it. */
1504 if(!pfn_valid(page))
1505 return;
1506
1507 /* Find the actual page structure then map it and fix */
1508 pg = pfn_to_page(page);
1509
1510 if (PageHighMem(pg))
1511 local_irq_save(flags);
1512
1513 virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
1514
1515 /* Perform architecture specific atomic scrub operation */
1516 atomic_scrub(virt_addr + offset, size);
1517
1518 /* Unmap and complete */
1519 kunmap_atomic(virt_addr, KM_BOUNCE_READ);
1520
1521 if (PageHighMem(pg))
1522 local_irq_restore(flags);
1523}
9110540f 1524EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
da9bb1d2 1525
da9bb1d2 1526/* FIXME - should return -1 */
e7ecd891 1527int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
da9bb1d2
AC
1528{
1529 struct csrow_info *csrows = mci->csrows;
1530 int row, i;
1531
537fba28 1532 debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
da9bb1d2
AC
1533 row = -1;
1534
1535 for (i = 0; i < mci->nr_csrows; i++) {
1536 struct csrow_info *csrow = &csrows[i];
1537
1538 if (csrow->nr_pages == 0)
1539 continue;
1540
537fba28
DP
1541 debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
1542 "mask(0x%lx)\n", mci->mc_idx, __func__,
1543 csrow->first_page, page, csrow->last_page,
1544 csrow->page_mask);
da9bb1d2
AC
1545
1546 if ((page >= csrow->first_page) &&
1547 (page <= csrow->last_page) &&
1548 ((page & csrow->page_mask) ==
1549 (csrow->first_page & csrow->page_mask))) {
1550 row = i;
1551 break;
1552 }
1553 }
1554
1555 if (row == -1)
537fba28
DP
1556 edac_mc_printk(mci, KERN_ERR,
1557 "could not look up page error address %lx\n",
1558 (unsigned long) page);
da9bb1d2
AC
1559
1560 return row;
1561}
9110540f 1562EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
da9bb1d2 1563
da9bb1d2
AC
1564/* FIXME - setable log (warning/emerg) levels */
1565/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
1566void edac_mc_handle_ce(struct mem_ctl_info *mci,
e7ecd891
DP
1567 unsigned long page_frame_number, unsigned long offset_in_page,
1568 unsigned long syndrome, int row, int channel, const char *msg)
da9bb1d2
AC
1569{
1570 unsigned long remapped_page;
1571
537fba28 1572 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
da9bb1d2
AC
1573
1574 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1575 if (row >= mci->nr_csrows || row < 0) {
1576 /* something is wrong */
537fba28
DP
1577 edac_mc_printk(mci, KERN_ERR,
1578 "INTERNAL ERROR: row out of range "
1579 "(%d >= %d)\n", row, mci->nr_csrows);
da9bb1d2
AC
1580 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1581 return;
1582 }
e7ecd891 1583
da9bb1d2
AC
1584 if (channel >= mci->csrows[row].nr_channels || channel < 0) {
1585 /* something is wrong */
537fba28
DP
1586 edac_mc_printk(mci, KERN_ERR,
1587 "INTERNAL ERROR: channel out of range "
1588 "(%d >= %d)\n", channel,
1589 mci->csrows[row].nr_channels);
da9bb1d2
AC
1590 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1591 return;
1592 }
1593
1594 if (log_ce)
1595 /* FIXME - put in DIMM location */
537fba28
DP
1596 edac_mc_printk(mci, KERN_WARNING,
1597 "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
1598 "0x%lx, row %d, channel %d, label \"%s\": %s\n",
1599 page_frame_number, offset_in_page,
1600 mci->csrows[row].grain, syndrome, row, channel,
1601 mci->csrows[row].channels[channel].label, msg);
da9bb1d2
AC
1602
1603 mci->ce_count++;
1604 mci->csrows[row].ce_count++;
1605 mci->csrows[row].channels[channel].ce_count++;
1606
1607 if (mci->scrub_mode & SCRUB_SW_SRC) {
1608 /*
1609 * Some MC's can remap memory so that it is still available
1610 * at a different address when PCI devices map into memory.
1611 * MC's that can't do this lose the memory where PCI devices
1612 * are mapped. This mapping is MC dependant and so we call
1613 * back into the MC driver for it to map the MC page to
1614 * a physical (CPU) page which can then be mapped to a virtual
1615 * page - which can then be scrubbed.
1616 */
1617 remapped_page = mci->ctl_page_to_phys ?
1618 mci->ctl_page_to_phys(mci, page_frame_number) :
1619 page_frame_number;
1620
1621 edac_mc_scrub_block(remapped_page, offset_in_page,
e7ecd891 1622 mci->csrows[row].grain);
da9bb1d2
AC
1623 }
1624}
9110540f 1625EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
da9bb1d2 1626
e7ecd891 1627void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
da9bb1d2
AC
1628{
1629 if (log_ce)
537fba28
DP
1630 edac_mc_printk(mci, KERN_WARNING,
1631 "CE - no information available: %s\n", msg);
e7ecd891 1632
da9bb1d2
AC
1633 mci->ce_noinfo_count++;
1634 mci->ce_count++;
1635}
9110540f 1636EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
da9bb1d2 1637
da9bb1d2 1638void edac_mc_handle_ue(struct mem_ctl_info *mci,
e7ecd891
DP
1639 unsigned long page_frame_number, unsigned long offset_in_page,
1640 int row, const char *msg)
da9bb1d2
AC
1641{
1642 int len = EDAC_MC_LABEL_LEN * 4;
1643 char labels[len + 1];
1644 char *pos = labels;
1645 int chan;
1646 int chars;
1647
537fba28 1648 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
da9bb1d2
AC
1649
1650 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1651 if (row >= mci->nr_csrows || row < 0) {
1652 /* something is wrong */
537fba28
DP
1653 edac_mc_printk(mci, KERN_ERR,
1654 "INTERNAL ERROR: row out of range "
1655 "(%d >= %d)\n", row, mci->nr_csrows);
da9bb1d2
AC
1656 edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
1657 return;
1658 }
1659
1660 chars = snprintf(pos, len + 1, "%s",
e7ecd891 1661 mci->csrows[row].channels[0].label);
da9bb1d2
AC
1662 len -= chars;
1663 pos += chars;
e7ecd891 1664
da9bb1d2
AC
1665 for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
1666 chan++) {
1667 chars = snprintf(pos, len + 1, ":%s",
e7ecd891 1668 mci->csrows[row].channels[chan].label);
da9bb1d2
AC
1669 len -= chars;
1670 pos += chars;
1671 }
1672
1673 if (log_ue)
537fba28
DP
1674 edac_mc_printk(mci, KERN_EMERG,
1675 "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
1676 "labels \"%s\": %s\n", page_frame_number,
1677 offset_in_page, mci->csrows[row].grain, row, labels,
1678 msg);
da9bb1d2
AC
1679
1680 if (panic_on_ue)
e7ecd891
DP
1681 panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
1682 "row %d, labels \"%s\": %s\n", mci->mc_idx,
1683 page_frame_number, offset_in_page,
1684 mci->csrows[row].grain, row, labels, msg);
da9bb1d2
AC
1685
1686 mci->ue_count++;
1687 mci->csrows[row].ue_count++;
1688}
9110540f 1689EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
da9bb1d2 1690
e7ecd891 1691void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
da9bb1d2
AC
1692{
1693 if (panic_on_ue)
1694 panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
1695
1696 if (log_ue)
537fba28
DP
1697 edac_mc_printk(mci, KERN_WARNING,
1698 "UE - no information available: %s\n", msg);
da9bb1d2
AC
1699 mci->ue_noinfo_count++;
1700 mci->ue_count++;
1701}
9110540f 1702EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
da9bb1d2 1703
da9bb1d2
AC
1704
1705/*
1706 * Iterate over all MC instances and check for ECC, et al, errors
1707 */
e7ecd891 1708static inline void check_mc_devices(void)
da9bb1d2 1709{
da9bb1d2
AC
1710 struct list_head *item;
1711 struct mem_ctl_info *mci;
1712
537fba28 1713 debugf3("%s()\n", __func__);
18dbc337 1714 down(&mem_ctls_mutex);
da9bb1d2
AC
1715
1716 list_for_each(item, &mc_devices) {
1717 mci = list_entry(item, struct mem_ctl_info, link);
1718
1719 if (mci->edac_check != NULL)
1720 mci->edac_check(mci);
1721 }
1722
18dbc337 1723 up(&mem_ctls_mutex);
da9bb1d2
AC
1724}
1725
da9bb1d2
AC
1726/*
1727 * Check MC status every poll_msec.
1728 * Check PCI status every poll_msec as well.
1729 *
1730 * This where the work gets done for edac.
1731 *
1732 * SMP safe, doesn't use NMI, and auto-rate-limits.
1733 */
1734static void do_edac_check(void)
1735{
537fba28 1736 debugf3("%s()\n", __func__);
da9bb1d2 1737 check_mc_devices();
da9bb1d2
AC
1738 do_pci_parity_check();
1739}
1740
da9bb1d2
AC
1741static int edac_kernel_thread(void *arg)
1742{
f2fe42ab
DP
1743 while (!kthread_should_stop()) {
1744 do_edac_check();
da9bb1d2
AC
1745
1746 /* goto sleep for the interval */
f2fe42ab 1747 schedule_timeout_interruptible((HZ * poll_msec) / 1000);
da9bb1d2
AC
1748 try_to_freeze();
1749 }
1750
da9bb1d2
AC
1751 return 0;
1752}
1753
1754/*
1755 * edac_mc_init
1756 * module initialization entry point
1757 */
1758static int __init edac_mc_init(void)
1759{
537fba28 1760 edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
da9bb1d2
AC
1761
1762 /*
1763 * Harvest and clear any boot/initialization PCI parity errors
1764 *
1765 * FIXME: This only clears errors logged by devices present at time of
1766 * module initialization. We should also do an initial clear
1767 * of each newly hotplugged device.
1768 */
1769 clear_pci_parity_errors();
1770
7f927fcc 1771 /* Create the MC sysfs entries */
da9bb1d2 1772 if (edac_sysfs_memctrl_setup()) {
537fba28
DP
1773 edac_printk(KERN_ERR, EDAC_MC,
1774 "Error initializing sysfs code\n");
da9bb1d2
AC
1775 return -ENODEV;
1776 }
1777
1778 /* Create the PCI parity sysfs entries */
1779 if (edac_sysfs_pci_setup()) {
1780 edac_sysfs_memctrl_teardown();
537fba28
DP
1781 edac_printk(KERN_ERR, EDAC_MC,
1782 "EDAC PCI: Error initializing sysfs code\n");
da9bb1d2
AC
1783 return -ENODEV;
1784 }
1785
da9bb1d2 1786 /* create our kernel thread */
f2fe42ab 1787 edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
e7ecd891 1788
f2fe42ab 1789 if (IS_ERR(edac_thread)) {
da9bb1d2
AC
1790 /* remove the sysfs entries */
1791 edac_sysfs_memctrl_teardown();
1792 edac_sysfs_pci_teardown();
f2fe42ab 1793 return PTR_ERR(edac_thread);
da9bb1d2
AC
1794 }
1795
da9bb1d2
AC
1796 return 0;
1797}
1798
da9bb1d2
AC
1799/*
1800 * edac_mc_exit()
1801 * module exit/termination functioni
1802 */
1803static void __exit edac_mc_exit(void)
1804{
537fba28 1805 debugf0("%s()\n", __func__);
f2fe42ab 1806 kthread_stop(edac_thread);
da9bb1d2
AC
1807
1808 /* tear down the sysfs device */
1809 edac_sysfs_memctrl_teardown();
1810 edac_sysfs_pci_teardown();
1811}
1812
da9bb1d2
AC
1813module_init(edac_mc_init);
1814module_exit(edac_mc_exit);
1815
1816MODULE_LICENSE("GPL");
1817MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
e7ecd891 1818 "Based on work by Dan Hollis et al");
da9bb1d2
AC
1819MODULE_DESCRIPTION("Core library routines for MC reporting");
1820
1821module_param(panic_on_ue, int, 0644);
1822MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
37f04581 1823#ifdef CONFIG_PCI
da9bb1d2
AC
1824module_param(check_pci_parity, int, 0644);
1825MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
1826module_param(panic_on_pci_parity, int, 0644);
1827MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
37f04581 1828#endif
da9bb1d2
AC
1829module_param(log_ue, int, 0644);
1830MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
1831module_param(log_ce, int, 0644);
1832MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
1833module_param(poll_msec, int, 0644);
1834MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
1835#ifdef CONFIG_EDAC_DEBUG
1836module_param(edac_debug_level, int, 0644);
1837MODULE_PARM_DESC(edac_debug_level, "Debug level");
1838#endif