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Commit | Line | Data |
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da9bb1d2 AC |
1 | /* |
2 | * edac_mc kernel module | |
3 | * (C) 2005 Linux Networx (http://lnxi.com) | |
4 | * This file may be distributed under the terms of the | |
5 | * GNU General Public License. | |
6 | * | |
7 | * Written by Thayne Harbaugh | |
8 | * Based on work by Dan Hollis <goemon at anime dot net> and others. | |
9 | * http://www.anime.net/~goemon/linux-ecc/ | |
10 | * | |
11 | * Modified by Dave Peterson and Doug Thompson | |
12 | * | |
13 | */ | |
14 | ||
da9bb1d2 | 15 | #include <linux/config.h> |
da9bb1d2 AC |
16 | #include <linux/module.h> |
17 | #include <linux/proc_fs.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/types.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/sysctl.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/timer.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/jiffies.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/list.h> | |
29 | #include <linux/sysdev.h> | |
30 | #include <linux/ctype.h> | |
f2fe42ab | 31 | #include <linux/kthread.h> |
da9bb1d2 AC |
32 | #include <asm/uaccess.h> |
33 | #include <asm/page.h> | |
34 | #include <asm/edac.h> | |
da9bb1d2 AC |
35 | #include "edac_mc.h" |
36 | ||
e7ecd891 | 37 | #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__ |
da9bb1d2 | 38 | |
ceb2ca9c DP |
39 | /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC |
40 | * presents to user space needs more thought, and is likely to change | |
41 | * substantially. | |
42 | */ | |
43 | #define DISABLE_EDAC_SYSFS | |
44 | ||
da9bb1d2 AC |
45 | #ifdef CONFIG_EDAC_DEBUG |
46 | /* Values of 0 to 4 will generate output */ | |
47 | int edac_debug_level = 1; | |
9110540f | 48 | EXPORT_SYMBOL_GPL(edac_debug_level); |
da9bb1d2 AC |
49 | #endif |
50 | ||
51 | /* EDAC Controls, setable by module parameter, and sysfs */ | |
52 | static int log_ue = 1; | |
53 | static int log_ce = 1; | |
ceb2ca9c | 54 | static int panic_on_ue; |
da9bb1d2 AC |
55 | static int poll_msec = 1000; |
56 | ||
da9bb1d2 AC |
57 | /* lock to memory controller's control array */ |
58 | static DECLARE_MUTEX(mem_ctls_mutex); | |
59 | static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices); | |
60 | ||
f2fe42ab DP |
61 | static struct task_struct *edac_thread; |
62 | ||
37f04581 DT |
63 | #ifdef CONFIG_PCI |
64 | static int check_pci_parity = 0; /* default YES check PCI parity */ | |
65 | static int panic_on_pci_parity; /* default no panic on PCI Parity */ | |
66 | static atomic_t pci_parity_count = ATOMIC_INIT(0); | |
67 | ||
da9bb1d2 AC |
68 | /* Structure of the whitelist and blacklist arrays */ |
69 | struct edac_pci_device_list { | |
70 | unsigned int vendor; /* Vendor ID */ | |
71 | unsigned int device; /* Deviice ID */ | |
72 | }; | |
73 | ||
da9bb1d2 AC |
74 | #define MAX_LISTED_PCI_DEVICES 32 |
75 | ||
76 | /* List of PCI devices (vendor-id:device-id) that should be skipped */ | |
77 | static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES]; | |
78 | static int pci_blacklist_count; | |
79 | ||
80 | /* List of PCI devices (vendor-id:device-id) that should be scanned */ | |
81 | static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES]; | |
82 | static int pci_whitelist_count ; | |
83 | ||
37f04581 DT |
84 | #ifndef DISABLE_EDAC_SYSFS |
85 | static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */ | |
86 | static struct completion edac_pci_kobj_complete; | |
87 | #endif /* DISABLE_EDAC_SYSFS */ | |
88 | #endif /* CONFIG_PCI */ | |
89 | ||
da9bb1d2 AC |
90 | /* START sysfs data and methods */ |
91 | ||
ceb2ca9c DP |
92 | #ifndef DISABLE_EDAC_SYSFS |
93 | ||
da9bb1d2 AC |
94 | static const char *mem_types[] = { |
95 | [MEM_EMPTY] = "Empty", | |
96 | [MEM_RESERVED] = "Reserved", | |
97 | [MEM_UNKNOWN] = "Unknown", | |
98 | [MEM_FPM] = "FPM", | |
99 | [MEM_EDO] = "EDO", | |
100 | [MEM_BEDO] = "BEDO", | |
101 | [MEM_SDR] = "Unbuffered-SDR", | |
102 | [MEM_RDR] = "Registered-SDR", | |
103 | [MEM_DDR] = "Unbuffered-DDR", | |
104 | [MEM_RDDR] = "Registered-DDR", | |
105 | [MEM_RMBS] = "RMBS" | |
106 | }; | |
107 | ||
108 | static const char *dev_types[] = { | |
109 | [DEV_UNKNOWN] = "Unknown", | |
110 | [DEV_X1] = "x1", | |
111 | [DEV_X2] = "x2", | |
112 | [DEV_X4] = "x4", | |
113 | [DEV_X8] = "x8", | |
114 | [DEV_X16] = "x16", | |
115 | [DEV_X32] = "x32", | |
116 | [DEV_X64] = "x64" | |
117 | }; | |
118 | ||
119 | static const char *edac_caps[] = { | |
120 | [EDAC_UNKNOWN] = "Unknown", | |
121 | [EDAC_NONE] = "None", | |
122 | [EDAC_RESERVED] = "Reserved", | |
123 | [EDAC_PARITY] = "PARITY", | |
124 | [EDAC_EC] = "EC", | |
125 | [EDAC_SECDED] = "SECDED", | |
126 | [EDAC_S2ECD2ED] = "S2ECD2ED", | |
127 | [EDAC_S4ECD4ED] = "S4ECD4ED", | |
128 | [EDAC_S8ECD8ED] = "S8ECD8ED", | |
129 | [EDAC_S16ECD16ED] = "S16ECD16ED" | |
130 | }; | |
131 | ||
da9bb1d2 AC |
132 | /* sysfs object: /sys/devices/system/edac */ |
133 | static struct sysdev_class edac_class = { | |
134 | set_kset_name("edac"), | |
135 | }; | |
136 | ||
37f04581 | 137 | /* sysfs object: |
da9bb1d2 | 138 | * /sys/devices/system/edac/mc |
da9bb1d2 AC |
139 | */ |
140 | static struct kobject edac_memctrl_kobj; | |
da9bb1d2 | 141 | |
472678eb DP |
142 | /* We use these to wait for the reference counts on edac_memctrl_kobj and |
143 | * edac_pci_kobj to reach 0. | |
144 | */ | |
145 | static struct completion edac_memctrl_kobj_complete; | |
472678eb | 146 | |
da9bb1d2 AC |
147 | /* |
148 | * /sys/devices/system/edac/mc; | |
e7ecd891 | 149 | * data structures and methods |
da9bb1d2 | 150 | */ |
4136cabf | 151 | #if 0 |
da9bb1d2 AC |
152 | static ssize_t memctrl_string_show(void *ptr, char *buffer) |
153 | { | |
154 | char *value = (char*) ptr; | |
155 | return sprintf(buffer, "%s\n", value); | |
156 | } | |
4136cabf | 157 | #endif |
da9bb1d2 AC |
158 | |
159 | static ssize_t memctrl_int_show(void *ptr, char *buffer) | |
160 | { | |
161 | int *value = (int*) ptr; | |
162 | return sprintf(buffer, "%d\n", *value); | |
163 | } | |
164 | ||
165 | static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count) | |
166 | { | |
167 | int *value = (int*) ptr; | |
168 | ||
169 | if (isdigit(*buffer)) | |
170 | *value = simple_strtoul(buffer, NULL, 0); | |
171 | ||
172 | return count; | |
173 | } | |
174 | ||
175 | struct memctrl_dev_attribute { | |
e7ecd891 DP |
176 | struct attribute attr; |
177 | void *value; | |
da9bb1d2 AC |
178 | ssize_t (*show)(void *,char *); |
179 | ssize_t (*store)(void *, const char *, size_t); | |
180 | }; | |
181 | ||
182 | /* Set of show/store abstract level functions for memory control object */ | |
e7ecd891 DP |
183 | static ssize_t memctrl_dev_show(struct kobject *kobj, |
184 | struct attribute *attr, char *buffer) | |
da9bb1d2 AC |
185 | { |
186 | struct memctrl_dev_attribute *memctrl_dev; | |
187 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
188 | ||
189 | if (memctrl_dev->show) | |
190 | return memctrl_dev->show(memctrl_dev->value, buffer); | |
e7ecd891 | 191 | |
da9bb1d2 AC |
192 | return -EIO; |
193 | } | |
194 | ||
e7ecd891 DP |
195 | static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr, |
196 | const char *buffer, size_t count) | |
da9bb1d2 AC |
197 | { |
198 | struct memctrl_dev_attribute *memctrl_dev; | |
199 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
200 | ||
201 | if (memctrl_dev->store) | |
202 | return memctrl_dev->store(memctrl_dev->value, buffer, count); | |
e7ecd891 | 203 | |
da9bb1d2 AC |
204 | return -EIO; |
205 | } | |
206 | ||
207 | static struct sysfs_ops memctrlfs_ops = { | |
208 | .show = memctrl_dev_show, | |
209 | .store = memctrl_dev_store | |
210 | }; | |
211 | ||
212 | #define MEMCTRL_ATTR(_name,_mode,_show,_store) \ | |
213 | struct memctrl_dev_attribute attr_##_name = { \ | |
214 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
215 | .value = &_name, \ | |
216 | .show = _show, \ | |
217 | .store = _store, \ | |
218 | }; | |
219 | ||
220 | #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
221 | struct memctrl_dev_attribute attr_##_name = { \ | |
222 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
223 | .value = _data, \ | |
224 | .show = _show, \ | |
225 | .store = _store, \ | |
226 | }; | |
227 | ||
228 | /* cwrow<id> attribute f*/ | |
4136cabf | 229 | #if 0 |
da9bb1d2 | 230 | MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL); |
4136cabf | 231 | #endif |
da9bb1d2 AC |
232 | |
233 | /* csrow<id> control files */ | |
234 | MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
235 | MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
236 | MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
237 | MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
238 | ||
da9bb1d2 AC |
239 | /* Base Attributes of the memory ECC object */ |
240 | static struct memctrl_dev_attribute *memctrl_attr[] = { | |
241 | &attr_panic_on_ue, | |
242 | &attr_log_ue, | |
243 | &attr_log_ce, | |
244 | &attr_poll_msec, | |
da9bb1d2 AC |
245 | NULL, |
246 | }; | |
247 | ||
248 | /* Main MC kobject release() function */ | |
249 | static void edac_memctrl_master_release(struct kobject *kobj) | |
250 | { | |
537fba28 | 251 | debugf1("%s()\n", __func__); |
472678eb | 252 | complete(&edac_memctrl_kobj_complete); |
da9bb1d2 AC |
253 | } |
254 | ||
255 | static struct kobj_type ktype_memctrl = { | |
e7ecd891 DP |
256 | .release = edac_memctrl_master_release, |
257 | .sysfs_ops = &memctrlfs_ops, | |
258 | .default_attrs = (struct attribute **) memctrl_attr, | |
da9bb1d2 AC |
259 | }; |
260 | ||
ceb2ca9c | 261 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
262 | |
263 | /* Initialize the main sysfs entries for edac: | |
264 | * /sys/devices/system/edac | |
265 | * | |
266 | * and children | |
267 | * | |
268 | * Return: 0 SUCCESS | |
269 | * !0 FAILURE | |
270 | */ | |
271 | static int edac_sysfs_memctrl_setup(void) | |
ceb2ca9c DP |
272 | #ifdef DISABLE_EDAC_SYSFS |
273 | { | |
274 | return 0; | |
275 | } | |
276 | #else | |
da9bb1d2 AC |
277 | { |
278 | int err=0; | |
279 | ||
537fba28 | 280 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
281 | |
282 | /* create the /sys/devices/system/edac directory */ | |
283 | err = sysdev_class_register(&edac_class); | |
e7ecd891 | 284 | |
da9bb1d2 AC |
285 | if (!err) { |
286 | /* Init the MC's kobject */ | |
287 | memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj)); | |
da9bb1d2 AC |
288 | edac_memctrl_kobj.parent = &edac_class.kset.kobj; |
289 | edac_memctrl_kobj.ktype = &ktype_memctrl; | |
290 | ||
291 | /* generate sysfs "..../edac/mc" */ | |
292 | err = kobject_set_name(&edac_memctrl_kobj,"mc"); | |
e7ecd891 | 293 | |
da9bb1d2 AC |
294 | if (!err) { |
295 | /* FIXME: maybe new sysdev_create_subdir() */ | |
296 | err = kobject_register(&edac_memctrl_kobj); | |
e7ecd891 DP |
297 | |
298 | if (err) | |
da9bb1d2 | 299 | debugf1("Failed to register '.../edac/mc'\n"); |
e7ecd891 | 300 | else |
da9bb1d2 | 301 | debugf1("Registered '.../edac/mc' kobject\n"); |
da9bb1d2 | 302 | } |
e7ecd891 | 303 | } else |
537fba28 | 304 | debugf1("%s() error=%d\n", __func__, err); |
da9bb1d2 AC |
305 | |
306 | return err; | |
307 | } | |
ceb2ca9c | 308 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
309 | |
310 | /* | |
311 | * MC teardown: | |
312 | * the '..../edac/mc' kobject followed by '..../edac' itself | |
313 | */ | |
314 | static void edac_sysfs_memctrl_teardown(void) | |
315 | { | |
ceb2ca9c | 316 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
317 | debugf0("MC: " __FILE__ ": %s()\n", __func__); |
318 | ||
472678eb DP |
319 | /* Unregister the MC's kobject and wait for reference count to reach |
320 | * 0. | |
321 | */ | |
322 | init_completion(&edac_memctrl_kobj_complete); | |
da9bb1d2 | 323 | kobject_unregister(&edac_memctrl_kobj); |
472678eb | 324 | wait_for_completion(&edac_memctrl_kobj_complete); |
da9bb1d2 | 325 | |
da9bb1d2 AC |
326 | /* Unregister the 'edac' object */ |
327 | sysdev_class_unregister(&edac_class); | |
ceb2ca9c | 328 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
329 | } |
330 | ||
37f04581 DT |
331 | #ifdef CONFIG_PCI |
332 | ||
ceb2ca9c DP |
333 | #ifndef DISABLE_EDAC_SYSFS |
334 | ||
da9bb1d2 AC |
335 | /* |
336 | * /sys/devices/system/edac/pci; | |
337 | * data structures and methods | |
338 | */ | |
339 | ||
340 | struct list_control { | |
341 | struct edac_pci_device_list *list; | |
342 | int *count; | |
343 | }; | |
344 | ||
4136cabf | 345 | #if 0 |
da9bb1d2 AC |
346 | /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */ |
347 | static ssize_t edac_pci_list_string_show(void *ptr, char *buffer) | |
348 | { | |
349 | struct list_control *listctl; | |
350 | struct edac_pci_device_list *list; | |
351 | char *p = buffer; | |
352 | int len=0; | |
353 | int i; | |
354 | ||
355 | listctl = ptr; | |
356 | list = listctl->list; | |
357 | ||
358 | for (i = 0; i < *(listctl->count); i++, list++ ) { | |
359 | if (len > 0) | |
360 | len += snprintf(p + len, (PAGE_SIZE-len), ","); | |
361 | ||
362 | len += snprintf(p + len, | |
363 | (PAGE_SIZE-len), | |
364 | "%x:%x", | |
365 | list->vendor,list->device); | |
366 | } | |
367 | ||
368 | len += snprintf(p + len,(PAGE_SIZE-len), "\n"); | |
da9bb1d2 AC |
369 | return (ssize_t) len; |
370 | } | |
371 | ||
372 | /** | |
373 | * | |
374 | * Scan string from **s to **e looking for one 'vendor:device' tuple | |
375 | * where each field is a hex value | |
376 | * | |
377 | * return 0 if an entry is NOT found | |
378 | * return 1 if an entry is found | |
379 | * fill in *vendor_id and *device_id with values found | |
380 | * | |
381 | * In both cases, make sure *s has been moved forward toward *e | |
382 | */ | |
383 | static int parse_one_device(const char **s,const char **e, | |
384 | unsigned int *vendor_id, unsigned int *device_id) | |
385 | { | |
386 | const char *runner, *p; | |
387 | ||
388 | /* if null byte, we are done */ | |
389 | if (!**s) { | |
e7ecd891 | 390 | (*s)++; /* keep *s moving */ |
da9bb1d2 AC |
391 | return 0; |
392 | } | |
393 | ||
394 | /* skip over newlines & whitespace */ | |
395 | if ((**s == '\n') || isspace(**s)) { | |
396 | (*s)++; | |
397 | return 0; | |
398 | } | |
399 | ||
400 | if (!isxdigit(**s)) { | |
401 | (*s)++; | |
402 | return 0; | |
403 | } | |
404 | ||
405 | /* parse vendor_id */ | |
406 | runner = *s; | |
e7ecd891 | 407 | |
da9bb1d2 AC |
408 | while (runner < *e) { |
409 | /* scan for vendor:device delimiter */ | |
410 | if (*runner == ':') { | |
411 | *vendor_id = simple_strtol((char*) *s, (char**) &p, 16); | |
412 | runner = p + 1; | |
413 | break; | |
414 | } | |
e7ecd891 | 415 | |
da9bb1d2 AC |
416 | runner++; |
417 | } | |
418 | ||
419 | if (!isxdigit(*runner)) { | |
420 | *s = ++runner; | |
421 | return 0; | |
422 | } | |
423 | ||
424 | /* parse device_id */ | |
425 | if (runner < *e) { | |
426 | *device_id = simple_strtol((char*)runner, (char**)&p, 16); | |
427 | runner = p; | |
428 | } | |
429 | ||
430 | *s = runner; | |
da9bb1d2 AC |
431 | return 1; |
432 | } | |
433 | ||
434 | static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer, | |
e7ecd891 | 435 | size_t count) |
da9bb1d2 AC |
436 | { |
437 | struct list_control *listctl; | |
438 | struct edac_pci_device_list *list; | |
439 | unsigned int vendor_id, device_id; | |
440 | const char *s, *e; | |
441 | int *index; | |
442 | ||
443 | s = (char*)buffer; | |
444 | e = s + count; | |
da9bb1d2 AC |
445 | listctl = ptr; |
446 | list = listctl->list; | |
447 | index = listctl->count; | |
da9bb1d2 | 448 | *index = 0; |
da9bb1d2 | 449 | |
e7ecd891 | 450 | while (*index < MAX_LISTED_PCI_DEVICES) { |
da9bb1d2 AC |
451 | if (parse_one_device(&s,&e,&vendor_id,&device_id)) { |
452 | list[ *index ].vendor = vendor_id; | |
453 | list[ *index ].device = device_id; | |
454 | (*index)++; | |
455 | } | |
456 | ||
457 | /* check for all data consume */ | |
458 | if (s >= e) | |
459 | break; | |
460 | } | |
461 | ||
462 | return count; | |
463 | } | |
464 | ||
4136cabf | 465 | #endif |
da9bb1d2 AC |
466 | static ssize_t edac_pci_int_show(void *ptr, char *buffer) |
467 | { | |
468 | int *value = ptr; | |
469 | return sprintf(buffer,"%d\n",*value); | |
470 | } | |
471 | ||
472 | static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count) | |
473 | { | |
474 | int *value = ptr; | |
475 | ||
476 | if (isdigit(*buffer)) | |
477 | *value = simple_strtoul(buffer,NULL,0); | |
478 | ||
479 | return count; | |
480 | } | |
481 | ||
482 | struct edac_pci_dev_attribute { | |
e7ecd891 DP |
483 | struct attribute attr; |
484 | void *value; | |
da9bb1d2 AC |
485 | ssize_t (*show)(void *,char *); |
486 | ssize_t (*store)(void *, const char *,size_t); | |
487 | }; | |
488 | ||
489 | /* Set of show/store abstract level functions for PCI Parity object */ | |
490 | static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr, | |
e7ecd891 | 491 | char *buffer) |
da9bb1d2 AC |
492 | { |
493 | struct edac_pci_dev_attribute *edac_pci_dev; | |
494 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
495 | ||
496 | if (edac_pci_dev->show) | |
497 | return edac_pci_dev->show(edac_pci_dev->value, buffer); | |
498 | return -EIO; | |
499 | } | |
500 | ||
e7ecd891 DP |
501 | static ssize_t edac_pci_dev_store(struct kobject *kobj, |
502 | struct attribute *attr, const char *buffer, size_t count) | |
da9bb1d2 AC |
503 | { |
504 | struct edac_pci_dev_attribute *edac_pci_dev; | |
505 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
506 | ||
507 | if (edac_pci_dev->show) | |
508 | return edac_pci_dev->store(edac_pci_dev->value, buffer, count); | |
509 | return -EIO; | |
510 | } | |
511 | ||
512 | static struct sysfs_ops edac_pci_sysfs_ops = { | |
513 | .show = edac_pci_dev_show, | |
514 | .store = edac_pci_dev_store | |
515 | }; | |
516 | ||
da9bb1d2 AC |
517 | #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \ |
518 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
519 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
520 | .value = &_name, \ | |
521 | .show = _show, \ | |
522 | .store = _store, \ | |
523 | }; | |
524 | ||
525 | #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
526 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
527 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
528 | .value = _data, \ | |
529 | .show = _show, \ | |
530 | .store = _store, \ | |
531 | }; | |
532 | ||
4136cabf | 533 | #if 0 |
da9bb1d2 AC |
534 | static struct list_control pci_whitelist_control = { |
535 | .list = pci_whitelist, | |
536 | .count = &pci_whitelist_count | |
537 | }; | |
538 | ||
539 | static struct list_control pci_blacklist_control = { | |
540 | .list = pci_blacklist, | |
541 | .count = &pci_blacklist_count | |
542 | }; | |
543 | ||
544 | /* whitelist attribute */ | |
545 | EDAC_PCI_STRING_ATTR(pci_parity_whitelist, | |
546 | &pci_whitelist_control, | |
547 | S_IRUGO|S_IWUSR, | |
548 | edac_pci_list_string_show, | |
549 | edac_pci_list_string_store); | |
550 | ||
551 | EDAC_PCI_STRING_ATTR(pci_parity_blacklist, | |
552 | &pci_blacklist_control, | |
553 | S_IRUGO|S_IWUSR, | |
554 | edac_pci_list_string_show, | |
555 | edac_pci_list_string_store); | |
4136cabf | 556 | #endif |
da9bb1d2 AC |
557 | |
558 | /* PCI Parity control files */ | |
e7ecd891 DP |
559 | EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show, |
560 | edac_pci_int_store); | |
561 | EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show, | |
562 | edac_pci_int_store); | |
563 | EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL); | |
da9bb1d2 AC |
564 | |
565 | /* Base Attributes of the memory ECC object */ | |
566 | static struct edac_pci_dev_attribute *edac_pci_attr[] = { | |
567 | &edac_pci_attr_check_pci_parity, | |
568 | &edac_pci_attr_panic_on_pci_parity, | |
569 | &edac_pci_attr_pci_parity_count, | |
da9bb1d2 AC |
570 | NULL, |
571 | }; | |
572 | ||
573 | /* No memory to release */ | |
574 | static void edac_pci_release(struct kobject *kobj) | |
575 | { | |
537fba28 | 576 | debugf1("%s()\n", __func__); |
472678eb | 577 | complete(&edac_pci_kobj_complete); |
da9bb1d2 AC |
578 | } |
579 | ||
580 | static struct kobj_type ktype_edac_pci = { | |
e7ecd891 DP |
581 | .release = edac_pci_release, |
582 | .sysfs_ops = &edac_pci_sysfs_ops, | |
583 | .default_attrs = (struct attribute **) edac_pci_attr, | |
da9bb1d2 AC |
584 | }; |
585 | ||
ceb2ca9c DP |
586 | #endif /* DISABLE_EDAC_SYSFS */ |
587 | ||
da9bb1d2 AC |
588 | /** |
589 | * edac_sysfs_pci_setup() | |
590 | * | |
591 | */ | |
592 | static int edac_sysfs_pci_setup(void) | |
ceb2ca9c DP |
593 | #ifdef DISABLE_EDAC_SYSFS |
594 | { | |
595 | return 0; | |
596 | } | |
597 | #else | |
da9bb1d2 AC |
598 | { |
599 | int err; | |
600 | ||
537fba28 | 601 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
602 | |
603 | memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj)); | |
da9bb1d2 AC |
604 | edac_pci_kobj.parent = &edac_class.kset.kobj; |
605 | edac_pci_kobj.ktype = &ktype_edac_pci; | |
da9bb1d2 | 606 | err = kobject_set_name(&edac_pci_kobj, "pci"); |
e7ecd891 | 607 | |
da9bb1d2 AC |
608 | if (!err) { |
609 | /* Instanstiate the csrow object */ | |
610 | /* FIXME: maybe new sysdev_create_subdir() */ | |
611 | err = kobject_register(&edac_pci_kobj); | |
e7ecd891 | 612 | |
da9bb1d2 AC |
613 | if (err) |
614 | debugf1("Failed to register '.../edac/pci'\n"); | |
615 | else | |
616 | debugf1("Registered '.../edac/pci' kobject\n"); | |
617 | } | |
e7ecd891 | 618 | |
da9bb1d2 AC |
619 | return err; |
620 | } | |
ceb2ca9c | 621 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
622 | |
623 | static void edac_sysfs_pci_teardown(void) | |
624 | { | |
ceb2ca9c | 625 | #ifndef DISABLE_EDAC_SYSFS |
537fba28 | 626 | debugf0("%s()\n", __func__); |
472678eb | 627 | init_completion(&edac_pci_kobj_complete); |
da9bb1d2 | 628 | kobject_unregister(&edac_pci_kobj); |
472678eb | 629 | wait_for_completion(&edac_pci_kobj_complete); |
ceb2ca9c | 630 | #endif |
da9bb1d2 AC |
631 | } |
632 | ||
37f04581 DT |
633 | |
634 | static u16 get_pci_parity_status(struct pci_dev *dev, int secondary) | |
635 | { | |
636 | int where; | |
637 | u16 status; | |
638 | ||
639 | where = secondary ? PCI_SEC_STATUS : PCI_STATUS; | |
640 | pci_read_config_word(dev, where, &status); | |
641 | ||
642 | /* If we get back 0xFFFF then we must suspect that the card has been | |
643 | * pulled but the Linux PCI layer has not yet finished cleaning up. | |
644 | * We don't want to report on such devices | |
645 | */ | |
646 | ||
647 | if (status == 0xFFFF) { | |
648 | u32 sanity; | |
649 | ||
650 | pci_read_config_dword(dev, 0, &sanity); | |
651 | ||
652 | if (sanity == 0xFFFFFFFF) | |
653 | return 0; | |
654 | } | |
655 | ||
656 | status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR | | |
657 | PCI_STATUS_PARITY; | |
658 | ||
659 | if (status) | |
660 | /* reset only the bits we are interested in */ | |
661 | pci_write_config_word(dev, where, status); | |
662 | ||
663 | return status; | |
664 | } | |
665 | ||
666 | typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev); | |
667 | ||
668 | /* Clear any PCI parity errors logged by this device. */ | |
669 | static void edac_pci_dev_parity_clear(struct pci_dev *dev) | |
670 | { | |
671 | u8 header_type; | |
672 | ||
673 | get_pci_parity_status(dev, 0); | |
674 | ||
675 | /* read the device TYPE, looking for bridges */ | |
676 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
677 | ||
678 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) | |
679 | get_pci_parity_status(dev, 1); | |
680 | } | |
681 | ||
682 | /* | |
683 | * PCI Parity polling | |
684 | * | |
685 | */ | |
686 | static void edac_pci_dev_parity_test(struct pci_dev *dev) | |
687 | { | |
688 | u16 status; | |
689 | u8 header_type; | |
690 | ||
691 | /* read the STATUS register on this device | |
692 | */ | |
693 | status = get_pci_parity_status(dev, 0); | |
694 | ||
695 | debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id ); | |
696 | ||
697 | /* check the status reg for errors */ | |
698 | if (status) { | |
699 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
700 | edac_printk(KERN_CRIT, EDAC_PCI, | |
701 | "Signaled System Error on %s\n", | |
702 | pci_name(dev)); | |
703 | ||
704 | if (status & (PCI_STATUS_PARITY)) { | |
705 | edac_printk(KERN_CRIT, EDAC_PCI, | |
706 | "Master Data Parity Error on %s\n", | |
707 | pci_name(dev)); | |
708 | ||
709 | atomic_inc(&pci_parity_count); | |
710 | } | |
711 | ||
712 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
713 | edac_printk(KERN_CRIT, EDAC_PCI, | |
714 | "Detected Parity Error on %s\n", | |
715 | pci_name(dev)); | |
716 | ||
717 | atomic_inc(&pci_parity_count); | |
718 | } | |
719 | } | |
720 | ||
721 | /* read the device TYPE, looking for bridges */ | |
722 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
723 | ||
724 | debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id ); | |
725 | ||
726 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { | |
727 | /* On bridges, need to examine secondary status register */ | |
728 | status = get_pci_parity_status(dev, 1); | |
729 | ||
730 | debugf2("PCI SEC_STATUS= 0x%04x %s\n", | |
731 | status, dev->dev.bus_id ); | |
732 | ||
733 | /* check the secondary status reg for errors */ | |
734 | if (status) { | |
735 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
736 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " | |
737 | "Signaled System Error on %s\n", | |
738 | pci_name(dev)); | |
739 | ||
740 | if (status & (PCI_STATUS_PARITY)) { | |
741 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " | |
742 | "Master Data Parity Error on " | |
743 | "%s\n", pci_name(dev)); | |
744 | ||
745 | atomic_inc(&pci_parity_count); | |
746 | } | |
747 | ||
748 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
749 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " | |
750 | "Detected Parity Error on %s\n", | |
751 | pci_name(dev)); | |
752 | ||
753 | atomic_inc(&pci_parity_count); | |
754 | } | |
755 | } | |
756 | } | |
757 | } | |
758 | ||
759 | /* | |
760 | * check_dev_on_list: Scan for a PCI device on a white/black list | |
761 | * @list: an EDAC &edac_pci_device_list white/black list pointer | |
762 | * @free_index: index of next free entry on the list | |
763 | * @pci_dev: PCI Device pointer | |
764 | * | |
765 | * see if list contains the device. | |
766 | * | |
767 | * Returns: 0 not found | |
768 | * 1 found on list | |
769 | */ | |
770 | static int check_dev_on_list(struct edac_pci_device_list *list, | |
771 | int free_index, struct pci_dev *dev) | |
772 | { | |
773 | int i; | |
774 | int rc = 0; /* Assume not found */ | |
775 | unsigned short vendor=dev->vendor; | |
776 | unsigned short device=dev->device; | |
777 | ||
778 | /* Scan the list, looking for a vendor/device match */ | |
779 | for (i = 0; i < free_index; i++, list++ ) { | |
780 | if ((list->vendor == vendor ) && (list->device == device )) { | |
781 | rc = 1; | |
782 | break; | |
783 | } | |
784 | } | |
785 | ||
786 | return rc; | |
787 | } | |
788 | ||
789 | /* | |
790 | * pci_dev parity list iterator | |
791 | * Scan the PCI device list for one iteration, looking for SERRORs | |
792 | * Master Parity ERRORS or Parity ERRORs on primary or secondary devices | |
793 | */ | |
794 | static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn) | |
795 | { | |
796 | struct pci_dev *dev = NULL; | |
797 | ||
798 | /* request for kernel access to the next PCI device, if any, | |
799 | * and while we are looking at it have its reference count | |
800 | * bumped until we are done with it | |
801 | */ | |
802 | while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | |
803 | /* if whitelist exists then it has priority, so only scan | |
804 | * those devices on the whitelist | |
805 | */ | |
806 | if (pci_whitelist_count > 0 ) { | |
807 | if (check_dev_on_list(pci_whitelist, | |
808 | pci_whitelist_count, dev)) | |
809 | fn(dev); | |
810 | } else { | |
811 | /* | |
812 | * if no whitelist, then check if this devices is | |
813 | * blacklisted | |
814 | */ | |
815 | if (!check_dev_on_list(pci_blacklist, | |
816 | pci_blacklist_count, dev)) | |
817 | fn(dev); | |
818 | } | |
819 | } | |
820 | } | |
821 | ||
822 | static void do_pci_parity_check(void) | |
823 | { | |
824 | unsigned long flags; | |
825 | int before_count; | |
826 | ||
827 | debugf3("%s()\n", __func__); | |
828 | ||
829 | if (!check_pci_parity) | |
830 | return; | |
831 | ||
832 | before_count = atomic_read(&pci_parity_count); | |
833 | ||
834 | /* scan all PCI devices looking for a Parity Error on devices and | |
835 | * bridges | |
836 | */ | |
837 | local_irq_save(flags); | |
838 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_test); | |
839 | local_irq_restore(flags); | |
840 | ||
841 | /* Only if operator has selected panic on PCI Error */ | |
842 | if (panic_on_pci_parity) { | |
843 | /* If the count is different 'after' from 'before' */ | |
844 | if (before_count != atomic_read(&pci_parity_count)) | |
845 | panic("EDAC: PCI Parity Error"); | |
846 | } | |
847 | } | |
848 | ||
849 | static inline void clear_pci_parity_errors(void) | |
850 | { | |
851 | /* Clear any PCI bus parity errors that devices initially have logged | |
852 | * in their registers. | |
853 | */ | |
854 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear); | |
855 | } | |
856 | ||
857 | #else /* CONFIG_PCI */ | |
858 | ||
859 | static inline void do_pci_parity_check(void) | |
860 | { | |
861 | /* no-op */ | |
862 | } | |
863 | ||
864 | static inline void clear_pci_parity_errors(void) | |
865 | { | |
866 | /* no-op */ | |
867 | } | |
868 | ||
869 | static void edac_sysfs_pci_teardown(void) | |
870 | { | |
871 | } | |
872 | ||
873 | static int edac_sysfs_pci_setup(void) | |
874 | { | |
875 | return 0; | |
876 | } | |
877 | #endif /* CONFIG_PCI */ | |
878 | ||
ceb2ca9c DP |
879 | #ifndef DISABLE_EDAC_SYSFS |
880 | ||
da9bb1d2 AC |
881 | /* EDAC sysfs CSROW data structures and methods */ |
882 | ||
883 | /* Set of more detailed csrow<id> attribute show/store functions */ | |
884 | static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data) | |
885 | { | |
886 | ssize_t size = 0; | |
887 | ||
888 | if (csrow->nr_channels > 0) { | |
889 | size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n", | |
890 | csrow->channels[0].label); | |
891 | } | |
e7ecd891 | 892 | |
da9bb1d2 AC |
893 | return size; |
894 | } | |
895 | ||
896 | static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data) | |
897 | { | |
898 | ssize_t size = 0; | |
899 | ||
900 | if (csrow->nr_channels > 0) { | |
901 | size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", | |
902 | csrow->channels[1].label); | |
903 | } | |
e7ecd891 | 904 | |
da9bb1d2 AC |
905 | return size; |
906 | } | |
907 | ||
908 | static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow, | |
e7ecd891 | 909 | const char *data, size_t size) |
da9bb1d2 AC |
910 | { |
911 | ssize_t max_size = 0; | |
912 | ||
913 | if (csrow->nr_channels > 0) { | |
914 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
915 | strncpy(csrow->channels[0].label, data, max_size); | |
916 | csrow->channels[0].label[max_size] = '\0'; | |
917 | } | |
e7ecd891 | 918 | |
da9bb1d2 AC |
919 | return size; |
920 | } | |
921 | ||
922 | static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow, | |
e7ecd891 | 923 | const char *data, size_t size) |
da9bb1d2 AC |
924 | { |
925 | ssize_t max_size = 0; | |
926 | ||
927 | if (csrow->nr_channels > 1) { | |
928 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
929 | strncpy(csrow->channels[1].label, data, max_size); | |
930 | csrow->channels[1].label[max_size] = '\0'; | |
931 | } | |
e7ecd891 | 932 | |
da9bb1d2 AC |
933 | return max_size; |
934 | } | |
935 | ||
936 | static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data) | |
937 | { | |
938 | return sprintf(data,"%u\n", csrow->ue_count); | |
939 | } | |
940 | ||
941 | static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data) | |
942 | { | |
943 | return sprintf(data,"%u\n", csrow->ce_count); | |
944 | } | |
945 | ||
946 | static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data) | |
947 | { | |
948 | ssize_t size = 0; | |
949 | ||
950 | if (csrow->nr_channels > 0) { | |
951 | size = sprintf(data,"%u\n", csrow->channels[0].ce_count); | |
952 | } | |
e7ecd891 | 953 | |
da9bb1d2 AC |
954 | return size; |
955 | } | |
956 | ||
957 | static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data) | |
958 | { | |
959 | ssize_t size = 0; | |
960 | ||
961 | if (csrow->nr_channels > 1) { | |
962 | size = sprintf(data,"%u\n", csrow->channels[1].ce_count); | |
963 | } | |
e7ecd891 | 964 | |
da9bb1d2 AC |
965 | return size; |
966 | } | |
967 | ||
968 | static ssize_t csrow_size_show(struct csrow_info *csrow, char *data) | |
969 | { | |
970 | return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages)); | |
971 | } | |
972 | ||
973 | static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data) | |
974 | { | |
975 | return sprintf(data,"%s\n", mem_types[csrow->mtype]); | |
976 | } | |
977 | ||
978 | static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data) | |
979 | { | |
980 | return sprintf(data,"%s\n", dev_types[csrow->dtype]); | |
981 | } | |
982 | ||
983 | static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data) | |
984 | { | |
985 | return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]); | |
986 | } | |
987 | ||
988 | struct csrowdev_attribute { | |
e7ecd891 | 989 | struct attribute attr; |
da9bb1d2 AC |
990 | ssize_t (*show)(struct csrow_info *,char *); |
991 | ssize_t (*store)(struct csrow_info *, const char *,size_t); | |
992 | }; | |
993 | ||
994 | #define to_csrow(k) container_of(k, struct csrow_info, kobj) | |
995 | #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr) | |
996 | ||
997 | /* Set of show/store higher level functions for csrow objects */ | |
998 | static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr, | |
e7ecd891 | 999 | char *buffer) |
da9bb1d2 AC |
1000 | { |
1001 | struct csrow_info *csrow = to_csrow(kobj); | |
1002 | struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr); | |
1003 | ||
1004 | if (csrowdev_attr->show) | |
1005 | return csrowdev_attr->show(csrow, buffer); | |
e7ecd891 | 1006 | |
da9bb1d2 AC |
1007 | return -EIO; |
1008 | } | |
1009 | ||
1010 | static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr, | |
e7ecd891 | 1011 | const char *buffer, size_t count) |
da9bb1d2 AC |
1012 | { |
1013 | struct csrow_info *csrow = to_csrow(kobj); | |
1014 | struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr); | |
1015 | ||
1016 | if (csrowdev_attr->store) | |
1017 | return csrowdev_attr->store(csrow, buffer, count); | |
e7ecd891 | 1018 | |
da9bb1d2 AC |
1019 | return -EIO; |
1020 | } | |
1021 | ||
1022 | static struct sysfs_ops csrowfs_ops = { | |
1023 | .show = csrowdev_show, | |
1024 | .store = csrowdev_store | |
1025 | }; | |
1026 | ||
1027 | #define CSROWDEV_ATTR(_name,_mode,_show,_store) \ | |
1028 | struct csrowdev_attribute attr_##_name = { \ | |
1029 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
1030 | .show = _show, \ | |
1031 | .store = _store, \ | |
1032 | }; | |
1033 | ||
1034 | /* cwrow<id>/attribute files */ | |
1035 | CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL); | |
1036 | CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL); | |
1037 | CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL); | |
1038 | CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL); | |
1039 | CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL); | |
1040 | CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL); | |
1041 | CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL); | |
1042 | CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL); | |
1043 | ||
1044 | /* control/attribute files */ | |
1045 | CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR, | |
1046 | csrow_ch0_dimm_label_show, | |
1047 | csrow_ch0_dimm_label_store); | |
1048 | CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR, | |
1049 | csrow_ch1_dimm_label_show, | |
1050 | csrow_ch1_dimm_label_store); | |
1051 | ||
da9bb1d2 AC |
1052 | /* Attributes of the CSROW<id> object */ |
1053 | static struct csrowdev_attribute *csrow_attr[] = { | |
1054 | &attr_dev_type, | |
1055 | &attr_mem_type, | |
1056 | &attr_edac_mode, | |
1057 | &attr_size_mb, | |
1058 | &attr_ue_count, | |
1059 | &attr_ce_count, | |
1060 | &attr_ch0_ce_count, | |
1061 | &attr_ch1_ce_count, | |
1062 | &attr_ch0_dimm_label, | |
1063 | &attr_ch1_dimm_label, | |
1064 | NULL, | |
1065 | }; | |
1066 | ||
da9bb1d2 AC |
1067 | /* No memory to release */ |
1068 | static void edac_csrow_instance_release(struct kobject *kobj) | |
1069 | { | |
472678eb DP |
1070 | struct csrow_info *cs; |
1071 | ||
537fba28 | 1072 | debugf1("%s()\n", __func__); |
472678eb DP |
1073 | cs = container_of(kobj, struct csrow_info, kobj); |
1074 | complete(&cs->kobj_complete); | |
da9bb1d2 AC |
1075 | } |
1076 | ||
1077 | static struct kobj_type ktype_csrow = { | |
e7ecd891 DP |
1078 | .release = edac_csrow_instance_release, |
1079 | .sysfs_ops = &csrowfs_ops, | |
1080 | .default_attrs = (struct attribute **) csrow_attr, | |
da9bb1d2 AC |
1081 | }; |
1082 | ||
1083 | /* Create a CSROW object under specifed edac_mc_device */ | |
1084 | static int edac_create_csrow_object(struct kobject *edac_mci_kobj, | |
e7ecd891 | 1085 | struct csrow_info *csrow, int index) |
da9bb1d2 AC |
1086 | { |
1087 | int err = 0; | |
1088 | ||
537fba28 | 1089 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1090 | memset(&csrow->kobj, 0, sizeof(csrow->kobj)); |
1091 | ||
1092 | /* generate ..../edac/mc/mc<id>/csrow<index> */ | |
1093 | ||
da9bb1d2 AC |
1094 | csrow->kobj.parent = edac_mci_kobj; |
1095 | csrow->kobj.ktype = &ktype_csrow; | |
1096 | ||
1097 | /* name this instance of csrow<id> */ | |
1098 | err = kobject_set_name(&csrow->kobj,"csrow%d",index); | |
e7ecd891 | 1099 | |
da9bb1d2 AC |
1100 | if (!err) { |
1101 | /* Instanstiate the csrow object */ | |
1102 | err = kobject_register(&csrow->kobj); | |
e7ecd891 | 1103 | |
da9bb1d2 AC |
1104 | if (err) |
1105 | debugf0("Failed to register CSROW%d\n",index); | |
1106 | else | |
1107 | debugf0("Registered CSROW%d\n",index); | |
1108 | } | |
1109 | ||
1110 | return err; | |
1111 | } | |
1112 | ||
1113 | /* sysfs data structures and methods for the MCI kobjects */ | |
1114 | ||
e7ecd891 DP |
1115 | static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, |
1116 | const char *data, size_t count) | |
da9bb1d2 AC |
1117 | { |
1118 | int row, chan; | |
1119 | ||
1120 | mci->ue_noinfo_count = 0; | |
1121 | mci->ce_noinfo_count = 0; | |
1122 | mci->ue_count = 0; | |
1123 | mci->ce_count = 0; | |
e7ecd891 | 1124 | |
da9bb1d2 AC |
1125 | for (row = 0; row < mci->nr_csrows; row++) { |
1126 | struct csrow_info *ri = &mci->csrows[row]; | |
1127 | ||
1128 | ri->ue_count = 0; | |
1129 | ri->ce_count = 0; | |
e7ecd891 | 1130 | |
da9bb1d2 AC |
1131 | for (chan = 0; chan < ri->nr_channels; chan++) |
1132 | ri->channels[chan].ce_count = 0; | |
1133 | } | |
da9bb1d2 | 1134 | |
e7ecd891 | 1135 | mci->start_time = jiffies; |
da9bb1d2 AC |
1136 | return count; |
1137 | } | |
1138 | ||
1139 | static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) | |
1140 | { | |
1141 | return sprintf(data,"%d\n", mci->ue_count); | |
1142 | } | |
1143 | ||
1144 | static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data) | |
1145 | { | |
1146 | return sprintf(data,"%d\n", mci->ce_count); | |
1147 | } | |
1148 | ||
1149 | static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data) | |
1150 | { | |
1151 | return sprintf(data,"%d\n", mci->ce_noinfo_count); | |
1152 | } | |
1153 | ||
1154 | static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data) | |
1155 | { | |
1156 | return sprintf(data,"%d\n", mci->ue_noinfo_count); | |
1157 | } | |
1158 | ||
1159 | static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data) | |
1160 | { | |
1161 | return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ); | |
1162 | } | |
1163 | ||
1164 | static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data) | |
1165 | { | |
1166 | return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver); | |
1167 | } | |
1168 | ||
1169 | static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) | |
1170 | { | |
1171 | return sprintf(data,"%s\n", mci->ctl_name); | |
1172 | } | |
1173 | ||
1174 | static int mci_output_edac_cap(char *buf, unsigned long edac_cap) | |
1175 | { | |
1176 | char *p = buf; | |
1177 | int bit_idx; | |
1178 | ||
1179 | for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) { | |
1180 | if ((edac_cap >> bit_idx) & 0x1) | |
1181 | p += sprintf(p, "%s ", edac_caps[bit_idx]); | |
1182 | } | |
1183 | ||
1184 | return p - buf; | |
1185 | } | |
1186 | ||
1187 | static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data) | |
1188 | { | |
1189 | char *p = data; | |
1190 | ||
1191 | p += mci_output_edac_cap(p,mci->edac_ctl_cap); | |
1192 | p += sprintf(p, "\n"); | |
da9bb1d2 AC |
1193 | return p - data; |
1194 | } | |
1195 | ||
1196 | static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci, | |
e7ecd891 | 1197 | char *data) |
da9bb1d2 AC |
1198 | { |
1199 | char *p = data; | |
1200 | ||
1201 | p += mci_output_edac_cap(p,mci->edac_cap); | |
1202 | p += sprintf(p, "\n"); | |
da9bb1d2 AC |
1203 | return p - data; |
1204 | } | |
1205 | ||
1206 | static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap) | |
1207 | { | |
1208 | char *p = buf; | |
1209 | int bit_idx; | |
1210 | ||
1211 | for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) { | |
1212 | if ((mtype_cap >> bit_idx) & 0x1) | |
1213 | p += sprintf(p, "%s ", mem_types[bit_idx]); | |
1214 | } | |
1215 | ||
1216 | return p - buf; | |
1217 | } | |
1218 | ||
e7ecd891 DP |
1219 | static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, |
1220 | char *data) | |
da9bb1d2 AC |
1221 | { |
1222 | char *p = data; | |
1223 | ||
1224 | p += mci_output_mtype_cap(p,mci->mtype_cap); | |
1225 | p += sprintf(p, "\n"); | |
da9bb1d2 AC |
1226 | return p - data; |
1227 | } | |
1228 | ||
1229 | static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) | |
1230 | { | |
1231 | int total_pages, csrow_idx; | |
1232 | ||
1233 | for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; | |
1234 | csrow_idx++) { | |
1235 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; | |
1236 | ||
1237 | if (!csrow->nr_pages) | |
1238 | continue; | |
e7ecd891 | 1239 | |
da9bb1d2 AC |
1240 | total_pages += csrow->nr_pages; |
1241 | } | |
1242 | ||
1243 | return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages)); | |
1244 | } | |
1245 | ||
1246 | struct mcidev_attribute { | |
e7ecd891 | 1247 | struct attribute attr; |
da9bb1d2 AC |
1248 | ssize_t (*show)(struct mem_ctl_info *,char *); |
1249 | ssize_t (*store)(struct mem_ctl_info *, const char *,size_t); | |
1250 | }; | |
1251 | ||
1252 | #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj) | |
1253 | #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr) | |
1254 | ||
1255 | static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr, | |
e7ecd891 | 1256 | char *buffer) |
da9bb1d2 AC |
1257 | { |
1258 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
1259 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
1260 | ||
1261 | if (mcidev_attr->show) | |
1262 | return mcidev_attr->show(mem_ctl_info, buffer); | |
e7ecd891 | 1263 | |
da9bb1d2 AC |
1264 | return -EIO; |
1265 | } | |
1266 | ||
1267 | static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr, | |
e7ecd891 | 1268 | const char *buffer, size_t count) |
da9bb1d2 AC |
1269 | { |
1270 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
1271 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
1272 | ||
1273 | if (mcidev_attr->store) | |
1274 | return mcidev_attr->store(mem_ctl_info, buffer, count); | |
e7ecd891 | 1275 | |
da9bb1d2 AC |
1276 | return -EIO; |
1277 | } | |
1278 | ||
1279 | static struct sysfs_ops mci_ops = { | |
e7ecd891 DP |
1280 | .show = mcidev_show, |
1281 | .store = mcidev_store | |
da9bb1d2 AC |
1282 | }; |
1283 | ||
1284 | #define MCIDEV_ATTR(_name,_mode,_show,_store) \ | |
1285 | struct mcidev_attribute mci_attr_##_name = { \ | |
1286 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
1287 | .show = _show, \ | |
1288 | .store = _store, \ | |
1289 | }; | |
1290 | ||
1291 | /* Control file */ | |
1292 | MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store); | |
1293 | ||
1294 | /* Attribute files */ | |
1295 | MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL); | |
1296 | MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL); | |
1297 | MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL); | |
1298 | MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL); | |
1299 | MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL); | |
1300 | MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL); | |
1301 | MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL); | |
1302 | MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); | |
1303 | MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); | |
1304 | MCIDEV_ATTR(edac_current_capability,S_IRUGO, | |
1305 | mci_edac_current_capability_show,NULL); | |
1306 | MCIDEV_ATTR(supported_mem_type,S_IRUGO, | |
1307 | mci_supported_mem_type_show,NULL); | |
1308 | ||
da9bb1d2 AC |
1309 | static struct mcidev_attribute *mci_attr[] = { |
1310 | &mci_attr_reset_counters, | |
1311 | &mci_attr_module_name, | |
1312 | &mci_attr_mc_name, | |
1313 | &mci_attr_edac_capability, | |
1314 | &mci_attr_edac_current_capability, | |
1315 | &mci_attr_supported_mem_type, | |
1316 | &mci_attr_size_mb, | |
1317 | &mci_attr_seconds_since_reset, | |
1318 | &mci_attr_ue_noinfo_count, | |
1319 | &mci_attr_ce_noinfo_count, | |
1320 | &mci_attr_ue_count, | |
1321 | &mci_attr_ce_count, | |
1322 | NULL | |
1323 | }; | |
1324 | ||
da9bb1d2 AC |
1325 | /* |
1326 | * Release of a MC controlling instance | |
1327 | */ | |
1328 | static void edac_mci_instance_release(struct kobject *kobj) | |
1329 | { | |
1330 | struct mem_ctl_info *mci; | |
da9bb1d2 | 1331 | |
472678eb DP |
1332 | mci = to_mci(kobj); |
1333 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); | |
1334 | complete(&mci->kobj_complete); | |
da9bb1d2 AC |
1335 | } |
1336 | ||
1337 | static struct kobj_type ktype_mci = { | |
e7ecd891 DP |
1338 | .release = edac_mci_instance_release, |
1339 | .sysfs_ops = &mci_ops, | |
1340 | .default_attrs = (struct attribute **) mci_attr, | |
da9bb1d2 AC |
1341 | }; |
1342 | ||
ceb2ca9c DP |
1343 | #endif /* DISABLE_EDAC_SYSFS */ |
1344 | ||
da9bb1d2 AC |
1345 | #define EDAC_DEVICE_SYMLINK "device" |
1346 | ||
1347 | /* | |
1348 | * Create a new Memory Controller kobject instance, | |
1349 | * mc<id> under the 'mc' directory | |
1350 | * | |
1351 | * Return: | |
1352 | * 0 Success | |
1353 | * !0 Failure | |
1354 | */ | |
1355 | static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |
ceb2ca9c DP |
1356 | #ifdef DISABLE_EDAC_SYSFS |
1357 | { | |
1358 | return 0; | |
1359 | } | |
1360 | #else | |
da9bb1d2 AC |
1361 | { |
1362 | int i; | |
1363 | int err; | |
1364 | struct csrow_info *csrow; | |
1365 | struct kobject *edac_mci_kobj=&mci->edac_mci_kobj; | |
1366 | ||
537fba28 | 1367 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); |
da9bb1d2 | 1368 | memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj)); |
da9bb1d2 AC |
1369 | |
1370 | /* set the name of the mc<id> object */ | |
1371 | err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx); | |
e7ecd891 | 1372 | |
da9bb1d2 AC |
1373 | if (err) |
1374 | return err; | |
1375 | ||
1376 | /* link to our parent the '..../edac/mc' object */ | |
1377 | edac_mci_kobj->parent = &edac_memctrl_kobj; | |
1378 | edac_mci_kobj->ktype = &ktype_mci; | |
1379 | ||
1380 | /* register the mc<id> kobject */ | |
1381 | err = kobject_register(edac_mci_kobj); | |
e7ecd891 | 1382 | |
da9bb1d2 AC |
1383 | if (err) |
1384 | return err; | |
1385 | ||
1386 | /* create a symlink for the device */ | |
37f04581 | 1387 | err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj, |
da9bb1d2 | 1388 | EDAC_DEVICE_SYMLINK); |
e7ecd891 | 1389 | |
6e5a8748 DP |
1390 | if (err) |
1391 | goto fail0; | |
da9bb1d2 AC |
1392 | |
1393 | /* Make directories for each CSROW object | |
1394 | * under the mc<id> kobject | |
1395 | */ | |
1396 | for (i = 0; i < mci->nr_csrows; i++) { | |
da9bb1d2 AC |
1397 | csrow = &mci->csrows[i]; |
1398 | ||
1399 | /* Only expose populated CSROWs */ | |
1400 | if (csrow->nr_pages > 0) { | |
1401 | err = edac_create_csrow_object(edac_mci_kobj,csrow,i); | |
e7ecd891 | 1402 | |
da9bb1d2 | 1403 | if (err) |
6e5a8748 | 1404 | goto fail1; |
da9bb1d2 AC |
1405 | } |
1406 | } | |
1407 | ||
da9bb1d2 AC |
1408 | return 0; |
1409 | ||
da9bb1d2 | 1410 | /* CSROW error: backout what has already been registered, */ |
6e5a8748 | 1411 | fail1: |
da9bb1d2 | 1412 | for ( i--; i >= 0; i--) { |
472678eb DP |
1413 | if (csrow->nr_pages > 0) { |
1414 | init_completion(&csrow->kobj_complete); | |
da9bb1d2 | 1415 | kobject_unregister(&mci->csrows[i].kobj); |
472678eb DP |
1416 | wait_for_completion(&csrow->kobj_complete); |
1417 | } | |
da9bb1d2 AC |
1418 | } |
1419 | ||
6e5a8748 | 1420 | fail0: |
472678eb | 1421 | init_completion(&mci->kobj_complete); |
da9bb1d2 | 1422 | kobject_unregister(edac_mci_kobj); |
472678eb | 1423 | wait_for_completion(&mci->kobj_complete); |
da9bb1d2 AC |
1424 | return err; |
1425 | } | |
ceb2ca9c | 1426 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1427 | |
1428 | /* | |
1429 | * remove a Memory Controller instance | |
1430 | */ | |
1431 | static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | |
1432 | { | |
ceb2ca9c | 1433 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
1434 | int i; |
1435 | ||
537fba28 | 1436 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1437 | |
1438 | /* remove all csrow kobjects */ | |
1439 | for (i = 0; i < mci->nr_csrows; i++) { | |
472678eb DP |
1440 | if (mci->csrows[i].nr_pages > 0) { |
1441 | init_completion(&mci->csrows[i].kobj_complete); | |
da9bb1d2 | 1442 | kobject_unregister(&mci->csrows[i].kobj); |
472678eb DP |
1443 | wait_for_completion(&mci->csrows[i].kobj_complete); |
1444 | } | |
da9bb1d2 AC |
1445 | } |
1446 | ||
1447 | sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK); | |
472678eb | 1448 | init_completion(&mci->kobj_complete); |
da9bb1d2 | 1449 | kobject_unregister(&mci->edac_mci_kobj); |
472678eb | 1450 | wait_for_completion(&mci->kobj_complete); |
ceb2ca9c | 1451 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1452 | } |
1453 | ||
1454 | /* END OF sysfs data and methods */ | |
1455 | ||
1456 | #ifdef CONFIG_EDAC_DEBUG | |
1457 | ||
da9bb1d2 AC |
1458 | void edac_mc_dump_channel(struct channel_info *chan) |
1459 | { | |
1460 | debugf4("\tchannel = %p\n", chan); | |
1461 | debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); | |
1462 | debugf4("\tchannel->ce_count = %d\n", chan->ce_count); | |
1463 | debugf4("\tchannel->label = '%s'\n", chan->label); | |
1464 | debugf4("\tchannel->csrow = %p\n\n", chan->csrow); | |
1465 | } | |
9110540f | 1466 | EXPORT_SYMBOL_GPL(edac_mc_dump_channel); |
da9bb1d2 | 1467 | |
da9bb1d2 AC |
1468 | void edac_mc_dump_csrow(struct csrow_info *csrow) |
1469 | { | |
1470 | debugf4("\tcsrow = %p\n", csrow); | |
1471 | debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx); | |
1472 | debugf4("\tcsrow->first_page = 0x%lx\n", | |
1473 | csrow->first_page); | |
1474 | debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); | |
1475 | debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); | |
1476 | debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); | |
1477 | debugf4("\tcsrow->nr_channels = %d\n", | |
1478 | csrow->nr_channels); | |
1479 | debugf4("\tcsrow->channels = %p\n", csrow->channels); | |
1480 | debugf4("\tcsrow->mci = %p\n\n", csrow->mci); | |
1481 | } | |
9110540f | 1482 | EXPORT_SYMBOL_GPL(edac_mc_dump_csrow); |
da9bb1d2 | 1483 | |
da9bb1d2 AC |
1484 | void edac_mc_dump_mci(struct mem_ctl_info *mci) |
1485 | { | |
1486 | debugf3("\tmci = %p\n", mci); | |
1487 | debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap); | |
1488 | debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); | |
1489 | debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap); | |
1490 | debugf4("\tmci->edac_check = %p\n", mci->edac_check); | |
1491 | debugf3("\tmci->nr_csrows = %d, csrows = %p\n", | |
1492 | mci->nr_csrows, mci->csrows); | |
37f04581 | 1493 | debugf3("\tdev = %p\n", mci->dev); |
da9bb1d2 AC |
1494 | debugf3("\tmod_name:ctl_name = %s:%s\n", |
1495 | mci->mod_name, mci->ctl_name); | |
1496 | debugf3("\tpvt_info = %p\n\n", mci->pvt_info); | |
1497 | } | |
9110540f | 1498 | EXPORT_SYMBOL_GPL(edac_mc_dump_mci); |
da9bb1d2 | 1499 | |
e7ecd891 | 1500 | #endif /* CONFIG_EDAC_DEBUG */ |
da9bb1d2 AC |
1501 | |
1502 | /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'. | |
1503 | * Adjust 'ptr' so that its alignment is at least as stringent as what the | |
1504 | * compiler would provide for X and return the aligned result. | |
1505 | * | |
1506 | * If 'size' is a constant, the compiler will optimize this whole function | |
1507 | * down to either a no-op or the addition of a constant to the value of 'ptr'. | |
1508 | */ | |
e7ecd891 | 1509 | static inline char * align_ptr(void *ptr, unsigned size) |
da9bb1d2 AC |
1510 | { |
1511 | unsigned align, r; | |
1512 | ||
1513 | /* Here we assume that the alignment of a "long long" is the most | |
1514 | * stringent alignment that the compiler will ever provide by default. | |
1515 | * As far as I know, this is a reasonable assumption. | |
1516 | */ | |
1517 | if (size > sizeof(long)) | |
1518 | align = sizeof(long long); | |
1519 | else if (size > sizeof(int)) | |
1520 | align = sizeof(long); | |
1521 | else if (size > sizeof(short)) | |
1522 | align = sizeof(int); | |
1523 | else if (size > sizeof(char)) | |
1524 | align = sizeof(short); | |
1525 | else | |
1526 | return (char *) ptr; | |
1527 | ||
1528 | r = size % align; | |
1529 | ||
1530 | if (r == 0) | |
1531 | return (char *) ptr; | |
1532 | ||
1533 | return (char *) (((unsigned long) ptr) + align - r); | |
1534 | } | |
1535 | ||
da9bb1d2 AC |
1536 | /** |
1537 | * edac_mc_alloc: Allocate a struct mem_ctl_info structure | |
1538 | * @size_pvt: size of private storage needed | |
1539 | * @nr_csrows: Number of CWROWS needed for this MC | |
1540 | * @nr_chans: Number of channels for the MC | |
1541 | * | |
1542 | * Everything is kmalloc'ed as one big chunk - more efficient. | |
1543 | * Only can be used if all structures have the same lifetime - otherwise | |
1544 | * you have to allocate and initialize your own structures. | |
1545 | * | |
1546 | * Use edac_mc_free() to free mc structures allocated by this function. | |
1547 | * | |
1548 | * Returns: | |
1549 | * NULL allocation failed | |
1550 | * struct mem_ctl_info pointer | |
1551 | */ | |
1552 | struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, | |
e7ecd891 | 1553 | unsigned nr_chans) |
da9bb1d2 AC |
1554 | { |
1555 | struct mem_ctl_info *mci; | |
1556 | struct csrow_info *csi, *csrow; | |
1557 | struct channel_info *chi, *chp, *chan; | |
1558 | void *pvt; | |
1559 | unsigned size; | |
1560 | int row, chn; | |
1561 | ||
1562 | /* Figure out the offsets of the various items from the start of an mc | |
1563 | * structure. We want the alignment of each item to be at least as | |
1564 | * stringent as what the compiler would provide if we could simply | |
1565 | * hardcode everything into a single struct. | |
1566 | */ | |
1567 | mci = (struct mem_ctl_info *) 0; | |
1568 | csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi)); | |
1569 | chi = (struct channel_info *) | |
1570 | align_ptr(&csi[nr_csrows], sizeof(*chi)); | |
1571 | pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt); | |
1572 | size = ((unsigned long) pvt) + sz_pvt; | |
1573 | ||
1574 | if ((mci = kmalloc(size, GFP_KERNEL)) == NULL) | |
1575 | return NULL; | |
1576 | ||
1577 | /* Adjust pointers so they point within the memory we just allocated | |
1578 | * rather than an imaginary chunk of memory located at address 0. | |
1579 | */ | |
1580 | csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi)); | |
1581 | chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi)); | |
1582 | pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL; | |
1583 | ||
e7ecd891 | 1584 | memset(mci, 0, size); /* clear all fields */ |
da9bb1d2 AC |
1585 | mci->csrows = csi; |
1586 | mci->pvt_info = pvt; | |
1587 | mci->nr_csrows = nr_csrows; | |
1588 | ||
1589 | for (row = 0; row < nr_csrows; row++) { | |
1590 | csrow = &csi[row]; | |
1591 | csrow->csrow_idx = row; | |
1592 | csrow->mci = mci; | |
1593 | csrow->nr_channels = nr_chans; | |
1594 | chp = &chi[row * nr_chans]; | |
1595 | csrow->channels = chp; | |
1596 | ||
1597 | for (chn = 0; chn < nr_chans; chn++) { | |
1598 | chan = &chp[chn]; | |
1599 | chan->chan_idx = chn; | |
1600 | chan->csrow = csrow; | |
1601 | } | |
1602 | } | |
1603 | ||
1604 | return mci; | |
1605 | } | |
9110540f | 1606 | EXPORT_SYMBOL_GPL(edac_mc_alloc); |
da9bb1d2 | 1607 | |
da9bb1d2 AC |
1608 | /** |
1609 | * edac_mc_free: Free a previously allocated 'mci' structure | |
1610 | * @mci: pointer to a struct mem_ctl_info structure | |
da9bb1d2 AC |
1611 | */ |
1612 | void edac_mc_free(struct mem_ctl_info *mci) | |
1613 | { | |
472678eb | 1614 | kfree(mci); |
da9bb1d2 | 1615 | } |
9110540f | 1616 | EXPORT_SYMBOL_GPL(edac_mc_free); |
da9bb1d2 | 1617 | |
37f04581 | 1618 | static struct mem_ctl_info *find_mci_by_dev(struct device *dev) |
da9bb1d2 AC |
1619 | { |
1620 | struct mem_ctl_info *mci; | |
1621 | struct list_head *item; | |
1622 | ||
537fba28 | 1623 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1624 | |
1625 | list_for_each(item, &mc_devices) { | |
1626 | mci = list_entry(item, struct mem_ctl_info, link); | |
1627 | ||
37f04581 | 1628 | if (mci->dev == dev) |
da9bb1d2 AC |
1629 | return mci; |
1630 | } | |
1631 | ||
1632 | return NULL; | |
1633 | } | |
1634 | ||
e7ecd891 | 1635 | static int add_mc_to_global_list(struct mem_ctl_info *mci) |
da9bb1d2 AC |
1636 | { |
1637 | struct list_head *item, *insert_before; | |
1638 | struct mem_ctl_info *p; | |
1639 | int i; | |
1640 | ||
1641 | if (list_empty(&mc_devices)) { | |
1642 | mci->mc_idx = 0; | |
1643 | insert_before = &mc_devices; | |
1644 | } else { | |
37f04581 | 1645 | if (find_mci_by_dev(mci->dev)) { |
537fba28 DP |
1646 | edac_printk(KERN_WARNING, EDAC_MC, |
1647 | "%s (%s) %s %s already assigned %d\n", | |
37f04581 DT |
1648 | mci->dev->bus_id, dev_name(mci->dev), |
1649 | mci->mod_name, mci->ctl_name, | |
1650 | mci->mc_idx); | |
da9bb1d2 AC |
1651 | return 1; |
1652 | } | |
1653 | ||
1654 | insert_before = NULL; | |
1655 | i = 0; | |
1656 | ||
1657 | list_for_each(item, &mc_devices) { | |
1658 | p = list_entry(item, struct mem_ctl_info, link); | |
1659 | ||
1660 | if (p->mc_idx != i) { | |
1661 | insert_before = item; | |
1662 | break; | |
1663 | } | |
1664 | ||
1665 | i++; | |
1666 | } | |
1667 | ||
1668 | mci->mc_idx = i; | |
1669 | ||
1670 | if (insert_before == NULL) | |
1671 | insert_before = &mc_devices; | |
1672 | } | |
1673 | ||
1674 | list_add_tail_rcu(&mci->link, insert_before); | |
1675 | return 0; | |
1676 | } | |
1677 | ||
e7ecd891 | 1678 | static void complete_mc_list_del(struct rcu_head *head) |
a1d03fcc DP |
1679 | { |
1680 | struct mem_ctl_info *mci; | |
1681 | ||
1682 | mci = container_of(head, struct mem_ctl_info, rcu); | |
1683 | INIT_LIST_HEAD(&mci->link); | |
1684 | complete(&mci->complete); | |
1685 | } | |
1686 | ||
e7ecd891 | 1687 | static void del_mc_from_global_list(struct mem_ctl_info *mci) |
a1d03fcc DP |
1688 | { |
1689 | list_del_rcu(&mci->link); | |
1690 | init_completion(&mci->complete); | |
1691 | call_rcu(&mci->rcu, complete_mc_list_del); | |
1692 | wait_for_completion(&mci->complete); | |
1693 | } | |
1694 | ||
da9bb1d2 | 1695 | /** |
472678eb DP |
1696 | * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and |
1697 | * create sysfs entries associated with mci structure | |
da9bb1d2 AC |
1698 | * @mci: pointer to the mci structure to be added to the list |
1699 | * | |
1700 | * Return: | |
1701 | * 0 Success | |
1702 | * !0 Failure | |
1703 | */ | |
1704 | ||
1705 | /* FIXME - should a warning be printed if no error detection? correction? */ | |
1706 | int edac_mc_add_mc(struct mem_ctl_info *mci) | |
1707 | { | |
537fba28 | 1708 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1709 | #ifdef CONFIG_EDAC_DEBUG |
1710 | if (edac_debug_level >= 3) | |
1711 | edac_mc_dump_mci(mci); | |
e7ecd891 | 1712 | |
da9bb1d2 AC |
1713 | if (edac_debug_level >= 4) { |
1714 | int i; | |
1715 | ||
1716 | for (i = 0; i < mci->nr_csrows; i++) { | |
1717 | int j; | |
e7ecd891 | 1718 | |
da9bb1d2 AC |
1719 | edac_mc_dump_csrow(&mci->csrows[i]); |
1720 | for (j = 0; j < mci->csrows[i].nr_channels; j++) | |
e7ecd891 DP |
1721 | edac_mc_dump_channel( |
1722 | &mci->csrows[i].channels[j]); | |
da9bb1d2 AC |
1723 | } |
1724 | } | |
1725 | #endif | |
1726 | down(&mem_ctls_mutex); | |
1727 | ||
1728 | if (add_mc_to_global_list(mci)) | |
028a7b6d | 1729 | goto fail0; |
da9bb1d2 AC |
1730 | |
1731 | /* set load time so that error rate can be tracked */ | |
1732 | mci->start_time = jiffies; | |
1733 | ||
1734 | if (edac_create_sysfs_mci_device(mci)) { | |
537fba28 DP |
1735 | edac_mc_printk(mci, KERN_WARNING, |
1736 | "failed to create sysfs device\n"); | |
028a7b6d | 1737 | goto fail1; |
da9bb1d2 AC |
1738 | } |
1739 | ||
1740 | /* Report action taken */ | |
37f04581 DT |
1741 | edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n", |
1742 | mci->mod_name, mci->ctl_name, dev_name(mci->dev)); | |
da9bb1d2 | 1743 | |
028a7b6d DP |
1744 | up(&mem_ctls_mutex); |
1745 | return 0; | |
da9bb1d2 | 1746 | |
028a7b6d DP |
1747 | fail1: |
1748 | del_mc_from_global_list(mci); | |
1749 | ||
1750 | fail0: | |
da9bb1d2 | 1751 | up(&mem_ctls_mutex); |
028a7b6d | 1752 | return 1; |
da9bb1d2 | 1753 | } |
9110540f | 1754 | EXPORT_SYMBOL_GPL(edac_mc_add_mc); |
da9bb1d2 | 1755 | |
da9bb1d2 | 1756 | /** |
472678eb DP |
1757 | * edac_mc_del_mc: Remove sysfs entries for specified mci structure and |
1758 | * remove mci structure from global list | |
37f04581 | 1759 | * @pdev: Pointer to 'struct device' representing mci structure to remove. |
da9bb1d2 | 1760 | * |
18dbc337 | 1761 | * Return pointer to removed mci structure, or NULL if device not found. |
da9bb1d2 | 1762 | */ |
37f04581 | 1763 | struct mem_ctl_info * edac_mc_del_mc(struct device *dev) |
da9bb1d2 | 1764 | { |
18dbc337 | 1765 | struct mem_ctl_info *mci; |
da9bb1d2 | 1766 | |
18dbc337 | 1767 | debugf0("MC: %s()\n", __func__); |
da9bb1d2 | 1768 | down(&mem_ctls_mutex); |
18dbc337 | 1769 | |
37f04581 | 1770 | if ((mci = find_mci_by_dev(dev)) == NULL) { |
18dbc337 DP |
1771 | up(&mem_ctls_mutex); |
1772 | return NULL; | |
1773 | } | |
1774 | ||
1775 | edac_remove_sysfs_mci_device(mci); | |
da9bb1d2 | 1776 | del_mc_from_global_list(mci); |
18dbc337 | 1777 | up(&mem_ctls_mutex); |
537fba28 | 1778 | edac_printk(KERN_INFO, EDAC_MC, |
37f04581 DT |
1779 | "Removed device %d for %s %s: DEV %s\n", mci->mc_idx, |
1780 | mci->mod_name, mci->ctl_name, dev_name(mci->dev)); | |
18dbc337 | 1781 | return mci; |
da9bb1d2 | 1782 | } |
9110540f | 1783 | EXPORT_SYMBOL_GPL(edac_mc_del_mc); |
da9bb1d2 | 1784 | |
e7ecd891 | 1785 | void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size) |
da9bb1d2 AC |
1786 | { |
1787 | struct page *pg; | |
1788 | void *virt_addr; | |
1789 | unsigned long flags = 0; | |
1790 | ||
537fba28 | 1791 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1792 | |
1793 | /* ECC error page was not in our memory. Ignore it. */ | |
1794 | if(!pfn_valid(page)) | |
1795 | return; | |
1796 | ||
1797 | /* Find the actual page structure then map it and fix */ | |
1798 | pg = pfn_to_page(page); | |
1799 | ||
1800 | if (PageHighMem(pg)) | |
1801 | local_irq_save(flags); | |
1802 | ||
1803 | virt_addr = kmap_atomic(pg, KM_BOUNCE_READ); | |
1804 | ||
1805 | /* Perform architecture specific atomic scrub operation */ | |
1806 | atomic_scrub(virt_addr + offset, size); | |
1807 | ||
1808 | /* Unmap and complete */ | |
1809 | kunmap_atomic(virt_addr, KM_BOUNCE_READ); | |
1810 | ||
1811 | if (PageHighMem(pg)) | |
1812 | local_irq_restore(flags); | |
1813 | } | |
9110540f | 1814 | EXPORT_SYMBOL_GPL(edac_mc_scrub_block); |
da9bb1d2 | 1815 | |
da9bb1d2 | 1816 | /* FIXME - should return -1 */ |
e7ecd891 | 1817 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) |
da9bb1d2 AC |
1818 | { |
1819 | struct csrow_info *csrows = mci->csrows; | |
1820 | int row, i; | |
1821 | ||
537fba28 | 1822 | debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); |
da9bb1d2 AC |
1823 | row = -1; |
1824 | ||
1825 | for (i = 0; i < mci->nr_csrows; i++) { | |
1826 | struct csrow_info *csrow = &csrows[i]; | |
1827 | ||
1828 | if (csrow->nr_pages == 0) | |
1829 | continue; | |
1830 | ||
537fba28 DP |
1831 | debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " |
1832 | "mask(0x%lx)\n", mci->mc_idx, __func__, | |
1833 | csrow->first_page, page, csrow->last_page, | |
1834 | csrow->page_mask); | |
da9bb1d2 AC |
1835 | |
1836 | if ((page >= csrow->first_page) && | |
1837 | (page <= csrow->last_page) && | |
1838 | ((page & csrow->page_mask) == | |
1839 | (csrow->first_page & csrow->page_mask))) { | |
1840 | row = i; | |
1841 | break; | |
1842 | } | |
1843 | } | |
1844 | ||
1845 | if (row == -1) | |
537fba28 DP |
1846 | edac_mc_printk(mci, KERN_ERR, |
1847 | "could not look up page error address %lx\n", | |
1848 | (unsigned long) page); | |
da9bb1d2 AC |
1849 | |
1850 | return row; | |
1851 | } | |
9110540f | 1852 | EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page); |
da9bb1d2 | 1853 | |
da9bb1d2 AC |
1854 | /* FIXME - setable log (warning/emerg) levels */ |
1855 | /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */ | |
1856 | void edac_mc_handle_ce(struct mem_ctl_info *mci, | |
e7ecd891 DP |
1857 | unsigned long page_frame_number, unsigned long offset_in_page, |
1858 | unsigned long syndrome, int row, int channel, const char *msg) | |
da9bb1d2 AC |
1859 | { |
1860 | unsigned long remapped_page; | |
1861 | ||
537fba28 | 1862 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1863 | |
1864 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1865 | if (row >= mci->nr_csrows || row < 0) { | |
1866 | /* something is wrong */ | |
537fba28 DP |
1867 | edac_mc_printk(mci, KERN_ERR, |
1868 | "INTERNAL ERROR: row out of range " | |
1869 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1870 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1871 | return; | |
1872 | } | |
e7ecd891 | 1873 | |
da9bb1d2 AC |
1874 | if (channel >= mci->csrows[row].nr_channels || channel < 0) { |
1875 | /* something is wrong */ | |
537fba28 DP |
1876 | edac_mc_printk(mci, KERN_ERR, |
1877 | "INTERNAL ERROR: channel out of range " | |
1878 | "(%d >= %d)\n", channel, | |
1879 | mci->csrows[row].nr_channels); | |
da9bb1d2 AC |
1880 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1881 | return; | |
1882 | } | |
1883 | ||
1884 | if (log_ce) | |
1885 | /* FIXME - put in DIMM location */ | |
537fba28 DP |
1886 | edac_mc_printk(mci, KERN_WARNING, |
1887 | "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " | |
1888 | "0x%lx, row %d, channel %d, label \"%s\": %s\n", | |
1889 | page_frame_number, offset_in_page, | |
1890 | mci->csrows[row].grain, syndrome, row, channel, | |
1891 | mci->csrows[row].channels[channel].label, msg); | |
da9bb1d2 AC |
1892 | |
1893 | mci->ce_count++; | |
1894 | mci->csrows[row].ce_count++; | |
1895 | mci->csrows[row].channels[channel].ce_count++; | |
1896 | ||
1897 | if (mci->scrub_mode & SCRUB_SW_SRC) { | |
1898 | /* | |
1899 | * Some MC's can remap memory so that it is still available | |
1900 | * at a different address when PCI devices map into memory. | |
1901 | * MC's that can't do this lose the memory where PCI devices | |
1902 | * are mapped. This mapping is MC dependant and so we call | |
1903 | * back into the MC driver for it to map the MC page to | |
1904 | * a physical (CPU) page which can then be mapped to a virtual | |
1905 | * page - which can then be scrubbed. | |
1906 | */ | |
1907 | remapped_page = mci->ctl_page_to_phys ? | |
1908 | mci->ctl_page_to_phys(mci, page_frame_number) : | |
1909 | page_frame_number; | |
1910 | ||
1911 | edac_mc_scrub_block(remapped_page, offset_in_page, | |
e7ecd891 | 1912 | mci->csrows[row].grain); |
da9bb1d2 AC |
1913 | } |
1914 | } | |
9110540f | 1915 | EXPORT_SYMBOL_GPL(edac_mc_handle_ce); |
da9bb1d2 | 1916 | |
e7ecd891 | 1917 | void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg) |
da9bb1d2 AC |
1918 | { |
1919 | if (log_ce) | |
537fba28 DP |
1920 | edac_mc_printk(mci, KERN_WARNING, |
1921 | "CE - no information available: %s\n", msg); | |
e7ecd891 | 1922 | |
da9bb1d2 AC |
1923 | mci->ce_noinfo_count++; |
1924 | mci->ce_count++; | |
1925 | } | |
9110540f | 1926 | EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info); |
da9bb1d2 | 1927 | |
da9bb1d2 | 1928 | void edac_mc_handle_ue(struct mem_ctl_info *mci, |
e7ecd891 DP |
1929 | unsigned long page_frame_number, unsigned long offset_in_page, |
1930 | int row, const char *msg) | |
da9bb1d2 AC |
1931 | { |
1932 | int len = EDAC_MC_LABEL_LEN * 4; | |
1933 | char labels[len + 1]; | |
1934 | char *pos = labels; | |
1935 | int chan; | |
1936 | int chars; | |
1937 | ||
537fba28 | 1938 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1939 | |
1940 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1941 | if (row >= mci->nr_csrows || row < 0) { | |
1942 | /* something is wrong */ | |
537fba28 DP |
1943 | edac_mc_printk(mci, KERN_ERR, |
1944 | "INTERNAL ERROR: row out of range " | |
1945 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1946 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); |
1947 | return; | |
1948 | } | |
1949 | ||
1950 | chars = snprintf(pos, len + 1, "%s", | |
e7ecd891 | 1951 | mci->csrows[row].channels[0].label); |
da9bb1d2 AC |
1952 | len -= chars; |
1953 | pos += chars; | |
e7ecd891 | 1954 | |
da9bb1d2 AC |
1955 | for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); |
1956 | chan++) { | |
1957 | chars = snprintf(pos, len + 1, ":%s", | |
e7ecd891 | 1958 | mci->csrows[row].channels[chan].label); |
da9bb1d2 AC |
1959 | len -= chars; |
1960 | pos += chars; | |
1961 | } | |
1962 | ||
1963 | if (log_ue) | |
537fba28 DP |
1964 | edac_mc_printk(mci, KERN_EMERG, |
1965 | "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " | |
1966 | "labels \"%s\": %s\n", page_frame_number, | |
1967 | offset_in_page, mci->csrows[row].grain, row, labels, | |
1968 | msg); | |
da9bb1d2 AC |
1969 | |
1970 | if (panic_on_ue) | |
e7ecd891 DP |
1971 | panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, " |
1972 | "row %d, labels \"%s\": %s\n", mci->mc_idx, | |
1973 | page_frame_number, offset_in_page, | |
1974 | mci->csrows[row].grain, row, labels, msg); | |
da9bb1d2 AC |
1975 | |
1976 | mci->ue_count++; | |
1977 | mci->csrows[row].ue_count++; | |
1978 | } | |
9110540f | 1979 | EXPORT_SYMBOL_GPL(edac_mc_handle_ue); |
da9bb1d2 | 1980 | |
e7ecd891 | 1981 | void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg) |
da9bb1d2 AC |
1982 | { |
1983 | if (panic_on_ue) | |
1984 | panic("EDAC MC%d: Uncorrected Error", mci->mc_idx); | |
1985 | ||
1986 | if (log_ue) | |
537fba28 DP |
1987 | edac_mc_printk(mci, KERN_WARNING, |
1988 | "UE - no information available: %s\n", msg); | |
da9bb1d2 AC |
1989 | mci->ue_noinfo_count++; |
1990 | mci->ue_count++; | |
1991 | } | |
9110540f | 1992 | EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); |
da9bb1d2 | 1993 | |
da9bb1d2 AC |
1994 | |
1995 | /* | |
1996 | * Iterate over all MC instances and check for ECC, et al, errors | |
1997 | */ | |
e7ecd891 | 1998 | static inline void check_mc_devices(void) |
da9bb1d2 | 1999 | { |
da9bb1d2 AC |
2000 | struct list_head *item; |
2001 | struct mem_ctl_info *mci; | |
2002 | ||
537fba28 | 2003 | debugf3("%s()\n", __func__); |
18dbc337 | 2004 | down(&mem_ctls_mutex); |
da9bb1d2 AC |
2005 | |
2006 | list_for_each(item, &mc_devices) { | |
2007 | mci = list_entry(item, struct mem_ctl_info, link); | |
2008 | ||
2009 | if (mci->edac_check != NULL) | |
2010 | mci->edac_check(mci); | |
2011 | } | |
2012 | ||
18dbc337 | 2013 | up(&mem_ctls_mutex); |
da9bb1d2 AC |
2014 | } |
2015 | ||
da9bb1d2 AC |
2016 | /* |
2017 | * Check MC status every poll_msec. | |
2018 | * Check PCI status every poll_msec as well. | |
2019 | * | |
2020 | * This where the work gets done for edac. | |
2021 | * | |
2022 | * SMP safe, doesn't use NMI, and auto-rate-limits. | |
2023 | */ | |
2024 | static void do_edac_check(void) | |
2025 | { | |
537fba28 | 2026 | debugf3("%s()\n", __func__); |
da9bb1d2 | 2027 | check_mc_devices(); |
da9bb1d2 AC |
2028 | do_pci_parity_check(); |
2029 | } | |
2030 | ||
da9bb1d2 AC |
2031 | static int edac_kernel_thread(void *arg) |
2032 | { | |
f2fe42ab DP |
2033 | while (!kthread_should_stop()) { |
2034 | do_edac_check(); | |
da9bb1d2 AC |
2035 | |
2036 | /* goto sleep for the interval */ | |
f2fe42ab | 2037 | schedule_timeout_interruptible((HZ * poll_msec) / 1000); |
da9bb1d2 AC |
2038 | try_to_freeze(); |
2039 | } | |
2040 | ||
da9bb1d2 AC |
2041 | return 0; |
2042 | } | |
2043 | ||
2044 | /* | |
2045 | * edac_mc_init | |
2046 | * module initialization entry point | |
2047 | */ | |
2048 | static int __init edac_mc_init(void) | |
2049 | { | |
537fba28 | 2050 | edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n"); |
da9bb1d2 AC |
2051 | |
2052 | /* | |
2053 | * Harvest and clear any boot/initialization PCI parity errors | |
2054 | * | |
2055 | * FIXME: This only clears errors logged by devices present at time of | |
2056 | * module initialization. We should also do an initial clear | |
2057 | * of each newly hotplugged device. | |
2058 | */ | |
2059 | clear_pci_parity_errors(); | |
2060 | ||
7f927fcc | 2061 | /* Create the MC sysfs entries */ |
da9bb1d2 | 2062 | if (edac_sysfs_memctrl_setup()) { |
537fba28 DP |
2063 | edac_printk(KERN_ERR, EDAC_MC, |
2064 | "Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2065 | return -ENODEV; |
2066 | } | |
2067 | ||
2068 | /* Create the PCI parity sysfs entries */ | |
2069 | if (edac_sysfs_pci_setup()) { | |
2070 | edac_sysfs_memctrl_teardown(); | |
537fba28 DP |
2071 | edac_printk(KERN_ERR, EDAC_MC, |
2072 | "EDAC PCI: Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2073 | return -ENODEV; |
2074 | } | |
2075 | ||
da9bb1d2 | 2076 | /* create our kernel thread */ |
f2fe42ab | 2077 | edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac"); |
e7ecd891 | 2078 | |
f2fe42ab | 2079 | if (IS_ERR(edac_thread)) { |
da9bb1d2 AC |
2080 | /* remove the sysfs entries */ |
2081 | edac_sysfs_memctrl_teardown(); | |
2082 | edac_sysfs_pci_teardown(); | |
f2fe42ab | 2083 | return PTR_ERR(edac_thread); |
da9bb1d2 AC |
2084 | } |
2085 | ||
da9bb1d2 AC |
2086 | return 0; |
2087 | } | |
2088 | ||
da9bb1d2 AC |
2089 | /* |
2090 | * edac_mc_exit() | |
2091 | * module exit/termination functioni | |
2092 | */ | |
2093 | static void __exit edac_mc_exit(void) | |
2094 | { | |
537fba28 | 2095 | debugf0("%s()\n", __func__); |
f2fe42ab | 2096 | kthread_stop(edac_thread); |
da9bb1d2 AC |
2097 | |
2098 | /* tear down the sysfs device */ | |
2099 | edac_sysfs_memctrl_teardown(); | |
2100 | edac_sysfs_pci_teardown(); | |
2101 | } | |
2102 | ||
da9bb1d2 AC |
2103 | module_init(edac_mc_init); |
2104 | module_exit(edac_mc_exit); | |
2105 | ||
2106 | MODULE_LICENSE("GPL"); | |
2107 | MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" | |
e7ecd891 | 2108 | "Based on work by Dan Hollis et al"); |
da9bb1d2 AC |
2109 | MODULE_DESCRIPTION("Core library routines for MC reporting"); |
2110 | ||
2111 | module_param(panic_on_ue, int, 0644); | |
2112 | MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); | |
37f04581 | 2113 | #ifdef CONFIG_PCI |
da9bb1d2 AC |
2114 | module_param(check_pci_parity, int, 0644); |
2115 | MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on"); | |
2116 | module_param(panic_on_pci_parity, int, 0644); | |
2117 | MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on"); | |
37f04581 | 2118 | #endif |
da9bb1d2 AC |
2119 | module_param(log_ue, int, 0644); |
2120 | MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on"); | |
2121 | module_param(log_ce, int, 0644); | |
2122 | MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on"); | |
2123 | module_param(poll_msec, int, 0644); | |
2124 | MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds"); | |
2125 | #ifdef CONFIG_EDAC_DEBUG | |
2126 | module_param(edac_debug_level, int, 0644); | |
2127 | MODULE_PARM_DESC(edac_debug_level, "Debug level"); | |
2128 | #endif |