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da9bb1d2 AC |
1 | /* |
2 | * edac_mc kernel module | |
3 | * (C) 2005 Linux Networx (http://lnxi.com) | |
4 | * This file may be distributed under the terms of the | |
5 | * GNU General Public License. | |
6 | * | |
7 | * Written by Thayne Harbaugh | |
8 | * Based on work by Dan Hollis <goemon at anime dot net> and others. | |
9 | * http://www.anime.net/~goemon/linux-ecc/ | |
10 | * | |
11 | * Modified by Dave Peterson and Doug Thompson | |
12 | * | |
13 | */ | |
14 | ||
15 | ||
16 | #include <linux/config.h> | |
da9bb1d2 AC |
17 | #include <linux/module.h> |
18 | #include <linux/proc_fs.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/smp.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/sysctl.h> | |
24 | #include <linux/highmem.h> | |
25 | #include <linux/timer.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/jiffies.h> | |
28 | #include <linux/spinlock.h> | |
29 | #include <linux/list.h> | |
30 | #include <linux/sysdev.h> | |
31 | #include <linux/ctype.h> | |
f2fe42ab | 32 | #include <linux/kthread.h> |
da9bb1d2 AC |
33 | |
34 | #include <asm/uaccess.h> | |
35 | #include <asm/page.h> | |
36 | #include <asm/edac.h> | |
37 | ||
38 | #include "edac_mc.h" | |
39 | ||
537fba28 | 40 | #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__ |
da9bb1d2 | 41 | |
ceb2ca9c DP |
42 | /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC |
43 | * presents to user space needs more thought, and is likely to change | |
44 | * substantially. | |
45 | */ | |
46 | #define DISABLE_EDAC_SYSFS | |
47 | ||
da9bb1d2 AC |
48 | #ifdef CONFIG_EDAC_DEBUG |
49 | /* Values of 0 to 4 will generate output */ | |
50 | int edac_debug_level = 1; | |
51 | EXPORT_SYMBOL(edac_debug_level); | |
52 | #endif | |
53 | ||
54 | /* EDAC Controls, setable by module parameter, and sysfs */ | |
55 | static int log_ue = 1; | |
56 | static int log_ce = 1; | |
ceb2ca9c | 57 | static int panic_on_ue; |
da9bb1d2 AC |
58 | static int poll_msec = 1000; |
59 | ||
60 | static int check_pci_parity = 0; /* default YES check PCI parity */ | |
61 | static int panic_on_pci_parity; /* default no panic on PCI Parity */ | |
62 | static atomic_t pci_parity_count = ATOMIC_INIT(0); | |
63 | ||
64 | /* lock to memory controller's control array */ | |
65 | static DECLARE_MUTEX(mem_ctls_mutex); | |
66 | static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices); | |
67 | ||
f2fe42ab DP |
68 | static struct task_struct *edac_thread; |
69 | ||
da9bb1d2 AC |
70 | /* Structure of the whitelist and blacklist arrays */ |
71 | struct edac_pci_device_list { | |
72 | unsigned int vendor; /* Vendor ID */ | |
73 | unsigned int device; /* Deviice ID */ | |
74 | }; | |
75 | ||
76 | ||
77 | #define MAX_LISTED_PCI_DEVICES 32 | |
78 | ||
79 | /* List of PCI devices (vendor-id:device-id) that should be skipped */ | |
80 | static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES]; | |
81 | static int pci_blacklist_count; | |
82 | ||
83 | /* List of PCI devices (vendor-id:device-id) that should be scanned */ | |
84 | static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES]; | |
85 | static int pci_whitelist_count ; | |
86 | ||
87 | /* START sysfs data and methods */ | |
88 | ||
ceb2ca9c DP |
89 | #ifndef DISABLE_EDAC_SYSFS |
90 | ||
da9bb1d2 AC |
91 | static const char *mem_types[] = { |
92 | [MEM_EMPTY] = "Empty", | |
93 | [MEM_RESERVED] = "Reserved", | |
94 | [MEM_UNKNOWN] = "Unknown", | |
95 | [MEM_FPM] = "FPM", | |
96 | [MEM_EDO] = "EDO", | |
97 | [MEM_BEDO] = "BEDO", | |
98 | [MEM_SDR] = "Unbuffered-SDR", | |
99 | [MEM_RDR] = "Registered-SDR", | |
100 | [MEM_DDR] = "Unbuffered-DDR", | |
101 | [MEM_RDDR] = "Registered-DDR", | |
102 | [MEM_RMBS] = "RMBS" | |
103 | }; | |
104 | ||
105 | static const char *dev_types[] = { | |
106 | [DEV_UNKNOWN] = "Unknown", | |
107 | [DEV_X1] = "x1", | |
108 | [DEV_X2] = "x2", | |
109 | [DEV_X4] = "x4", | |
110 | [DEV_X8] = "x8", | |
111 | [DEV_X16] = "x16", | |
112 | [DEV_X32] = "x32", | |
113 | [DEV_X64] = "x64" | |
114 | }; | |
115 | ||
116 | static const char *edac_caps[] = { | |
117 | [EDAC_UNKNOWN] = "Unknown", | |
118 | [EDAC_NONE] = "None", | |
119 | [EDAC_RESERVED] = "Reserved", | |
120 | [EDAC_PARITY] = "PARITY", | |
121 | [EDAC_EC] = "EC", | |
122 | [EDAC_SECDED] = "SECDED", | |
123 | [EDAC_S2ECD2ED] = "S2ECD2ED", | |
124 | [EDAC_S4ECD4ED] = "S4ECD4ED", | |
125 | [EDAC_S8ECD8ED] = "S8ECD8ED", | |
126 | [EDAC_S16ECD16ED] = "S16ECD16ED" | |
127 | }; | |
128 | ||
129 | ||
130 | /* sysfs object: /sys/devices/system/edac */ | |
131 | static struct sysdev_class edac_class = { | |
132 | set_kset_name("edac"), | |
133 | }; | |
134 | ||
135 | /* sysfs objects: | |
136 | * /sys/devices/system/edac/mc | |
137 | * /sys/devices/system/edac/pci | |
138 | */ | |
139 | static struct kobject edac_memctrl_kobj; | |
140 | static struct kobject edac_pci_kobj; | |
141 | ||
472678eb DP |
142 | /* We use these to wait for the reference counts on edac_memctrl_kobj and |
143 | * edac_pci_kobj to reach 0. | |
144 | */ | |
145 | static struct completion edac_memctrl_kobj_complete; | |
146 | static struct completion edac_pci_kobj_complete; | |
147 | ||
da9bb1d2 AC |
148 | /* |
149 | * /sys/devices/system/edac/mc; | |
150 | * data structures and methods | |
151 | */ | |
4136cabf | 152 | #if 0 |
da9bb1d2 AC |
153 | static ssize_t memctrl_string_show(void *ptr, char *buffer) |
154 | { | |
155 | char *value = (char*) ptr; | |
156 | return sprintf(buffer, "%s\n", value); | |
157 | } | |
4136cabf | 158 | #endif |
da9bb1d2 AC |
159 | |
160 | static ssize_t memctrl_int_show(void *ptr, char *buffer) | |
161 | { | |
162 | int *value = (int*) ptr; | |
163 | return sprintf(buffer, "%d\n", *value); | |
164 | } | |
165 | ||
166 | static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count) | |
167 | { | |
168 | int *value = (int*) ptr; | |
169 | ||
170 | if (isdigit(*buffer)) | |
171 | *value = simple_strtoul(buffer, NULL, 0); | |
172 | ||
173 | return count; | |
174 | } | |
175 | ||
176 | struct memctrl_dev_attribute { | |
177 | struct attribute attr; | |
178 | void *value; | |
179 | ssize_t (*show)(void *,char *); | |
180 | ssize_t (*store)(void *, const char *, size_t); | |
181 | }; | |
182 | ||
183 | /* Set of show/store abstract level functions for memory control object */ | |
184 | static ssize_t | |
185 | memctrl_dev_show(struct kobject *kobj, struct attribute *attr, char *buffer) | |
186 | { | |
187 | struct memctrl_dev_attribute *memctrl_dev; | |
188 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
189 | ||
190 | if (memctrl_dev->show) | |
191 | return memctrl_dev->show(memctrl_dev->value, buffer); | |
192 | return -EIO; | |
193 | } | |
194 | ||
195 | static ssize_t | |
196 | memctrl_dev_store(struct kobject *kobj, struct attribute *attr, | |
197 | const char *buffer, size_t count) | |
198 | { | |
199 | struct memctrl_dev_attribute *memctrl_dev; | |
200 | memctrl_dev = (struct memctrl_dev_attribute*)attr; | |
201 | ||
202 | if (memctrl_dev->store) | |
203 | return memctrl_dev->store(memctrl_dev->value, buffer, count); | |
204 | return -EIO; | |
205 | } | |
206 | ||
207 | static struct sysfs_ops memctrlfs_ops = { | |
208 | .show = memctrl_dev_show, | |
209 | .store = memctrl_dev_store | |
210 | }; | |
211 | ||
212 | #define MEMCTRL_ATTR(_name,_mode,_show,_store) \ | |
213 | struct memctrl_dev_attribute attr_##_name = { \ | |
214 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
215 | .value = &_name, \ | |
216 | .show = _show, \ | |
217 | .store = _store, \ | |
218 | }; | |
219 | ||
220 | #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
221 | struct memctrl_dev_attribute attr_##_name = { \ | |
222 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
223 | .value = _data, \ | |
224 | .show = _show, \ | |
225 | .store = _store, \ | |
226 | }; | |
227 | ||
228 | /* cwrow<id> attribute f*/ | |
4136cabf | 229 | #if 0 |
da9bb1d2 | 230 | MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL); |
4136cabf | 231 | #endif |
da9bb1d2 AC |
232 | |
233 | /* csrow<id> control files */ | |
234 | MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
235 | MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
236 | MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
237 | MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); | |
238 | ||
239 | ||
240 | /* Base Attributes of the memory ECC object */ | |
241 | static struct memctrl_dev_attribute *memctrl_attr[] = { | |
242 | &attr_panic_on_ue, | |
243 | &attr_log_ue, | |
244 | &attr_log_ce, | |
245 | &attr_poll_msec, | |
da9bb1d2 AC |
246 | NULL, |
247 | }; | |
248 | ||
249 | /* Main MC kobject release() function */ | |
250 | static void edac_memctrl_master_release(struct kobject *kobj) | |
251 | { | |
537fba28 | 252 | debugf1("%s()\n", __func__); |
472678eb | 253 | complete(&edac_memctrl_kobj_complete); |
da9bb1d2 AC |
254 | } |
255 | ||
256 | static struct kobj_type ktype_memctrl = { | |
257 | .release = edac_memctrl_master_release, | |
258 | .sysfs_ops = &memctrlfs_ops, | |
259 | .default_attrs = (struct attribute **) memctrl_attr, | |
260 | }; | |
261 | ||
ceb2ca9c | 262 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
263 | |
264 | /* Initialize the main sysfs entries for edac: | |
265 | * /sys/devices/system/edac | |
266 | * | |
267 | * and children | |
268 | * | |
269 | * Return: 0 SUCCESS | |
270 | * !0 FAILURE | |
271 | */ | |
272 | static int edac_sysfs_memctrl_setup(void) | |
ceb2ca9c DP |
273 | #ifdef DISABLE_EDAC_SYSFS |
274 | { | |
275 | return 0; | |
276 | } | |
277 | #else | |
da9bb1d2 AC |
278 | { |
279 | int err=0; | |
280 | ||
537fba28 | 281 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
282 | |
283 | /* create the /sys/devices/system/edac directory */ | |
284 | err = sysdev_class_register(&edac_class); | |
285 | if (!err) { | |
286 | /* Init the MC's kobject */ | |
287 | memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj)); | |
da9bb1d2 AC |
288 | edac_memctrl_kobj.parent = &edac_class.kset.kobj; |
289 | edac_memctrl_kobj.ktype = &ktype_memctrl; | |
290 | ||
291 | /* generate sysfs "..../edac/mc" */ | |
292 | err = kobject_set_name(&edac_memctrl_kobj,"mc"); | |
293 | if (!err) { | |
294 | /* FIXME: maybe new sysdev_create_subdir() */ | |
295 | err = kobject_register(&edac_memctrl_kobj); | |
296 | if (err) { | |
297 | debugf1("Failed to register '.../edac/mc'\n"); | |
298 | } else { | |
299 | debugf1("Registered '.../edac/mc' kobject\n"); | |
300 | } | |
301 | } | |
302 | } else { | |
537fba28 | 303 | debugf1("%s() error=%d\n", __func__, err); |
da9bb1d2 AC |
304 | } |
305 | ||
306 | return err; | |
307 | } | |
ceb2ca9c | 308 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
309 | |
310 | /* | |
311 | * MC teardown: | |
312 | * the '..../edac/mc' kobject followed by '..../edac' itself | |
313 | */ | |
314 | static void edac_sysfs_memctrl_teardown(void) | |
315 | { | |
ceb2ca9c | 316 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
317 | debugf0("MC: " __FILE__ ": %s()\n", __func__); |
318 | ||
472678eb DP |
319 | /* Unregister the MC's kobject and wait for reference count to reach |
320 | * 0. | |
321 | */ | |
322 | init_completion(&edac_memctrl_kobj_complete); | |
da9bb1d2 | 323 | kobject_unregister(&edac_memctrl_kobj); |
472678eb | 324 | wait_for_completion(&edac_memctrl_kobj_complete); |
da9bb1d2 | 325 | |
da9bb1d2 AC |
326 | /* Unregister the 'edac' object */ |
327 | sysdev_class_unregister(&edac_class); | |
ceb2ca9c | 328 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
329 | } |
330 | ||
ceb2ca9c DP |
331 | #ifndef DISABLE_EDAC_SYSFS |
332 | ||
da9bb1d2 AC |
333 | /* |
334 | * /sys/devices/system/edac/pci; | |
335 | * data structures and methods | |
336 | */ | |
337 | ||
338 | struct list_control { | |
339 | struct edac_pci_device_list *list; | |
340 | int *count; | |
341 | }; | |
342 | ||
4136cabf AV |
343 | |
344 | #if 0 | |
da9bb1d2 AC |
345 | /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */ |
346 | static ssize_t edac_pci_list_string_show(void *ptr, char *buffer) | |
347 | { | |
348 | struct list_control *listctl; | |
349 | struct edac_pci_device_list *list; | |
350 | char *p = buffer; | |
351 | int len=0; | |
352 | int i; | |
353 | ||
354 | listctl = ptr; | |
355 | list = listctl->list; | |
356 | ||
357 | for (i = 0; i < *(listctl->count); i++, list++ ) { | |
358 | if (len > 0) | |
359 | len += snprintf(p + len, (PAGE_SIZE-len), ","); | |
360 | ||
361 | len += snprintf(p + len, | |
362 | (PAGE_SIZE-len), | |
363 | "%x:%x", | |
364 | list->vendor,list->device); | |
365 | } | |
366 | ||
367 | len += snprintf(p + len,(PAGE_SIZE-len), "\n"); | |
368 | ||
369 | return (ssize_t) len; | |
370 | } | |
371 | ||
372 | /** | |
373 | * | |
374 | * Scan string from **s to **e looking for one 'vendor:device' tuple | |
375 | * where each field is a hex value | |
376 | * | |
377 | * return 0 if an entry is NOT found | |
378 | * return 1 if an entry is found | |
379 | * fill in *vendor_id and *device_id with values found | |
380 | * | |
381 | * In both cases, make sure *s has been moved forward toward *e | |
382 | */ | |
383 | static int parse_one_device(const char **s,const char **e, | |
384 | unsigned int *vendor_id, unsigned int *device_id) | |
385 | { | |
386 | const char *runner, *p; | |
387 | ||
388 | /* if null byte, we are done */ | |
389 | if (!**s) { | |
390 | (*s)++; /* keep *s moving */ | |
391 | return 0; | |
392 | } | |
393 | ||
394 | /* skip over newlines & whitespace */ | |
395 | if ((**s == '\n') || isspace(**s)) { | |
396 | (*s)++; | |
397 | return 0; | |
398 | } | |
399 | ||
400 | if (!isxdigit(**s)) { | |
401 | (*s)++; | |
402 | return 0; | |
403 | } | |
404 | ||
405 | /* parse vendor_id */ | |
406 | runner = *s; | |
407 | while (runner < *e) { | |
408 | /* scan for vendor:device delimiter */ | |
409 | if (*runner == ':') { | |
410 | *vendor_id = simple_strtol((char*) *s, (char**) &p, 16); | |
411 | runner = p + 1; | |
412 | break; | |
413 | } | |
414 | runner++; | |
415 | } | |
416 | ||
417 | if (!isxdigit(*runner)) { | |
418 | *s = ++runner; | |
419 | return 0; | |
420 | } | |
421 | ||
422 | /* parse device_id */ | |
423 | if (runner < *e) { | |
424 | *device_id = simple_strtol((char*)runner, (char**)&p, 16); | |
425 | runner = p; | |
426 | } | |
427 | ||
428 | *s = runner; | |
429 | ||
430 | return 1; | |
431 | } | |
432 | ||
433 | static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer, | |
434 | size_t count) | |
435 | { | |
436 | struct list_control *listctl; | |
437 | struct edac_pci_device_list *list; | |
438 | unsigned int vendor_id, device_id; | |
439 | const char *s, *e; | |
440 | int *index; | |
441 | ||
442 | s = (char*)buffer; | |
443 | e = s + count; | |
444 | ||
445 | listctl = ptr; | |
446 | list = listctl->list; | |
447 | index = listctl->count; | |
448 | ||
449 | *index = 0; | |
450 | while (*index < MAX_LISTED_PCI_DEVICES) { | |
451 | ||
452 | if (parse_one_device(&s,&e,&vendor_id,&device_id)) { | |
453 | list[ *index ].vendor = vendor_id; | |
454 | list[ *index ].device = device_id; | |
455 | (*index)++; | |
456 | } | |
457 | ||
458 | /* check for all data consume */ | |
459 | if (s >= e) | |
460 | break; | |
461 | } | |
462 | ||
463 | return count; | |
464 | } | |
465 | ||
4136cabf | 466 | #endif |
da9bb1d2 AC |
467 | static ssize_t edac_pci_int_show(void *ptr, char *buffer) |
468 | { | |
469 | int *value = ptr; | |
470 | return sprintf(buffer,"%d\n",*value); | |
471 | } | |
472 | ||
473 | static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count) | |
474 | { | |
475 | int *value = ptr; | |
476 | ||
477 | if (isdigit(*buffer)) | |
478 | *value = simple_strtoul(buffer,NULL,0); | |
479 | ||
480 | return count; | |
481 | } | |
482 | ||
483 | struct edac_pci_dev_attribute { | |
484 | struct attribute attr; | |
485 | void *value; | |
486 | ssize_t (*show)(void *,char *); | |
487 | ssize_t (*store)(void *, const char *,size_t); | |
488 | }; | |
489 | ||
490 | /* Set of show/store abstract level functions for PCI Parity object */ | |
491 | static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr, | |
492 | char *buffer) | |
493 | { | |
494 | struct edac_pci_dev_attribute *edac_pci_dev; | |
495 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
496 | ||
497 | if (edac_pci_dev->show) | |
498 | return edac_pci_dev->show(edac_pci_dev->value, buffer); | |
499 | return -EIO; | |
500 | } | |
501 | ||
502 | static ssize_t edac_pci_dev_store(struct kobject *kobj, struct attribute *attr, | |
503 | const char *buffer, size_t count) | |
504 | { | |
505 | struct edac_pci_dev_attribute *edac_pci_dev; | |
506 | edac_pci_dev= (struct edac_pci_dev_attribute*)attr; | |
507 | ||
508 | if (edac_pci_dev->show) | |
509 | return edac_pci_dev->store(edac_pci_dev->value, buffer, count); | |
510 | return -EIO; | |
511 | } | |
512 | ||
513 | static struct sysfs_ops edac_pci_sysfs_ops = { | |
514 | .show = edac_pci_dev_show, | |
515 | .store = edac_pci_dev_store | |
516 | }; | |
517 | ||
518 | ||
519 | #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \ | |
520 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
521 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
522 | .value = &_name, \ | |
523 | .show = _show, \ | |
524 | .store = _store, \ | |
525 | }; | |
526 | ||
527 | #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \ | |
528 | struct edac_pci_dev_attribute edac_pci_attr_##_name = { \ | |
529 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
530 | .value = _data, \ | |
531 | .show = _show, \ | |
532 | .store = _store, \ | |
533 | }; | |
534 | ||
4136cabf | 535 | #if 0 |
da9bb1d2 AC |
536 | static struct list_control pci_whitelist_control = { |
537 | .list = pci_whitelist, | |
538 | .count = &pci_whitelist_count | |
539 | }; | |
540 | ||
541 | static struct list_control pci_blacklist_control = { | |
542 | .list = pci_blacklist, | |
543 | .count = &pci_blacklist_count | |
544 | }; | |
545 | ||
546 | /* whitelist attribute */ | |
547 | EDAC_PCI_STRING_ATTR(pci_parity_whitelist, | |
548 | &pci_whitelist_control, | |
549 | S_IRUGO|S_IWUSR, | |
550 | edac_pci_list_string_show, | |
551 | edac_pci_list_string_store); | |
552 | ||
553 | EDAC_PCI_STRING_ATTR(pci_parity_blacklist, | |
554 | &pci_blacklist_control, | |
555 | S_IRUGO|S_IWUSR, | |
556 | edac_pci_list_string_show, | |
557 | edac_pci_list_string_store); | |
4136cabf | 558 | #endif |
da9bb1d2 AC |
559 | |
560 | /* PCI Parity control files */ | |
561 | EDAC_PCI_ATTR(check_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store); | |
562 | EDAC_PCI_ATTR(panic_on_pci_parity,S_IRUGO|S_IWUSR,edac_pci_int_show,edac_pci_int_store); | |
563 | EDAC_PCI_ATTR(pci_parity_count,S_IRUGO,edac_pci_int_show,NULL); | |
564 | ||
565 | /* Base Attributes of the memory ECC object */ | |
566 | static struct edac_pci_dev_attribute *edac_pci_attr[] = { | |
567 | &edac_pci_attr_check_pci_parity, | |
568 | &edac_pci_attr_panic_on_pci_parity, | |
569 | &edac_pci_attr_pci_parity_count, | |
da9bb1d2 AC |
570 | NULL, |
571 | }; | |
572 | ||
573 | /* No memory to release */ | |
574 | static void edac_pci_release(struct kobject *kobj) | |
575 | { | |
537fba28 | 576 | debugf1("%s()\n", __func__); |
472678eb | 577 | complete(&edac_pci_kobj_complete); |
da9bb1d2 AC |
578 | } |
579 | ||
580 | static struct kobj_type ktype_edac_pci = { | |
581 | .release = edac_pci_release, | |
582 | .sysfs_ops = &edac_pci_sysfs_ops, | |
583 | .default_attrs = (struct attribute **) edac_pci_attr, | |
584 | }; | |
585 | ||
ceb2ca9c DP |
586 | #endif /* DISABLE_EDAC_SYSFS */ |
587 | ||
da9bb1d2 AC |
588 | /** |
589 | * edac_sysfs_pci_setup() | |
590 | * | |
591 | */ | |
592 | static int edac_sysfs_pci_setup(void) | |
ceb2ca9c DP |
593 | #ifdef DISABLE_EDAC_SYSFS |
594 | { | |
595 | return 0; | |
596 | } | |
597 | #else | |
da9bb1d2 AC |
598 | { |
599 | int err; | |
600 | ||
537fba28 | 601 | debugf1("%s()\n", __func__); |
da9bb1d2 AC |
602 | |
603 | memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj)); | |
da9bb1d2 AC |
604 | edac_pci_kobj.parent = &edac_class.kset.kobj; |
605 | edac_pci_kobj.ktype = &ktype_edac_pci; | |
606 | ||
607 | err = kobject_set_name(&edac_pci_kobj, "pci"); | |
608 | if (!err) { | |
609 | /* Instanstiate the csrow object */ | |
610 | /* FIXME: maybe new sysdev_create_subdir() */ | |
611 | err = kobject_register(&edac_pci_kobj); | |
612 | if (err) | |
613 | debugf1("Failed to register '.../edac/pci'\n"); | |
614 | else | |
615 | debugf1("Registered '.../edac/pci' kobject\n"); | |
616 | } | |
617 | return err; | |
618 | } | |
ceb2ca9c | 619 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
620 | |
621 | static void edac_sysfs_pci_teardown(void) | |
622 | { | |
ceb2ca9c | 623 | #ifndef DISABLE_EDAC_SYSFS |
537fba28 | 624 | debugf0("%s()\n", __func__); |
472678eb | 625 | init_completion(&edac_pci_kobj_complete); |
da9bb1d2 | 626 | kobject_unregister(&edac_pci_kobj); |
472678eb | 627 | wait_for_completion(&edac_pci_kobj_complete); |
ceb2ca9c | 628 | #endif |
da9bb1d2 AC |
629 | } |
630 | ||
ceb2ca9c DP |
631 | #ifndef DISABLE_EDAC_SYSFS |
632 | ||
da9bb1d2 AC |
633 | /* EDAC sysfs CSROW data structures and methods */ |
634 | ||
635 | /* Set of more detailed csrow<id> attribute show/store functions */ | |
636 | static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data) | |
637 | { | |
638 | ssize_t size = 0; | |
639 | ||
640 | if (csrow->nr_channels > 0) { | |
641 | size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n", | |
642 | csrow->channels[0].label); | |
643 | } | |
644 | return size; | |
645 | } | |
646 | ||
647 | static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data) | |
648 | { | |
649 | ssize_t size = 0; | |
650 | ||
651 | if (csrow->nr_channels > 0) { | |
652 | size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", | |
653 | csrow->channels[1].label); | |
654 | } | |
655 | return size; | |
656 | } | |
657 | ||
658 | static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow, | |
659 | const char *data, size_t size) | |
660 | { | |
661 | ssize_t max_size = 0; | |
662 | ||
663 | if (csrow->nr_channels > 0) { | |
664 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
665 | strncpy(csrow->channels[0].label, data, max_size); | |
666 | csrow->channels[0].label[max_size] = '\0'; | |
667 | } | |
668 | return size; | |
669 | } | |
670 | ||
671 | static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow, | |
672 | const char *data, size_t size) | |
673 | { | |
674 | ssize_t max_size = 0; | |
675 | ||
676 | if (csrow->nr_channels > 1) { | |
677 | max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); | |
678 | strncpy(csrow->channels[1].label, data, max_size); | |
679 | csrow->channels[1].label[max_size] = '\0'; | |
680 | } | |
681 | return max_size; | |
682 | } | |
683 | ||
684 | static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data) | |
685 | { | |
686 | return sprintf(data,"%u\n", csrow->ue_count); | |
687 | } | |
688 | ||
689 | static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data) | |
690 | { | |
691 | return sprintf(data,"%u\n", csrow->ce_count); | |
692 | } | |
693 | ||
694 | static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data) | |
695 | { | |
696 | ssize_t size = 0; | |
697 | ||
698 | if (csrow->nr_channels > 0) { | |
699 | size = sprintf(data,"%u\n", csrow->channels[0].ce_count); | |
700 | } | |
701 | return size; | |
702 | } | |
703 | ||
704 | static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data) | |
705 | { | |
706 | ssize_t size = 0; | |
707 | ||
708 | if (csrow->nr_channels > 1) { | |
709 | size = sprintf(data,"%u\n", csrow->channels[1].ce_count); | |
710 | } | |
711 | return size; | |
712 | } | |
713 | ||
714 | static ssize_t csrow_size_show(struct csrow_info *csrow, char *data) | |
715 | { | |
716 | return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages)); | |
717 | } | |
718 | ||
719 | static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data) | |
720 | { | |
721 | return sprintf(data,"%s\n", mem_types[csrow->mtype]); | |
722 | } | |
723 | ||
724 | static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data) | |
725 | { | |
726 | return sprintf(data,"%s\n", dev_types[csrow->dtype]); | |
727 | } | |
728 | ||
729 | static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data) | |
730 | { | |
731 | return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]); | |
732 | } | |
733 | ||
734 | struct csrowdev_attribute { | |
735 | struct attribute attr; | |
736 | ssize_t (*show)(struct csrow_info *,char *); | |
737 | ssize_t (*store)(struct csrow_info *, const char *,size_t); | |
738 | }; | |
739 | ||
740 | #define to_csrow(k) container_of(k, struct csrow_info, kobj) | |
741 | #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr) | |
742 | ||
743 | /* Set of show/store higher level functions for csrow objects */ | |
744 | static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr, | |
745 | char *buffer) | |
746 | { | |
747 | struct csrow_info *csrow = to_csrow(kobj); | |
748 | struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr); | |
749 | ||
750 | if (csrowdev_attr->show) | |
751 | return csrowdev_attr->show(csrow, buffer); | |
752 | return -EIO; | |
753 | } | |
754 | ||
755 | static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr, | |
756 | const char *buffer, size_t count) | |
757 | { | |
758 | struct csrow_info *csrow = to_csrow(kobj); | |
759 | struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr); | |
760 | ||
761 | if (csrowdev_attr->store) | |
762 | return csrowdev_attr->store(csrow, buffer, count); | |
763 | return -EIO; | |
764 | } | |
765 | ||
766 | static struct sysfs_ops csrowfs_ops = { | |
767 | .show = csrowdev_show, | |
768 | .store = csrowdev_store | |
769 | }; | |
770 | ||
771 | #define CSROWDEV_ATTR(_name,_mode,_show,_store) \ | |
772 | struct csrowdev_attribute attr_##_name = { \ | |
773 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
774 | .show = _show, \ | |
775 | .store = _store, \ | |
776 | }; | |
777 | ||
778 | /* cwrow<id>/attribute files */ | |
779 | CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL); | |
780 | CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL); | |
781 | CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL); | |
782 | CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL); | |
783 | CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL); | |
784 | CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL); | |
785 | CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL); | |
786 | CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL); | |
787 | ||
788 | /* control/attribute files */ | |
789 | CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR, | |
790 | csrow_ch0_dimm_label_show, | |
791 | csrow_ch0_dimm_label_store); | |
792 | CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR, | |
793 | csrow_ch1_dimm_label_show, | |
794 | csrow_ch1_dimm_label_store); | |
795 | ||
796 | ||
797 | /* Attributes of the CSROW<id> object */ | |
798 | static struct csrowdev_attribute *csrow_attr[] = { | |
799 | &attr_dev_type, | |
800 | &attr_mem_type, | |
801 | &attr_edac_mode, | |
802 | &attr_size_mb, | |
803 | &attr_ue_count, | |
804 | &attr_ce_count, | |
805 | &attr_ch0_ce_count, | |
806 | &attr_ch1_ce_count, | |
807 | &attr_ch0_dimm_label, | |
808 | &attr_ch1_dimm_label, | |
809 | NULL, | |
810 | }; | |
811 | ||
812 | ||
813 | /* No memory to release */ | |
814 | static void edac_csrow_instance_release(struct kobject *kobj) | |
815 | { | |
472678eb DP |
816 | struct csrow_info *cs; |
817 | ||
537fba28 | 818 | debugf1("%s()\n", __func__); |
472678eb DP |
819 | cs = container_of(kobj, struct csrow_info, kobj); |
820 | complete(&cs->kobj_complete); | |
da9bb1d2 AC |
821 | } |
822 | ||
823 | static struct kobj_type ktype_csrow = { | |
824 | .release = edac_csrow_instance_release, | |
825 | .sysfs_ops = &csrowfs_ops, | |
826 | .default_attrs = (struct attribute **) csrow_attr, | |
827 | }; | |
828 | ||
829 | /* Create a CSROW object under specifed edac_mc_device */ | |
830 | static int edac_create_csrow_object(struct kobject *edac_mci_kobj, | |
831 | struct csrow_info *csrow, int index ) | |
832 | { | |
833 | int err = 0; | |
834 | ||
537fba28 | 835 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
836 | |
837 | memset(&csrow->kobj, 0, sizeof(csrow->kobj)); | |
838 | ||
839 | /* generate ..../edac/mc/mc<id>/csrow<index> */ | |
840 | ||
da9bb1d2 AC |
841 | csrow->kobj.parent = edac_mci_kobj; |
842 | csrow->kobj.ktype = &ktype_csrow; | |
843 | ||
844 | /* name this instance of csrow<id> */ | |
845 | err = kobject_set_name(&csrow->kobj,"csrow%d",index); | |
846 | if (!err) { | |
847 | /* Instanstiate the csrow object */ | |
848 | err = kobject_register(&csrow->kobj); | |
849 | if (err) | |
850 | debugf0("Failed to register CSROW%d\n",index); | |
851 | else | |
852 | debugf0("Registered CSROW%d\n",index); | |
853 | } | |
854 | ||
855 | return err; | |
856 | } | |
857 | ||
858 | /* sysfs data structures and methods for the MCI kobjects */ | |
859 | ||
860 | static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, | |
861 | const char *data, size_t count ) | |
862 | { | |
863 | int row, chan; | |
864 | ||
865 | mci->ue_noinfo_count = 0; | |
866 | mci->ce_noinfo_count = 0; | |
867 | mci->ue_count = 0; | |
868 | mci->ce_count = 0; | |
869 | for (row = 0; row < mci->nr_csrows; row++) { | |
870 | struct csrow_info *ri = &mci->csrows[row]; | |
871 | ||
872 | ri->ue_count = 0; | |
873 | ri->ce_count = 0; | |
874 | for (chan = 0; chan < ri->nr_channels; chan++) | |
875 | ri->channels[chan].ce_count = 0; | |
876 | } | |
877 | mci->start_time = jiffies; | |
878 | ||
879 | return count; | |
880 | } | |
881 | ||
882 | static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) | |
883 | { | |
884 | return sprintf(data,"%d\n", mci->ue_count); | |
885 | } | |
886 | ||
887 | static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data) | |
888 | { | |
889 | return sprintf(data,"%d\n", mci->ce_count); | |
890 | } | |
891 | ||
892 | static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data) | |
893 | { | |
894 | return sprintf(data,"%d\n", mci->ce_noinfo_count); | |
895 | } | |
896 | ||
897 | static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data) | |
898 | { | |
899 | return sprintf(data,"%d\n", mci->ue_noinfo_count); | |
900 | } | |
901 | ||
902 | static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data) | |
903 | { | |
904 | return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ); | |
905 | } | |
906 | ||
907 | static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data) | |
908 | { | |
909 | return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver); | |
910 | } | |
911 | ||
912 | static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) | |
913 | { | |
914 | return sprintf(data,"%s\n", mci->ctl_name); | |
915 | } | |
916 | ||
917 | static int mci_output_edac_cap(char *buf, unsigned long edac_cap) | |
918 | { | |
919 | char *p = buf; | |
920 | int bit_idx; | |
921 | ||
922 | for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) { | |
923 | if ((edac_cap >> bit_idx) & 0x1) | |
924 | p += sprintf(p, "%s ", edac_caps[bit_idx]); | |
925 | } | |
926 | ||
927 | return p - buf; | |
928 | } | |
929 | ||
930 | static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data) | |
931 | { | |
932 | char *p = data; | |
933 | ||
934 | p += mci_output_edac_cap(p,mci->edac_ctl_cap); | |
935 | p += sprintf(p, "\n"); | |
936 | ||
937 | return p - data; | |
938 | } | |
939 | ||
940 | static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci, | |
941 | char *data) | |
942 | { | |
943 | char *p = data; | |
944 | ||
945 | p += mci_output_edac_cap(p,mci->edac_cap); | |
946 | p += sprintf(p, "\n"); | |
947 | ||
948 | return p - data; | |
949 | } | |
950 | ||
951 | static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap) | |
952 | { | |
953 | char *p = buf; | |
954 | int bit_idx; | |
955 | ||
956 | for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) { | |
957 | if ((mtype_cap >> bit_idx) & 0x1) | |
958 | p += sprintf(p, "%s ", mem_types[bit_idx]); | |
959 | } | |
960 | ||
961 | return p - buf; | |
962 | } | |
963 | ||
964 | static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, char *data) | |
965 | { | |
966 | char *p = data; | |
967 | ||
968 | p += mci_output_mtype_cap(p,mci->mtype_cap); | |
969 | p += sprintf(p, "\n"); | |
970 | ||
971 | return p - data; | |
972 | } | |
973 | ||
974 | static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) | |
975 | { | |
976 | int total_pages, csrow_idx; | |
977 | ||
978 | for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; | |
979 | csrow_idx++) { | |
980 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; | |
981 | ||
982 | if (!csrow->nr_pages) | |
983 | continue; | |
984 | total_pages += csrow->nr_pages; | |
985 | } | |
986 | ||
987 | return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages)); | |
988 | } | |
989 | ||
990 | struct mcidev_attribute { | |
991 | struct attribute attr; | |
992 | ssize_t (*show)(struct mem_ctl_info *,char *); | |
993 | ssize_t (*store)(struct mem_ctl_info *, const char *,size_t); | |
994 | }; | |
995 | ||
996 | #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj) | |
997 | #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr) | |
998 | ||
999 | static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr, | |
1000 | char *buffer) | |
1001 | { | |
1002 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
1003 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
1004 | ||
1005 | if (mcidev_attr->show) | |
1006 | return mcidev_attr->show(mem_ctl_info, buffer); | |
1007 | return -EIO; | |
1008 | } | |
1009 | ||
1010 | static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr, | |
1011 | const char *buffer, size_t count) | |
1012 | { | |
1013 | struct mem_ctl_info *mem_ctl_info = to_mci(kobj); | |
1014 | struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr); | |
1015 | ||
1016 | if (mcidev_attr->store) | |
1017 | return mcidev_attr->store(mem_ctl_info, buffer, count); | |
1018 | return -EIO; | |
1019 | } | |
1020 | ||
1021 | static struct sysfs_ops mci_ops = { | |
1022 | .show = mcidev_show, | |
1023 | .store = mcidev_store | |
1024 | }; | |
1025 | ||
1026 | #define MCIDEV_ATTR(_name,_mode,_show,_store) \ | |
1027 | struct mcidev_attribute mci_attr_##_name = { \ | |
1028 | .attr = {.name = __stringify(_name), .mode = _mode }, \ | |
1029 | .show = _show, \ | |
1030 | .store = _store, \ | |
1031 | }; | |
1032 | ||
1033 | /* Control file */ | |
1034 | MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store); | |
1035 | ||
1036 | /* Attribute files */ | |
1037 | MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL); | |
1038 | MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL); | |
1039 | MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL); | |
1040 | MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL); | |
1041 | MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL); | |
1042 | MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL); | |
1043 | MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL); | |
1044 | MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); | |
1045 | MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); | |
1046 | MCIDEV_ATTR(edac_current_capability,S_IRUGO, | |
1047 | mci_edac_current_capability_show,NULL); | |
1048 | MCIDEV_ATTR(supported_mem_type,S_IRUGO, | |
1049 | mci_supported_mem_type_show,NULL); | |
1050 | ||
1051 | ||
1052 | static struct mcidev_attribute *mci_attr[] = { | |
1053 | &mci_attr_reset_counters, | |
1054 | &mci_attr_module_name, | |
1055 | &mci_attr_mc_name, | |
1056 | &mci_attr_edac_capability, | |
1057 | &mci_attr_edac_current_capability, | |
1058 | &mci_attr_supported_mem_type, | |
1059 | &mci_attr_size_mb, | |
1060 | &mci_attr_seconds_since_reset, | |
1061 | &mci_attr_ue_noinfo_count, | |
1062 | &mci_attr_ce_noinfo_count, | |
1063 | &mci_attr_ue_count, | |
1064 | &mci_attr_ce_count, | |
1065 | NULL | |
1066 | }; | |
1067 | ||
1068 | ||
1069 | /* | |
1070 | * Release of a MC controlling instance | |
1071 | */ | |
1072 | static void edac_mci_instance_release(struct kobject *kobj) | |
1073 | { | |
1074 | struct mem_ctl_info *mci; | |
da9bb1d2 | 1075 | |
472678eb DP |
1076 | mci = to_mci(kobj); |
1077 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); | |
1078 | complete(&mci->kobj_complete); | |
da9bb1d2 AC |
1079 | } |
1080 | ||
1081 | static struct kobj_type ktype_mci = { | |
1082 | .release = edac_mci_instance_release, | |
1083 | .sysfs_ops = &mci_ops, | |
1084 | .default_attrs = (struct attribute **) mci_attr, | |
1085 | }; | |
1086 | ||
ceb2ca9c DP |
1087 | #endif /* DISABLE_EDAC_SYSFS */ |
1088 | ||
da9bb1d2 AC |
1089 | #define EDAC_DEVICE_SYMLINK "device" |
1090 | ||
1091 | /* | |
1092 | * Create a new Memory Controller kobject instance, | |
1093 | * mc<id> under the 'mc' directory | |
1094 | * | |
1095 | * Return: | |
1096 | * 0 Success | |
1097 | * !0 Failure | |
1098 | */ | |
1099 | static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |
ceb2ca9c DP |
1100 | #ifdef DISABLE_EDAC_SYSFS |
1101 | { | |
1102 | return 0; | |
1103 | } | |
1104 | #else | |
da9bb1d2 AC |
1105 | { |
1106 | int i; | |
1107 | int err; | |
1108 | struct csrow_info *csrow; | |
1109 | struct kobject *edac_mci_kobj=&mci->edac_mci_kobj; | |
1110 | ||
537fba28 | 1111 | debugf0("%s() idx=%d\n", __func__, mci->mc_idx); |
da9bb1d2 AC |
1112 | |
1113 | memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj)); | |
da9bb1d2 AC |
1114 | |
1115 | /* set the name of the mc<id> object */ | |
1116 | err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx); | |
1117 | if (err) | |
1118 | return err; | |
1119 | ||
1120 | /* link to our parent the '..../edac/mc' object */ | |
1121 | edac_mci_kobj->parent = &edac_memctrl_kobj; | |
1122 | edac_mci_kobj->ktype = &ktype_mci; | |
1123 | ||
1124 | /* register the mc<id> kobject */ | |
1125 | err = kobject_register(edac_mci_kobj); | |
1126 | if (err) | |
1127 | return err; | |
1128 | ||
1129 | /* create a symlink for the device */ | |
1130 | err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj, | |
1131 | EDAC_DEVICE_SYMLINK); | |
6e5a8748 DP |
1132 | if (err) |
1133 | goto fail0; | |
da9bb1d2 AC |
1134 | |
1135 | /* Make directories for each CSROW object | |
1136 | * under the mc<id> kobject | |
1137 | */ | |
1138 | for (i = 0; i < mci->nr_csrows; i++) { | |
1139 | ||
1140 | csrow = &mci->csrows[i]; | |
1141 | ||
1142 | /* Only expose populated CSROWs */ | |
1143 | if (csrow->nr_pages > 0) { | |
1144 | err = edac_create_csrow_object(edac_mci_kobj,csrow,i); | |
1145 | if (err) | |
6e5a8748 | 1146 | goto fail1; |
da9bb1d2 AC |
1147 | } |
1148 | } | |
1149 | ||
da9bb1d2 AC |
1150 | return 0; |
1151 | ||
1152 | ||
1153 | /* CSROW error: backout what has already been registered, */ | |
6e5a8748 | 1154 | fail1: |
da9bb1d2 | 1155 | for ( i--; i >= 0; i--) { |
472678eb DP |
1156 | if (csrow->nr_pages > 0) { |
1157 | init_completion(&csrow->kobj_complete); | |
da9bb1d2 | 1158 | kobject_unregister(&mci->csrows[i].kobj); |
472678eb DP |
1159 | wait_for_completion(&csrow->kobj_complete); |
1160 | } | |
da9bb1d2 AC |
1161 | } |
1162 | ||
6e5a8748 | 1163 | fail0: |
472678eb | 1164 | init_completion(&mci->kobj_complete); |
da9bb1d2 | 1165 | kobject_unregister(edac_mci_kobj); |
472678eb | 1166 | wait_for_completion(&mci->kobj_complete); |
da9bb1d2 AC |
1167 | |
1168 | return err; | |
1169 | } | |
ceb2ca9c | 1170 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1171 | |
1172 | /* | |
1173 | * remove a Memory Controller instance | |
1174 | */ | |
1175 | static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | |
1176 | { | |
ceb2ca9c | 1177 | #ifndef DISABLE_EDAC_SYSFS |
da9bb1d2 AC |
1178 | int i; |
1179 | ||
537fba28 | 1180 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1181 | |
1182 | /* remove all csrow kobjects */ | |
1183 | for (i = 0; i < mci->nr_csrows; i++) { | |
472678eb DP |
1184 | if (mci->csrows[i].nr_pages > 0) { |
1185 | init_completion(&mci->csrows[i].kobj_complete); | |
da9bb1d2 | 1186 | kobject_unregister(&mci->csrows[i].kobj); |
472678eb DP |
1187 | wait_for_completion(&mci->csrows[i].kobj_complete); |
1188 | } | |
da9bb1d2 AC |
1189 | } |
1190 | ||
1191 | sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK); | |
472678eb | 1192 | init_completion(&mci->kobj_complete); |
da9bb1d2 | 1193 | kobject_unregister(&mci->edac_mci_kobj); |
472678eb | 1194 | wait_for_completion(&mci->kobj_complete); |
ceb2ca9c | 1195 | #endif /* DISABLE_EDAC_SYSFS */ |
da9bb1d2 AC |
1196 | } |
1197 | ||
1198 | /* END OF sysfs data and methods */ | |
1199 | ||
1200 | #ifdef CONFIG_EDAC_DEBUG | |
1201 | ||
1202 | EXPORT_SYMBOL(edac_mc_dump_channel); | |
1203 | ||
1204 | void edac_mc_dump_channel(struct channel_info *chan) | |
1205 | { | |
1206 | debugf4("\tchannel = %p\n", chan); | |
1207 | debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); | |
1208 | debugf4("\tchannel->ce_count = %d\n", chan->ce_count); | |
1209 | debugf4("\tchannel->label = '%s'\n", chan->label); | |
1210 | debugf4("\tchannel->csrow = %p\n\n", chan->csrow); | |
1211 | } | |
1212 | ||
1213 | ||
1214 | EXPORT_SYMBOL(edac_mc_dump_csrow); | |
1215 | ||
1216 | void edac_mc_dump_csrow(struct csrow_info *csrow) | |
1217 | { | |
1218 | debugf4("\tcsrow = %p\n", csrow); | |
1219 | debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx); | |
1220 | debugf4("\tcsrow->first_page = 0x%lx\n", | |
1221 | csrow->first_page); | |
1222 | debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); | |
1223 | debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); | |
1224 | debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); | |
1225 | debugf4("\tcsrow->nr_channels = %d\n", | |
1226 | csrow->nr_channels); | |
1227 | debugf4("\tcsrow->channels = %p\n", csrow->channels); | |
1228 | debugf4("\tcsrow->mci = %p\n\n", csrow->mci); | |
1229 | } | |
1230 | ||
1231 | ||
1232 | EXPORT_SYMBOL(edac_mc_dump_mci); | |
1233 | ||
1234 | void edac_mc_dump_mci(struct mem_ctl_info *mci) | |
1235 | { | |
1236 | debugf3("\tmci = %p\n", mci); | |
1237 | debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap); | |
1238 | debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); | |
1239 | debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap); | |
1240 | debugf4("\tmci->edac_check = %p\n", mci->edac_check); | |
1241 | debugf3("\tmci->nr_csrows = %d, csrows = %p\n", | |
1242 | mci->nr_csrows, mci->csrows); | |
1243 | debugf3("\tpdev = %p\n", mci->pdev); | |
1244 | debugf3("\tmod_name:ctl_name = %s:%s\n", | |
1245 | mci->mod_name, mci->ctl_name); | |
1246 | debugf3("\tpvt_info = %p\n\n", mci->pvt_info); | |
1247 | } | |
1248 | ||
1249 | ||
1250 | #endif /* CONFIG_EDAC_DEBUG */ | |
1251 | ||
1252 | /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'. | |
1253 | * Adjust 'ptr' so that its alignment is at least as stringent as what the | |
1254 | * compiler would provide for X and return the aligned result. | |
1255 | * | |
1256 | * If 'size' is a constant, the compiler will optimize this whole function | |
1257 | * down to either a no-op or the addition of a constant to the value of 'ptr'. | |
1258 | */ | |
1259 | static inline char * align_ptr (void *ptr, unsigned size) | |
1260 | { | |
1261 | unsigned align, r; | |
1262 | ||
1263 | /* Here we assume that the alignment of a "long long" is the most | |
1264 | * stringent alignment that the compiler will ever provide by default. | |
1265 | * As far as I know, this is a reasonable assumption. | |
1266 | */ | |
1267 | if (size > sizeof(long)) | |
1268 | align = sizeof(long long); | |
1269 | else if (size > sizeof(int)) | |
1270 | align = sizeof(long); | |
1271 | else if (size > sizeof(short)) | |
1272 | align = sizeof(int); | |
1273 | else if (size > sizeof(char)) | |
1274 | align = sizeof(short); | |
1275 | else | |
1276 | return (char *) ptr; | |
1277 | ||
1278 | r = size % align; | |
1279 | ||
1280 | if (r == 0) | |
1281 | return (char *) ptr; | |
1282 | ||
1283 | return (char *) (((unsigned long) ptr) + align - r); | |
1284 | } | |
1285 | ||
1286 | ||
1287 | EXPORT_SYMBOL(edac_mc_alloc); | |
1288 | ||
1289 | /** | |
1290 | * edac_mc_alloc: Allocate a struct mem_ctl_info structure | |
1291 | * @size_pvt: size of private storage needed | |
1292 | * @nr_csrows: Number of CWROWS needed for this MC | |
1293 | * @nr_chans: Number of channels for the MC | |
1294 | * | |
1295 | * Everything is kmalloc'ed as one big chunk - more efficient. | |
1296 | * Only can be used if all structures have the same lifetime - otherwise | |
1297 | * you have to allocate and initialize your own structures. | |
1298 | * | |
1299 | * Use edac_mc_free() to free mc structures allocated by this function. | |
1300 | * | |
1301 | * Returns: | |
1302 | * NULL allocation failed | |
1303 | * struct mem_ctl_info pointer | |
1304 | */ | |
1305 | struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, | |
1306 | unsigned nr_chans) | |
1307 | { | |
1308 | struct mem_ctl_info *mci; | |
1309 | struct csrow_info *csi, *csrow; | |
1310 | struct channel_info *chi, *chp, *chan; | |
1311 | void *pvt; | |
1312 | unsigned size; | |
1313 | int row, chn; | |
1314 | ||
1315 | /* Figure out the offsets of the various items from the start of an mc | |
1316 | * structure. We want the alignment of each item to be at least as | |
1317 | * stringent as what the compiler would provide if we could simply | |
1318 | * hardcode everything into a single struct. | |
1319 | */ | |
1320 | mci = (struct mem_ctl_info *) 0; | |
1321 | csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi)); | |
1322 | chi = (struct channel_info *) | |
1323 | align_ptr(&csi[nr_csrows], sizeof(*chi)); | |
1324 | pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt); | |
1325 | size = ((unsigned long) pvt) + sz_pvt; | |
1326 | ||
1327 | if ((mci = kmalloc(size, GFP_KERNEL)) == NULL) | |
1328 | return NULL; | |
1329 | ||
1330 | /* Adjust pointers so they point within the memory we just allocated | |
1331 | * rather than an imaginary chunk of memory located at address 0. | |
1332 | */ | |
1333 | csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi)); | |
1334 | chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi)); | |
1335 | pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL; | |
1336 | ||
1337 | memset(mci, 0, size); /* clear all fields */ | |
1338 | ||
1339 | mci->csrows = csi; | |
1340 | mci->pvt_info = pvt; | |
1341 | mci->nr_csrows = nr_csrows; | |
1342 | ||
1343 | for (row = 0; row < nr_csrows; row++) { | |
1344 | csrow = &csi[row]; | |
1345 | csrow->csrow_idx = row; | |
1346 | csrow->mci = mci; | |
1347 | csrow->nr_channels = nr_chans; | |
1348 | chp = &chi[row * nr_chans]; | |
1349 | csrow->channels = chp; | |
1350 | ||
1351 | for (chn = 0; chn < nr_chans; chn++) { | |
1352 | chan = &chp[chn]; | |
1353 | chan->chan_idx = chn; | |
1354 | chan->csrow = csrow; | |
1355 | } | |
1356 | } | |
1357 | ||
1358 | return mci; | |
1359 | } | |
1360 | ||
1361 | ||
1362 | EXPORT_SYMBOL(edac_mc_free); | |
1363 | ||
1364 | /** | |
1365 | * edac_mc_free: Free a previously allocated 'mci' structure | |
1366 | * @mci: pointer to a struct mem_ctl_info structure | |
da9bb1d2 AC |
1367 | */ |
1368 | void edac_mc_free(struct mem_ctl_info *mci) | |
1369 | { | |
472678eb | 1370 | kfree(mci); |
da9bb1d2 AC |
1371 | } |
1372 | ||
18dbc337 | 1373 | static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev) |
da9bb1d2 AC |
1374 | { |
1375 | struct mem_ctl_info *mci; | |
1376 | struct list_head *item; | |
1377 | ||
537fba28 | 1378 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1379 | |
1380 | list_for_each(item, &mc_devices) { | |
1381 | mci = list_entry(item, struct mem_ctl_info, link); | |
1382 | ||
1383 | if (mci->pdev == pdev) | |
1384 | return mci; | |
1385 | } | |
1386 | ||
1387 | return NULL; | |
1388 | } | |
1389 | ||
1390 | static int add_mc_to_global_list (struct mem_ctl_info *mci) | |
1391 | { | |
1392 | struct list_head *item, *insert_before; | |
1393 | struct mem_ctl_info *p; | |
1394 | int i; | |
1395 | ||
1396 | if (list_empty(&mc_devices)) { | |
1397 | mci->mc_idx = 0; | |
1398 | insert_before = &mc_devices; | |
1399 | } else { | |
18dbc337 | 1400 | if (find_mci_by_pdev(mci->pdev)) { |
537fba28 DP |
1401 | edac_printk(KERN_WARNING, EDAC_MC, |
1402 | "%s (%s) %s %s already assigned %d\n", | |
1403 | mci->pdev->dev.bus_id, | |
1404 | pci_name(mci->pdev), mci->mod_name, | |
1405 | mci->ctl_name, mci->mc_idx); | |
da9bb1d2 AC |
1406 | return 1; |
1407 | } | |
1408 | ||
1409 | insert_before = NULL; | |
1410 | i = 0; | |
1411 | ||
1412 | list_for_each(item, &mc_devices) { | |
1413 | p = list_entry(item, struct mem_ctl_info, link); | |
1414 | ||
1415 | if (p->mc_idx != i) { | |
1416 | insert_before = item; | |
1417 | break; | |
1418 | } | |
1419 | ||
1420 | i++; | |
1421 | } | |
1422 | ||
1423 | mci->mc_idx = i; | |
1424 | ||
1425 | if (insert_before == NULL) | |
1426 | insert_before = &mc_devices; | |
1427 | } | |
1428 | ||
1429 | list_add_tail_rcu(&mci->link, insert_before); | |
1430 | return 0; | |
1431 | } | |
1432 | ||
1433 | ||
a1d03fcc DP |
1434 | static void complete_mc_list_del (struct rcu_head *head) |
1435 | { | |
1436 | struct mem_ctl_info *mci; | |
1437 | ||
1438 | mci = container_of(head, struct mem_ctl_info, rcu); | |
1439 | INIT_LIST_HEAD(&mci->link); | |
1440 | complete(&mci->complete); | |
1441 | } | |
1442 | ||
1443 | ||
1444 | static void del_mc_from_global_list (struct mem_ctl_info *mci) | |
1445 | { | |
1446 | list_del_rcu(&mci->link); | |
1447 | init_completion(&mci->complete); | |
1448 | call_rcu(&mci->rcu, complete_mc_list_del); | |
1449 | wait_for_completion(&mci->complete); | |
1450 | } | |
1451 | ||
da9bb1d2 AC |
1452 | |
1453 | EXPORT_SYMBOL(edac_mc_add_mc); | |
1454 | ||
1455 | /** | |
472678eb DP |
1456 | * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and |
1457 | * create sysfs entries associated with mci structure | |
da9bb1d2 AC |
1458 | * @mci: pointer to the mci structure to be added to the list |
1459 | * | |
1460 | * Return: | |
1461 | * 0 Success | |
1462 | * !0 Failure | |
1463 | */ | |
1464 | ||
1465 | /* FIXME - should a warning be printed if no error detection? correction? */ | |
1466 | int edac_mc_add_mc(struct mem_ctl_info *mci) | |
1467 | { | |
537fba28 | 1468 | debugf0("%s()\n", __func__); |
da9bb1d2 AC |
1469 | #ifdef CONFIG_EDAC_DEBUG |
1470 | if (edac_debug_level >= 3) | |
1471 | edac_mc_dump_mci(mci); | |
1472 | if (edac_debug_level >= 4) { | |
1473 | int i; | |
1474 | ||
1475 | for (i = 0; i < mci->nr_csrows; i++) { | |
1476 | int j; | |
1477 | edac_mc_dump_csrow(&mci->csrows[i]); | |
1478 | for (j = 0; j < mci->csrows[i].nr_channels; j++) | |
1479 | edac_mc_dump_channel(&mci->csrows[i]. | |
1480 | channels[j]); | |
1481 | } | |
1482 | } | |
1483 | #endif | |
1484 | down(&mem_ctls_mutex); | |
1485 | ||
1486 | if (add_mc_to_global_list(mci)) | |
028a7b6d | 1487 | goto fail0; |
da9bb1d2 AC |
1488 | |
1489 | /* set load time so that error rate can be tracked */ | |
1490 | mci->start_time = jiffies; | |
1491 | ||
1492 | if (edac_create_sysfs_mci_device(mci)) { | |
537fba28 DP |
1493 | edac_mc_printk(mci, KERN_WARNING, |
1494 | "failed to create sysfs device\n"); | |
028a7b6d | 1495 | goto fail1; |
da9bb1d2 AC |
1496 | } |
1497 | ||
1498 | /* Report action taken */ | |
537fba28 DP |
1499 | edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n", |
1500 | mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); | |
da9bb1d2 | 1501 | |
028a7b6d DP |
1502 | up(&mem_ctls_mutex); |
1503 | return 0; | |
da9bb1d2 | 1504 | |
028a7b6d DP |
1505 | fail1: |
1506 | del_mc_from_global_list(mci); | |
1507 | ||
1508 | fail0: | |
da9bb1d2 | 1509 | up(&mem_ctls_mutex); |
028a7b6d | 1510 | return 1; |
da9bb1d2 AC |
1511 | } |
1512 | ||
1513 | ||
da9bb1d2 AC |
1514 | EXPORT_SYMBOL(edac_mc_del_mc); |
1515 | ||
1516 | /** | |
472678eb DP |
1517 | * edac_mc_del_mc: Remove sysfs entries for specified mci structure and |
1518 | * remove mci structure from global list | |
18dbc337 | 1519 | * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove. |
da9bb1d2 | 1520 | * |
18dbc337 | 1521 | * Return pointer to removed mci structure, or NULL if device not found. |
da9bb1d2 | 1522 | */ |
18dbc337 | 1523 | struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev) |
da9bb1d2 | 1524 | { |
18dbc337 | 1525 | struct mem_ctl_info *mci; |
da9bb1d2 | 1526 | |
18dbc337 | 1527 | debugf0("MC: %s()\n", __func__); |
da9bb1d2 | 1528 | down(&mem_ctls_mutex); |
18dbc337 DP |
1529 | |
1530 | if ((mci = find_mci_by_pdev(pdev)) == NULL) { | |
1531 | up(&mem_ctls_mutex); | |
1532 | return NULL; | |
1533 | } | |
1534 | ||
1535 | edac_remove_sysfs_mci_device(mci); | |
da9bb1d2 | 1536 | del_mc_from_global_list(mci); |
18dbc337 | 1537 | up(&mem_ctls_mutex); |
537fba28 DP |
1538 | edac_printk(KERN_INFO, EDAC_MC, |
1539 | "Removed device %d for %s %s: PCI %s\n", mci->mc_idx, | |
1540 | mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); | |
18dbc337 | 1541 | return mci; |
da9bb1d2 AC |
1542 | } |
1543 | ||
1544 | ||
1545 | EXPORT_SYMBOL(edac_mc_scrub_block); | |
1546 | ||
1547 | void edac_mc_scrub_block(unsigned long page, unsigned long offset, | |
1548 | u32 size) | |
1549 | { | |
1550 | struct page *pg; | |
1551 | void *virt_addr; | |
1552 | unsigned long flags = 0; | |
1553 | ||
537fba28 | 1554 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1555 | |
1556 | /* ECC error page was not in our memory. Ignore it. */ | |
1557 | if(!pfn_valid(page)) | |
1558 | return; | |
1559 | ||
1560 | /* Find the actual page structure then map it and fix */ | |
1561 | pg = pfn_to_page(page); | |
1562 | ||
1563 | if (PageHighMem(pg)) | |
1564 | local_irq_save(flags); | |
1565 | ||
1566 | virt_addr = kmap_atomic(pg, KM_BOUNCE_READ); | |
1567 | ||
1568 | /* Perform architecture specific atomic scrub operation */ | |
1569 | atomic_scrub(virt_addr + offset, size); | |
1570 | ||
1571 | /* Unmap and complete */ | |
1572 | kunmap_atomic(virt_addr, KM_BOUNCE_READ); | |
1573 | ||
1574 | if (PageHighMem(pg)) | |
1575 | local_irq_restore(flags); | |
1576 | } | |
1577 | ||
1578 | ||
1579 | /* FIXME - should return -1 */ | |
1580 | EXPORT_SYMBOL(edac_mc_find_csrow_by_page); | |
1581 | ||
1582 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, | |
1583 | unsigned long page) | |
1584 | { | |
1585 | struct csrow_info *csrows = mci->csrows; | |
1586 | int row, i; | |
1587 | ||
537fba28 | 1588 | debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); |
da9bb1d2 AC |
1589 | row = -1; |
1590 | ||
1591 | for (i = 0; i < mci->nr_csrows; i++) { | |
1592 | struct csrow_info *csrow = &csrows[i]; | |
1593 | ||
1594 | if (csrow->nr_pages == 0) | |
1595 | continue; | |
1596 | ||
537fba28 DP |
1597 | debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " |
1598 | "mask(0x%lx)\n", mci->mc_idx, __func__, | |
1599 | csrow->first_page, page, csrow->last_page, | |
1600 | csrow->page_mask); | |
da9bb1d2 AC |
1601 | |
1602 | if ((page >= csrow->first_page) && | |
1603 | (page <= csrow->last_page) && | |
1604 | ((page & csrow->page_mask) == | |
1605 | (csrow->first_page & csrow->page_mask))) { | |
1606 | row = i; | |
1607 | break; | |
1608 | } | |
1609 | } | |
1610 | ||
1611 | if (row == -1) | |
537fba28 DP |
1612 | edac_mc_printk(mci, KERN_ERR, |
1613 | "could not look up page error address %lx\n", | |
1614 | (unsigned long) page); | |
da9bb1d2 AC |
1615 | |
1616 | return row; | |
1617 | } | |
1618 | ||
1619 | ||
1620 | EXPORT_SYMBOL(edac_mc_handle_ce); | |
1621 | ||
1622 | /* FIXME - setable log (warning/emerg) levels */ | |
1623 | /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */ | |
1624 | void edac_mc_handle_ce(struct mem_ctl_info *mci, | |
1625 | unsigned long page_frame_number, | |
1626 | unsigned long offset_in_page, | |
1627 | unsigned long syndrome, int row, int channel, | |
1628 | const char *msg) | |
1629 | { | |
1630 | unsigned long remapped_page; | |
1631 | ||
537fba28 | 1632 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1633 | |
1634 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1635 | if (row >= mci->nr_csrows || row < 0) { | |
1636 | /* something is wrong */ | |
537fba28 DP |
1637 | edac_mc_printk(mci, KERN_ERR, |
1638 | "INTERNAL ERROR: row out of range " | |
1639 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1640 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1641 | return; | |
1642 | } | |
1643 | if (channel >= mci->csrows[row].nr_channels || channel < 0) { | |
1644 | /* something is wrong */ | |
537fba28 DP |
1645 | edac_mc_printk(mci, KERN_ERR, |
1646 | "INTERNAL ERROR: channel out of range " | |
1647 | "(%d >= %d)\n", channel, | |
1648 | mci->csrows[row].nr_channels); | |
da9bb1d2 AC |
1649 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); |
1650 | return; | |
1651 | } | |
1652 | ||
1653 | if (log_ce) | |
1654 | /* FIXME - put in DIMM location */ | |
537fba28 DP |
1655 | edac_mc_printk(mci, KERN_WARNING, |
1656 | "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " | |
1657 | "0x%lx, row %d, channel %d, label \"%s\": %s\n", | |
1658 | page_frame_number, offset_in_page, | |
1659 | mci->csrows[row].grain, syndrome, row, channel, | |
1660 | mci->csrows[row].channels[channel].label, msg); | |
da9bb1d2 AC |
1661 | |
1662 | mci->ce_count++; | |
1663 | mci->csrows[row].ce_count++; | |
1664 | mci->csrows[row].channels[channel].ce_count++; | |
1665 | ||
1666 | if (mci->scrub_mode & SCRUB_SW_SRC) { | |
1667 | /* | |
1668 | * Some MC's can remap memory so that it is still available | |
1669 | * at a different address when PCI devices map into memory. | |
1670 | * MC's that can't do this lose the memory where PCI devices | |
1671 | * are mapped. This mapping is MC dependant and so we call | |
1672 | * back into the MC driver for it to map the MC page to | |
1673 | * a physical (CPU) page which can then be mapped to a virtual | |
1674 | * page - which can then be scrubbed. | |
1675 | */ | |
1676 | remapped_page = mci->ctl_page_to_phys ? | |
1677 | mci->ctl_page_to_phys(mci, page_frame_number) : | |
1678 | page_frame_number; | |
1679 | ||
1680 | edac_mc_scrub_block(remapped_page, offset_in_page, | |
1681 | mci->csrows[row].grain); | |
1682 | } | |
1683 | } | |
1684 | ||
1685 | ||
1686 | EXPORT_SYMBOL(edac_mc_handle_ce_no_info); | |
1687 | ||
1688 | void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, | |
1689 | const char *msg) | |
1690 | { | |
1691 | if (log_ce) | |
537fba28 DP |
1692 | edac_mc_printk(mci, KERN_WARNING, |
1693 | "CE - no information available: %s\n", msg); | |
da9bb1d2 AC |
1694 | mci->ce_noinfo_count++; |
1695 | mci->ce_count++; | |
1696 | } | |
1697 | ||
1698 | ||
1699 | EXPORT_SYMBOL(edac_mc_handle_ue); | |
1700 | ||
1701 | void edac_mc_handle_ue(struct mem_ctl_info *mci, | |
1702 | unsigned long page_frame_number, | |
1703 | unsigned long offset_in_page, int row, | |
1704 | const char *msg) | |
1705 | { | |
1706 | int len = EDAC_MC_LABEL_LEN * 4; | |
1707 | char labels[len + 1]; | |
1708 | char *pos = labels; | |
1709 | int chan; | |
1710 | int chars; | |
1711 | ||
537fba28 | 1712 | debugf3("MC%d: %s()\n", mci->mc_idx, __func__); |
da9bb1d2 AC |
1713 | |
1714 | /* FIXME - maybe make panic on INTERNAL ERROR an option */ | |
1715 | if (row >= mci->nr_csrows || row < 0) { | |
1716 | /* something is wrong */ | |
537fba28 DP |
1717 | edac_mc_printk(mci, KERN_ERR, |
1718 | "INTERNAL ERROR: row out of range " | |
1719 | "(%d >= %d)\n", row, mci->nr_csrows); | |
da9bb1d2 AC |
1720 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); |
1721 | return; | |
1722 | } | |
1723 | ||
1724 | chars = snprintf(pos, len + 1, "%s", | |
1725 | mci->csrows[row].channels[0].label); | |
1726 | len -= chars; | |
1727 | pos += chars; | |
1728 | for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); | |
1729 | chan++) { | |
1730 | chars = snprintf(pos, len + 1, ":%s", | |
1731 | mci->csrows[row].channels[chan].label); | |
1732 | len -= chars; | |
1733 | pos += chars; | |
1734 | } | |
1735 | ||
1736 | if (log_ue) | |
537fba28 DP |
1737 | edac_mc_printk(mci, KERN_EMERG, |
1738 | "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " | |
1739 | "labels \"%s\": %s\n", page_frame_number, | |
1740 | offset_in_page, mci->csrows[row].grain, row, labels, | |
1741 | msg); | |
da9bb1d2 AC |
1742 | |
1743 | if (panic_on_ue) | |
1744 | panic | |
1745 | ("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, row %d," | |
1746 | " labels \"%s\": %s\n", mci->mc_idx, | |
1747 | page_frame_number, offset_in_page, | |
1748 | mci->csrows[row].grain, row, labels, msg); | |
1749 | ||
1750 | mci->ue_count++; | |
1751 | mci->csrows[row].ue_count++; | |
1752 | } | |
1753 | ||
1754 | ||
1755 | EXPORT_SYMBOL(edac_mc_handle_ue_no_info); | |
1756 | ||
1757 | void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, | |
1758 | const char *msg) | |
1759 | { | |
1760 | if (panic_on_ue) | |
1761 | panic("EDAC MC%d: Uncorrected Error", mci->mc_idx); | |
1762 | ||
1763 | if (log_ue) | |
537fba28 DP |
1764 | edac_mc_printk(mci, KERN_WARNING, |
1765 | "UE - no information available: %s\n", msg); | |
da9bb1d2 AC |
1766 | mci->ue_noinfo_count++; |
1767 | mci->ue_count++; | |
1768 | } | |
1769 | ||
1770 | ||
1771 | #ifdef CONFIG_PCI | |
1772 | ||
1773 | static u16 get_pci_parity_status(struct pci_dev *dev, int secondary) | |
1774 | { | |
1775 | int where; | |
1776 | u16 status; | |
1777 | ||
1778 | where = secondary ? PCI_SEC_STATUS : PCI_STATUS; | |
1779 | pci_read_config_word(dev, where, &status); | |
1780 | ||
1781 | /* If we get back 0xFFFF then we must suspect that the card has been pulled but | |
1782 | the Linux PCI layer has not yet finished cleaning up. We don't want to report | |
1783 | on such devices */ | |
1784 | ||
1785 | if (status == 0xFFFF) { | |
1786 | u32 sanity; | |
1787 | pci_read_config_dword(dev, 0, &sanity); | |
1788 | if (sanity == 0xFFFFFFFF) | |
1789 | return 0; | |
1790 | } | |
1791 | status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR | | |
1792 | PCI_STATUS_PARITY; | |
1793 | ||
1794 | if (status) | |
1795 | /* reset only the bits we are interested in */ | |
1796 | pci_write_config_word(dev, where, status); | |
1797 | ||
1798 | return status; | |
1799 | } | |
1800 | ||
1801 | typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev); | |
1802 | ||
1803 | /* Clear any PCI parity errors logged by this device. */ | |
1804 | static void edac_pci_dev_parity_clear( struct pci_dev *dev ) | |
1805 | { | |
1806 | u8 header_type; | |
1807 | ||
1808 | get_pci_parity_status(dev, 0); | |
1809 | ||
1810 | /* read the device TYPE, looking for bridges */ | |
1811 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
1812 | ||
1813 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) | |
1814 | get_pci_parity_status(dev, 1); | |
1815 | } | |
1816 | ||
1817 | /* | |
1818 | * PCI Parity polling | |
1819 | * | |
1820 | */ | |
1821 | static void edac_pci_dev_parity_test(struct pci_dev *dev) | |
1822 | { | |
1823 | u16 status; | |
1824 | u8 header_type; | |
1825 | ||
1826 | /* read the STATUS register on this device | |
1827 | */ | |
1828 | status = get_pci_parity_status(dev, 0); | |
1829 | ||
1830 | debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id ); | |
1831 | ||
1832 | /* check the status reg for errors */ | |
1833 | if (status) { | |
1834 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
537fba28 | 1835 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1836 | "Signaled System Error on %s\n", |
537fba28 | 1837 | pci_name(dev)); |
da9bb1d2 AC |
1838 | |
1839 | if (status & (PCI_STATUS_PARITY)) { | |
537fba28 | 1840 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1841 | "Master Data Parity Error on %s\n", |
537fba28 | 1842 | pci_name(dev)); |
da9bb1d2 AC |
1843 | |
1844 | atomic_inc(&pci_parity_count); | |
1845 | } | |
1846 | ||
1847 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
537fba28 | 1848 | edac_printk(KERN_CRIT, EDAC_PCI, |
da9bb1d2 | 1849 | "Detected Parity Error on %s\n", |
537fba28 | 1850 | pci_name(dev)); |
da9bb1d2 AC |
1851 | |
1852 | atomic_inc(&pci_parity_count); | |
1853 | } | |
1854 | } | |
1855 | ||
1856 | /* read the device TYPE, looking for bridges */ | |
1857 | pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); | |
1858 | ||
1859 | debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id ); | |
1860 | ||
1861 | if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { | |
1862 | /* On bridges, need to examine secondary status register */ | |
1863 | status = get_pci_parity_status(dev, 1); | |
1864 | ||
1865 | debugf2("PCI SEC_STATUS= 0x%04x %s\n", | |
1866 | status, dev->dev.bus_id ); | |
1867 | ||
1868 | /* check the secondary status reg for errors */ | |
1869 | if (status) { | |
1870 | if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) | |
537fba28 | 1871 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
da9bb1d2 | 1872 | "Signaled System Error on %s\n", |
537fba28 | 1873 | pci_name(dev)); |
da9bb1d2 AC |
1874 | |
1875 | if (status & (PCI_STATUS_PARITY)) { | |
537fba28 DP |
1876 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
1877 | "Master Data Parity Error on " | |
1878 | "%s\n", pci_name(dev)); | |
da9bb1d2 AC |
1879 | |
1880 | atomic_inc(&pci_parity_count); | |
1881 | } | |
1882 | ||
1883 | if (status & (PCI_STATUS_DETECTED_PARITY)) { | |
537fba28 | 1884 | edac_printk(KERN_CRIT, EDAC_PCI, "Bridge " |
da9bb1d2 | 1885 | "Detected Parity Error on %s\n", |
537fba28 | 1886 | pci_name(dev)); |
da9bb1d2 AC |
1887 | |
1888 | atomic_inc(&pci_parity_count); | |
1889 | } | |
1890 | } | |
1891 | } | |
1892 | } | |
1893 | ||
1894 | /* | |
1895 | * check_dev_on_list: Scan for a PCI device on a white/black list | |
1896 | * @list: an EDAC &edac_pci_device_list white/black list pointer | |
1897 | * @free_index: index of next free entry on the list | |
1898 | * @pci_dev: PCI Device pointer | |
1899 | * | |
1900 | * see if list contains the device. | |
1901 | * | |
1902 | * Returns: 0 not found | |
1903 | * 1 found on list | |
1904 | */ | |
1905 | static int check_dev_on_list(struct edac_pci_device_list *list, int free_index, | |
1906 | struct pci_dev *dev) | |
1907 | { | |
1908 | int i; | |
1909 | int rc = 0; /* Assume not found */ | |
1910 | unsigned short vendor=dev->vendor; | |
1911 | unsigned short device=dev->device; | |
1912 | ||
1913 | /* Scan the list, looking for a vendor/device match | |
1914 | */ | |
1915 | for (i = 0; i < free_index; i++, list++ ) { | |
1916 | if ( (list->vendor == vendor ) && | |
1917 | (list->device == device )) { | |
1918 | rc = 1; | |
1919 | break; | |
1920 | } | |
1921 | } | |
1922 | ||
1923 | return rc; | |
1924 | } | |
1925 | ||
1926 | /* | |
1927 | * pci_dev parity list iterator | |
1928 | * Scan the PCI device list for one iteration, looking for SERRORs | |
1929 | * Master Parity ERRORS or Parity ERRORs on primary or secondary devices | |
1930 | */ | |
1931 | static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn) | |
1932 | { | |
1933 | struct pci_dev *dev=NULL; | |
1934 | ||
1935 | /* request for kernel access to the next PCI device, if any, | |
1936 | * and while we are looking at it have its reference count | |
1937 | * bumped until we are done with it | |
1938 | */ | |
1939 | while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | |
1940 | ||
1941 | /* if whitelist exists then it has priority, so only scan those | |
1942 | * devices on the whitelist | |
1943 | */ | |
1944 | if (pci_whitelist_count > 0 ) { | |
1945 | if (check_dev_on_list(pci_whitelist, | |
1946 | pci_whitelist_count, dev)) | |
1947 | fn(dev); | |
1948 | } else { | |
1949 | /* | |
1950 | * if no whitelist, then check if this devices is | |
1951 | * blacklisted | |
1952 | */ | |
1953 | if (!check_dev_on_list(pci_blacklist, | |
1954 | pci_blacklist_count, dev)) | |
1955 | fn(dev); | |
1956 | } | |
1957 | } | |
1958 | } | |
1959 | ||
1960 | static void do_pci_parity_check(void) | |
1961 | { | |
1962 | unsigned long flags; | |
1963 | int before_count; | |
1964 | ||
537fba28 | 1965 | debugf3("%s()\n", __func__); |
da9bb1d2 AC |
1966 | |
1967 | if (!check_pci_parity) | |
1968 | return; | |
1969 | ||
1970 | before_count = atomic_read(&pci_parity_count); | |
1971 | ||
1972 | /* scan all PCI devices looking for a Parity Error on devices and | |
1973 | * bridges | |
1974 | */ | |
1975 | local_irq_save(flags); | |
1976 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_test); | |
1977 | local_irq_restore(flags); | |
1978 | ||
1979 | /* Only if operator has selected panic on PCI Error */ | |
1980 | if (panic_on_pci_parity) { | |
1981 | /* If the count is different 'after' from 'before' */ | |
1982 | if (before_count != atomic_read(&pci_parity_count)) | |
1983 | panic("EDAC: PCI Parity Error"); | |
1984 | } | |
1985 | } | |
1986 | ||
1987 | ||
1988 | static inline void clear_pci_parity_errors(void) | |
1989 | { | |
1990 | /* Clear any PCI bus parity errors that devices initially have logged | |
1991 | * in their registers. | |
1992 | */ | |
1993 | edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear); | |
1994 | } | |
1995 | ||
1996 | ||
1997 | #else /* CONFIG_PCI */ | |
1998 | ||
1999 | ||
2000 | static inline void do_pci_parity_check(void) | |
2001 | { | |
2002 | /* no-op */ | |
2003 | } | |
2004 | ||
2005 | ||
2006 | static inline void clear_pci_parity_errors(void) | |
2007 | { | |
2008 | /* no-op */ | |
2009 | } | |
2010 | ||
2011 | ||
2012 | #endif /* CONFIG_PCI */ | |
2013 | ||
2014 | /* | |
2015 | * Iterate over all MC instances and check for ECC, et al, errors | |
2016 | */ | |
2017 | static inline void check_mc_devices (void) | |
2018 | { | |
da9bb1d2 AC |
2019 | struct list_head *item; |
2020 | struct mem_ctl_info *mci; | |
2021 | ||
537fba28 | 2022 | debugf3("%s()\n", __func__); |
da9bb1d2 | 2023 | |
18dbc337 | 2024 | down(&mem_ctls_mutex); |
da9bb1d2 AC |
2025 | |
2026 | list_for_each(item, &mc_devices) { | |
2027 | mci = list_entry(item, struct mem_ctl_info, link); | |
2028 | ||
2029 | if (mci->edac_check != NULL) | |
2030 | mci->edac_check(mci); | |
2031 | } | |
2032 | ||
18dbc337 | 2033 | up(&mem_ctls_mutex); |
da9bb1d2 AC |
2034 | } |
2035 | ||
2036 | ||
2037 | /* | |
2038 | * Check MC status every poll_msec. | |
2039 | * Check PCI status every poll_msec as well. | |
2040 | * | |
2041 | * This where the work gets done for edac. | |
2042 | * | |
2043 | * SMP safe, doesn't use NMI, and auto-rate-limits. | |
2044 | */ | |
2045 | static void do_edac_check(void) | |
2046 | { | |
537fba28 | 2047 | debugf3("%s()\n", __func__); |
da9bb1d2 | 2048 | check_mc_devices(); |
da9bb1d2 AC |
2049 | do_pci_parity_check(); |
2050 | } | |
2051 | ||
da9bb1d2 AC |
2052 | static int edac_kernel_thread(void *arg) |
2053 | { | |
f2fe42ab DP |
2054 | while (!kthread_should_stop()) { |
2055 | do_edac_check(); | |
da9bb1d2 AC |
2056 | |
2057 | /* goto sleep for the interval */ | |
f2fe42ab | 2058 | schedule_timeout_interruptible((HZ * poll_msec) / 1000); |
da9bb1d2 AC |
2059 | try_to_freeze(); |
2060 | } | |
2061 | ||
da9bb1d2 AC |
2062 | return 0; |
2063 | } | |
2064 | ||
2065 | /* | |
2066 | * edac_mc_init | |
2067 | * module initialization entry point | |
2068 | */ | |
2069 | static int __init edac_mc_init(void) | |
2070 | { | |
537fba28 | 2071 | edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n"); |
da9bb1d2 AC |
2072 | |
2073 | /* | |
2074 | * Harvest and clear any boot/initialization PCI parity errors | |
2075 | * | |
2076 | * FIXME: This only clears errors logged by devices present at time of | |
2077 | * module initialization. We should also do an initial clear | |
2078 | * of each newly hotplugged device. | |
2079 | */ | |
2080 | clear_pci_parity_errors(); | |
2081 | ||
da9bb1d2 AC |
2082 | /* Create the MC sysfs entires */ |
2083 | if (edac_sysfs_memctrl_setup()) { | |
537fba28 DP |
2084 | edac_printk(KERN_ERR, EDAC_MC, |
2085 | "Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2086 | return -ENODEV; |
2087 | } | |
2088 | ||
2089 | /* Create the PCI parity sysfs entries */ | |
2090 | if (edac_sysfs_pci_setup()) { | |
2091 | edac_sysfs_memctrl_teardown(); | |
537fba28 DP |
2092 | edac_printk(KERN_ERR, EDAC_MC, |
2093 | "EDAC PCI: Error initializing sysfs code\n"); | |
da9bb1d2 AC |
2094 | return -ENODEV; |
2095 | } | |
2096 | ||
da9bb1d2 | 2097 | /* create our kernel thread */ |
f2fe42ab DP |
2098 | edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac"); |
2099 | if (IS_ERR(edac_thread)) { | |
da9bb1d2 AC |
2100 | /* remove the sysfs entries */ |
2101 | edac_sysfs_memctrl_teardown(); | |
2102 | edac_sysfs_pci_teardown(); | |
f2fe42ab | 2103 | return PTR_ERR(edac_thread); |
da9bb1d2 AC |
2104 | } |
2105 | ||
da9bb1d2 AC |
2106 | return 0; |
2107 | } | |
2108 | ||
2109 | ||
2110 | /* | |
2111 | * edac_mc_exit() | |
2112 | * module exit/termination functioni | |
2113 | */ | |
2114 | static void __exit edac_mc_exit(void) | |
2115 | { | |
537fba28 | 2116 | debugf0("%s()\n", __func__); |
da9bb1d2 | 2117 | |
f2fe42ab | 2118 | kthread_stop(edac_thread); |
da9bb1d2 AC |
2119 | |
2120 | /* tear down the sysfs device */ | |
2121 | edac_sysfs_memctrl_teardown(); | |
2122 | edac_sysfs_pci_teardown(); | |
2123 | } | |
2124 | ||
2125 | ||
2126 | ||
2127 | ||
2128 | module_init(edac_mc_init); | |
2129 | module_exit(edac_mc_exit); | |
2130 | ||
2131 | MODULE_LICENSE("GPL"); | |
2132 | MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" | |
2133 | "Based on.work by Dan Hollis et al"); | |
2134 | MODULE_DESCRIPTION("Core library routines for MC reporting"); | |
2135 | ||
2136 | module_param(panic_on_ue, int, 0644); | |
2137 | MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); | |
2138 | module_param(check_pci_parity, int, 0644); | |
2139 | MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on"); | |
2140 | module_param(panic_on_pci_parity, int, 0644); | |
2141 | MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on"); | |
2142 | module_param(log_ue, int, 0644); | |
2143 | MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on"); | |
2144 | module_param(log_ce, int, 0644); | |
2145 | MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on"); | |
2146 | module_param(poll_msec, int, 0644); | |
2147 | MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds"); | |
2148 | #ifdef CONFIG_EDAC_DEBUG | |
2149 | module_param(edac_debug_level, int, 0644); | |
2150 | MODULE_PARM_DESC(edac_debug_level, "Debug level"); | |
2151 | #endif |