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Commit | Line | Data |
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7c9281d7 DT |
1 | /* |
2 | * edac_mc kernel module | |
42a8e397 DT |
3 | * (C) 2005-2007 Linux Networx (http://lnxi.com) |
4 | * | |
7c9281d7 DT |
5 | * This file may be distributed under the terms of the |
6 | * GNU General Public License. | |
7 | * | |
42a8e397 | 8 | * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com |
7c9281d7 | 9 | * |
37e59f87 | 10 | * (c) 2012-2013 - Mauro Carvalho Chehab |
7a623c03 MCC |
11 | * The entire API were re-written, and ported to use struct device |
12 | * | |
7c9281d7 DT |
13 | */ |
14 | ||
7c9281d7 | 15 | #include <linux/ctype.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
30e1f7a8 | 17 | #include <linux/edac.h> |
8096cfaf | 18 | #include <linux/bug.h> |
7a623c03 | 19 | #include <linux/pm_runtime.h> |
452a6bf9 | 20 | #include <linux/uaccess.h> |
7c9281d7 | 21 | |
78d88e8a | 22 | #include "edac_mc.h" |
7c9281d7 DT |
23 | #include "edac_module.h" |
24 | ||
25 | /* MC EDAC Controls, setable by module parameter, and sysfs */ | |
4de78c68 DJ |
26 | static int edac_mc_log_ue = 1; |
27 | static int edac_mc_log_ce = 1; | |
f044091c | 28 | static int edac_mc_panic_on_ue; |
d8655e76 | 29 | static unsigned int edac_mc_poll_msec = 1000; |
7c9281d7 DT |
30 | |
31 | /* Getter functions for above */ | |
4de78c68 | 32 | int edac_mc_get_log_ue(void) |
7c9281d7 | 33 | { |
4de78c68 | 34 | return edac_mc_log_ue; |
7c9281d7 DT |
35 | } |
36 | ||
4de78c68 | 37 | int edac_mc_get_log_ce(void) |
7c9281d7 | 38 | { |
4de78c68 | 39 | return edac_mc_log_ce; |
7c9281d7 DT |
40 | } |
41 | ||
4de78c68 | 42 | int edac_mc_get_panic_on_ue(void) |
7c9281d7 | 43 | { |
4de78c68 | 44 | return edac_mc_panic_on_ue; |
7c9281d7 DT |
45 | } |
46 | ||
81d87cb1 | 47 | /* this is temporary */ |
d8655e76 | 48 | unsigned int edac_mc_get_poll_msec(void) |
81d87cb1 | 49 | { |
4de78c68 | 50 | return edac_mc_poll_msec; |
7c9281d7 DT |
51 | } |
52 | ||
e4dca7b7 | 53 | static int edac_set_poll_msec(const char *val, const struct kernel_param *kp) |
096846e2 | 54 | { |
d8655e76 | 55 | unsigned int i; |
096846e2 AJ |
56 | int ret; |
57 | ||
58 | if (!val) | |
59 | return -EINVAL; | |
60 | ||
d8655e76 | 61 | ret = kstrtouint(val, 0, &i); |
c542b53d JH |
62 | if (ret) |
63 | return ret; | |
9da21b15 | 64 | |
d8655e76 | 65 | if (i < 1000) |
096846e2 | 66 | return -EINVAL; |
9da21b15 | 67 | |
d8655e76 | 68 | *((unsigned int *)kp->arg) = i; |
096846e2 AJ |
69 | |
70 | /* notify edac_mc engine to reset the poll period */ | |
d8655e76 | 71 | edac_mc_reset_delay_period(i); |
096846e2 AJ |
72 | |
73 | return 0; | |
74 | } | |
75 | ||
7c9281d7 | 76 | /* Parameter declarations for above */ |
4de78c68 DJ |
77 | module_param(edac_mc_panic_on_ue, int, 0644); |
78 | MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); | |
79 | module_param(edac_mc_log_ue, int, 0644); | |
80 | MODULE_PARM_DESC(edac_mc_log_ue, | |
079708b9 | 81 | "Log uncorrectable error to console: 0=off 1=on"); |
4de78c68 DJ |
82 | module_param(edac_mc_log_ce, int, 0644); |
83 | MODULE_PARM_DESC(edac_mc_log_ce, | |
079708b9 | 84 | "Log correctable error to console: 0=off 1=on"); |
d8655e76 | 85 | module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_uint, |
096846e2 | 86 | &edac_mc_poll_msec, 0644); |
4de78c68 | 87 | MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds"); |
7c9281d7 | 88 | |
de3910eb | 89 | static struct device *mci_pdev; |
7a623c03 | 90 | |
7c9281d7 DT |
91 | /* |
92 | * various constants for Memory Controllers | |
93 | */ | |
8b7719e0 | 94 | static const char * const dev_types[] = { |
7c9281d7 DT |
95 | [DEV_UNKNOWN] = "Unknown", |
96 | [DEV_X1] = "x1", | |
97 | [DEV_X2] = "x2", | |
98 | [DEV_X4] = "x4", | |
99 | [DEV_X8] = "x8", | |
100 | [DEV_X16] = "x16", | |
101 | [DEV_X32] = "x32", | |
102 | [DEV_X64] = "x64" | |
103 | }; | |
104 | ||
8b7719e0 | 105 | static const char * const edac_caps[] = { |
7c9281d7 DT |
106 | [EDAC_UNKNOWN] = "Unknown", |
107 | [EDAC_NONE] = "None", | |
108 | [EDAC_RESERVED] = "Reserved", | |
109 | [EDAC_PARITY] = "PARITY", | |
110 | [EDAC_EC] = "EC", | |
111 | [EDAC_SECDED] = "SECDED", | |
112 | [EDAC_S2ECD2ED] = "S2ECD2ED", | |
113 | [EDAC_S4ECD4ED] = "S4ECD4ED", | |
114 | [EDAC_S8ECD8ED] = "S8ECD8ED", | |
115 | [EDAC_S16ECD16ED] = "S16ECD16ED" | |
116 | }; | |
117 | ||
19974710 | 118 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 MCC |
119 | /* |
120 | * EDAC sysfs CSROW data structures and methods | |
121 | */ | |
122 | ||
123 | #define to_csrow(k) container_of(k, struct csrow_info, dev) | |
124 | ||
125 | /* | |
126 | * We need it to avoid namespace conflicts between the legacy API | |
127 | * and the per-dimm/per-rank one | |
7c9281d7 | 128 | */ |
7a623c03 | 129 | #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ |
fbe2d361 | 130 | static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) |
7a623c03 MCC |
131 | |
132 | struct dev_ch_attribute { | |
133 | struct device_attribute attr; | |
d55c79ac | 134 | unsigned int channel; |
7a623c03 MCC |
135 | }; |
136 | ||
137 | #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ | |
f11135d8 | 138 | static struct dev_ch_attribute dev_attr_legacy_##_name = \ |
7a623c03 MCC |
139 | { __ATTR(_name, _mode, _show, _store), (_var) } |
140 | ||
141 | #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) | |
7c9281d7 DT |
142 | |
143 | /* Set of more default csrow<id> attribute show/store functions */ | |
7a623c03 MCC |
144 | static ssize_t csrow_ue_count_show(struct device *dev, |
145 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 146 | { |
7a623c03 MCC |
147 | struct csrow_info *csrow = to_csrow(dev); |
148 | ||
079708b9 | 149 | return sprintf(data, "%u\n", csrow->ue_count); |
7c9281d7 DT |
150 | } |
151 | ||
7a623c03 MCC |
152 | static ssize_t csrow_ce_count_show(struct device *dev, |
153 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 154 | { |
7a623c03 MCC |
155 | struct csrow_info *csrow = to_csrow(dev); |
156 | ||
079708b9 | 157 | return sprintf(data, "%u\n", csrow->ce_count); |
7c9281d7 DT |
158 | } |
159 | ||
7a623c03 MCC |
160 | static ssize_t csrow_size_show(struct device *dev, |
161 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 162 | { |
7a623c03 | 163 | struct csrow_info *csrow = to_csrow(dev); |
a895bf8b MCC |
164 | int i; |
165 | u32 nr_pages = 0; | |
166 | ||
167 | for (i = 0; i < csrow->nr_channels; i++) | |
de3910eb | 168 | nr_pages += csrow->channels[i]->dimm->nr_pages; |
a895bf8b | 169 | return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); |
7c9281d7 DT |
170 | } |
171 | ||
7a623c03 MCC |
172 | static ssize_t csrow_mem_type_show(struct device *dev, |
173 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 174 | { |
7a623c03 MCC |
175 | struct csrow_info *csrow = to_csrow(dev); |
176 | ||
d6dd77eb | 177 | return sprintf(data, "%s\n", edac_mem_types[csrow->channels[0]->dimm->mtype]); |
7c9281d7 DT |
178 | } |
179 | ||
7a623c03 MCC |
180 | static ssize_t csrow_dev_type_show(struct device *dev, |
181 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 182 | { |
7a623c03 MCC |
183 | struct csrow_info *csrow = to_csrow(dev); |
184 | ||
de3910eb | 185 | return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]); |
7c9281d7 DT |
186 | } |
187 | ||
7a623c03 MCC |
188 | static ssize_t csrow_edac_mode_show(struct device *dev, |
189 | struct device_attribute *mattr, | |
190 | char *data) | |
7c9281d7 | 191 | { |
7a623c03 MCC |
192 | struct csrow_info *csrow = to_csrow(dev); |
193 | ||
de3910eb | 194 | return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]); |
7c9281d7 DT |
195 | } |
196 | ||
197 | /* show/store functions for DIMM Label attributes */ | |
7a623c03 MCC |
198 | static ssize_t channel_dimm_label_show(struct device *dev, |
199 | struct device_attribute *mattr, | |
200 | char *data) | |
7c9281d7 | 201 | { |
7a623c03 | 202 | struct csrow_info *csrow = to_csrow(dev); |
d55c79ac | 203 | unsigned int chan = to_channel(mattr); |
de3910eb | 204 | struct rank_info *rank = csrow->channels[chan]; |
7a623c03 | 205 | |
124682c7 | 206 | /* if field has not been initialized, there is nothing to send */ |
7a623c03 | 207 | if (!rank->dimm->label[0]) |
124682c7 AJ |
208 | return 0; |
209 | ||
1ea62c59 | 210 | return snprintf(data, sizeof(rank->dimm->label) + 1, "%s\n", |
7a623c03 | 211 | rank->dimm->label); |
7c9281d7 DT |
212 | } |
213 | ||
7a623c03 MCC |
214 | static ssize_t channel_dimm_label_store(struct device *dev, |
215 | struct device_attribute *mattr, | |
216 | const char *data, size_t count) | |
7c9281d7 | 217 | { |
7a623c03 | 218 | struct csrow_info *csrow = to_csrow(dev); |
d55c79ac | 219 | unsigned int chan = to_channel(mattr); |
de3910eb | 220 | struct rank_info *rank = csrow->channels[chan]; |
438470b8 | 221 | size_t copy_count = count; |
7a623c03 | 222 | |
438470b8 TK |
223 | if (count == 0) |
224 | return -EINVAL; | |
225 | ||
226 | if (data[count - 1] == '\0' || data[count - 1] == '\n') | |
227 | copy_count -= 1; | |
228 | ||
d0c9c930 | 229 | if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label)) |
438470b8 | 230 | return -EINVAL; |
7c9281d7 | 231 | |
438470b8 TK |
232 | strncpy(rank->dimm->label, data, copy_count); |
233 | rank->dimm->label[copy_count] = '\0'; | |
7c9281d7 | 234 | |
438470b8 | 235 | return count; |
7c9281d7 DT |
236 | } |
237 | ||
238 | /* show function for dynamic chX_ce_count attribute */ | |
7a623c03 MCC |
239 | static ssize_t channel_ce_count_show(struct device *dev, |
240 | struct device_attribute *mattr, char *data) | |
7c9281d7 | 241 | { |
7a623c03 | 242 | struct csrow_info *csrow = to_csrow(dev); |
d55c79ac | 243 | unsigned int chan = to_channel(mattr); |
de3910eb | 244 | struct rank_info *rank = csrow->channels[chan]; |
7a623c03 MCC |
245 | |
246 | return sprintf(data, "%u\n", rank->ce_count); | |
7c9281d7 DT |
247 | } |
248 | ||
7a623c03 MCC |
249 | /* cwrow<id>/attribute files */ |
250 | DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL); | |
251 | DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL); | |
252 | DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL); | |
253 | DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL); | |
254 | DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL); | |
255 | DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL); | |
7c9281d7 | 256 | |
7a623c03 MCC |
257 | /* default attributes of the CSROW<id> object */ |
258 | static struct attribute *csrow_attrs[] = { | |
259 | &dev_attr_legacy_dev_type.attr, | |
260 | &dev_attr_legacy_mem_type.attr, | |
261 | &dev_attr_legacy_edac_mode.attr, | |
262 | &dev_attr_legacy_size_mb.attr, | |
263 | &dev_attr_legacy_ue_count.attr, | |
264 | &dev_attr_legacy_ce_count.attr, | |
265 | NULL, | |
266 | }; | |
7c9281d7 | 267 | |
1c18be5a | 268 | static const struct attribute_group csrow_attr_grp = { |
7a623c03 MCC |
269 | .attrs = csrow_attrs, |
270 | }; | |
7c9281d7 | 271 | |
7a623c03 MCC |
272 | static const struct attribute_group *csrow_attr_groups[] = { |
273 | &csrow_attr_grp, | |
274 | NULL | |
275 | }; | |
7c9281d7 | 276 | |
b2b3e736 | 277 | static const struct device_type csrow_attr_type = { |
7a623c03 | 278 | .groups = csrow_attr_groups, |
7c9281d7 DT |
279 | }; |
280 | ||
7a623c03 MCC |
281 | /* |
282 | * possible dynamic channel DIMM Label attribute files | |
283 | * | |
284 | */ | |
7a623c03 | 285 | DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 286 | channel_dimm_label_show, channel_dimm_label_store, 0); |
7a623c03 | 287 | DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 288 | channel_dimm_label_show, channel_dimm_label_store, 1); |
7a623c03 | 289 | DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 290 | channel_dimm_label_show, channel_dimm_label_store, 2); |
7a623c03 | 291 | DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 292 | channel_dimm_label_show, channel_dimm_label_store, 3); |
7a623c03 | 293 | DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 294 | channel_dimm_label_show, channel_dimm_label_store, 4); |
7a623c03 | 295 | DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR, |
052dfb45 | 296 | channel_dimm_label_show, channel_dimm_label_store, 5); |
bba14295 BP |
297 | DEVICE_CHANNEL(ch6_dimm_label, S_IRUGO | S_IWUSR, |
298 | channel_dimm_label_show, channel_dimm_label_store, 6); | |
299 | DEVICE_CHANNEL(ch7_dimm_label, S_IRUGO | S_IWUSR, | |
300 | channel_dimm_label_show, channel_dimm_label_store, 7); | |
7c9281d7 DT |
301 | |
302 | /* Total possible dynamic DIMM Label attribute file table */ | |
2c1946b6 TI |
303 | static struct attribute *dynamic_csrow_dimm_attr[] = { |
304 | &dev_attr_legacy_ch0_dimm_label.attr.attr, | |
305 | &dev_attr_legacy_ch1_dimm_label.attr.attr, | |
306 | &dev_attr_legacy_ch2_dimm_label.attr.attr, | |
307 | &dev_attr_legacy_ch3_dimm_label.attr.attr, | |
308 | &dev_attr_legacy_ch4_dimm_label.attr.attr, | |
309 | &dev_attr_legacy_ch5_dimm_label.attr.attr, | |
bba14295 BP |
310 | &dev_attr_legacy_ch6_dimm_label.attr.attr, |
311 | &dev_attr_legacy_ch7_dimm_label.attr.attr, | |
2c1946b6 | 312 | NULL |
7c9281d7 DT |
313 | }; |
314 | ||
315 | /* possible dynamic channel ce_count attribute files */ | |
c8c64d16 | 316 | DEVICE_CHANNEL(ch0_ce_count, S_IRUGO, |
7a623c03 | 317 | channel_ce_count_show, NULL, 0); |
c8c64d16 | 318 | DEVICE_CHANNEL(ch1_ce_count, S_IRUGO, |
7a623c03 | 319 | channel_ce_count_show, NULL, 1); |
c8c64d16 | 320 | DEVICE_CHANNEL(ch2_ce_count, S_IRUGO, |
7a623c03 | 321 | channel_ce_count_show, NULL, 2); |
c8c64d16 | 322 | DEVICE_CHANNEL(ch3_ce_count, S_IRUGO, |
7a623c03 | 323 | channel_ce_count_show, NULL, 3); |
c8c64d16 | 324 | DEVICE_CHANNEL(ch4_ce_count, S_IRUGO, |
7a623c03 | 325 | channel_ce_count_show, NULL, 4); |
c8c64d16 | 326 | DEVICE_CHANNEL(ch5_ce_count, S_IRUGO, |
7a623c03 | 327 | channel_ce_count_show, NULL, 5); |
bba14295 BP |
328 | DEVICE_CHANNEL(ch6_ce_count, S_IRUGO, |
329 | channel_ce_count_show, NULL, 6); | |
330 | DEVICE_CHANNEL(ch7_ce_count, S_IRUGO, | |
331 | channel_ce_count_show, NULL, 7); | |
7c9281d7 DT |
332 | |
333 | /* Total possible dynamic ce_count attribute file table */ | |
2c1946b6 TI |
334 | static struct attribute *dynamic_csrow_ce_count_attr[] = { |
335 | &dev_attr_legacy_ch0_ce_count.attr.attr, | |
336 | &dev_attr_legacy_ch1_ce_count.attr.attr, | |
337 | &dev_attr_legacy_ch2_ce_count.attr.attr, | |
338 | &dev_attr_legacy_ch3_ce_count.attr.attr, | |
339 | &dev_attr_legacy_ch4_ce_count.attr.attr, | |
340 | &dev_attr_legacy_ch5_ce_count.attr.attr, | |
bba14295 BP |
341 | &dev_attr_legacy_ch6_ce_count.attr.attr, |
342 | &dev_attr_legacy_ch7_ce_count.attr.attr, | |
2c1946b6 TI |
343 | NULL |
344 | }; | |
345 | ||
346 | static umode_t csrow_dev_is_visible(struct kobject *kobj, | |
347 | struct attribute *attr, int idx) | |
348 | { | |
349 | struct device *dev = kobj_to_dev(kobj); | |
350 | struct csrow_info *csrow = container_of(dev, struct csrow_info, dev); | |
351 | ||
352 | if (idx >= csrow->nr_channels) | |
353 | return 0; | |
bba14295 BP |
354 | |
355 | if (idx >= ARRAY_SIZE(dynamic_csrow_ce_count_attr) - 1) { | |
356 | WARN_ONCE(1, "idx: %d\n", idx); | |
357 | return 0; | |
358 | } | |
359 | ||
2c1946b6 TI |
360 | /* Only expose populated DIMMs */ |
361 | if (!csrow->channels[idx]->dimm->nr_pages) | |
362 | return 0; | |
bba14295 | 363 | |
2c1946b6 TI |
364 | return attr->mode; |
365 | } | |
366 | ||
367 | ||
368 | static const struct attribute_group csrow_dev_dimm_group = { | |
369 | .attrs = dynamic_csrow_dimm_attr, | |
370 | .is_visible = csrow_dev_is_visible, | |
371 | }; | |
372 | ||
373 | static const struct attribute_group csrow_dev_ce_count_group = { | |
374 | .attrs = dynamic_csrow_ce_count_attr, | |
375 | .is_visible = csrow_dev_is_visible, | |
376 | }; | |
377 | ||
378 | static const struct attribute_group *csrow_dev_groups[] = { | |
379 | &csrow_dev_dimm_group, | |
380 | &csrow_dev_ce_count_group, | |
381 | NULL | |
7c9281d7 DT |
382 | }; |
383 | ||
bea1bfd5 RR |
384 | static void csrow_release(struct device *dev) |
385 | { | |
386 | /* | |
387 | * Nothing to do, just unregister sysfs here. The mci | |
388 | * device owns the data and will also release it. | |
389 | */ | |
390 | } | |
391 | ||
e39f4ea9 MCC |
392 | static inline int nr_pages_per_csrow(struct csrow_info *csrow) |
393 | { | |
394 | int chan, nr_pages = 0; | |
395 | ||
396 | for (chan = 0; chan < csrow->nr_channels; chan++) | |
de3910eb | 397 | nr_pages += csrow->channels[chan]->dimm->nr_pages; |
e39f4ea9 MCC |
398 | |
399 | return nr_pages; | |
400 | } | |
401 | ||
7a623c03 MCC |
402 | /* Create a CSROW object under specifed edac_mc_device */ |
403 | static int edac_create_csrow_object(struct mem_ctl_info *mci, | |
404 | struct csrow_info *csrow, int index) | |
7c9281d7 | 405 | { |
585fb3d9 PB |
406 | int err; |
407 | ||
7a623c03 | 408 | csrow->dev.type = &csrow_attr_type; |
2c1946b6 | 409 | csrow->dev.groups = csrow_dev_groups; |
bea1bfd5 | 410 | csrow->dev.release = csrow_release; |
7a623c03 MCC |
411 | device_initialize(&csrow->dev); |
412 | csrow->dev.parent = &mci->dev; | |
921a6899 | 413 | csrow->mci = mci; |
7a623c03 MCC |
414 | dev_set_name(&csrow->dev, "csrow%d", index); |
415 | dev_set_drvdata(&csrow->dev, csrow); | |
7c9281d7 | 416 | |
585fb3d9 | 417 | err = device_add(&csrow->dev); |
e701f412 RR |
418 | if (err) { |
419 | edac_dbg(1, "failure: create device %s\n", dev_name(&csrow->dev)); | |
585fb3d9 | 420 | put_device(&csrow->dev); |
e701f412 RR |
421 | return err; |
422 | } | |
585fb3d9 | 423 | |
e701f412 RR |
424 | edac_dbg(0, "device %s created\n", dev_name(&csrow->dev)); |
425 | ||
426 | return 0; | |
7a623c03 | 427 | } |
7c9281d7 DT |
428 | |
429 | /* Create a CSROW object under specifed edac_mc_device */ | |
7a623c03 | 430 | static int edac_create_csrow_objects(struct mem_ctl_info *mci) |
7c9281d7 | 431 | { |
2c1946b6 | 432 | int err, i; |
7a623c03 | 433 | struct csrow_info *csrow; |
7c9281d7 | 434 | |
7a623c03 | 435 | for (i = 0; i < mci->nr_csrows; i++) { |
de3910eb | 436 | csrow = mci->csrows[i]; |
e39f4ea9 MCC |
437 | if (!nr_pages_per_csrow(csrow)) |
438 | continue; | |
de3910eb | 439 | err = edac_create_csrow_object(mci, mci->csrows[i], i); |
e701f412 | 440 | if (err < 0) |
7a623c03 MCC |
441 | goto error; |
442 | } | |
443 | return 0; | |
8096cfaf | 444 | |
7a623c03 MCC |
445 | error: |
446 | for (--i; i >= 0; i--) { | |
bea1bfd5 RR |
447 | if (device_is_registered(&mci->csrows[i]->dev)) |
448 | device_unregister(&mci->csrows[i]->dev); | |
8096cfaf | 449 | } |
7c9281d7 | 450 | |
7a623c03 MCC |
451 | return err; |
452 | } | |
8096cfaf | 453 | |
7a623c03 MCC |
454 | static void edac_delete_csrow_objects(struct mem_ctl_info *mci) |
455 | { | |
2c1946b6 | 456 | int i; |
8096cfaf | 457 | |
bea1bfd5 RR |
458 | for (i = 0; i < mci->nr_csrows; i++) { |
459 | if (device_is_registered(&mci->csrows[i]->dev)) | |
460 | device_unregister(&mci->csrows[i]->dev); | |
7c9281d7 | 461 | } |
7c9281d7 | 462 | } |
bea1bfd5 | 463 | |
19974710 MCC |
464 | #endif |
465 | ||
466 | /* | |
467 | * Per-dimm (or per-rank) devices | |
468 | */ | |
469 | ||
470 | #define to_dimm(k) container_of(k, struct dimm_info, dev) | |
471 | ||
472 | /* show/store functions for DIMM Label attributes */ | |
473 | static ssize_t dimmdev_location_show(struct device *dev, | |
474 | struct device_attribute *mattr, char *data) | |
475 | { | |
476 | struct dimm_info *dimm = to_dimm(dev); | |
e6bbde8b | 477 | ssize_t count; |
19974710 | 478 | |
e6bbde8b XW |
479 | count = edac_dimm_info_location(dimm, data, PAGE_SIZE); |
480 | count += scnprintf(data + count, PAGE_SIZE - count, "\n"); | |
481 | ||
482 | return count; | |
19974710 MCC |
483 | } |
484 | ||
485 | static ssize_t dimmdev_label_show(struct device *dev, | |
486 | struct device_attribute *mattr, char *data) | |
487 | { | |
488 | struct dimm_info *dimm = to_dimm(dev); | |
489 | ||
490 | /* if field has not been initialized, there is nothing to send */ | |
491 | if (!dimm->label[0]) | |
492 | return 0; | |
493 | ||
1ea62c59 | 494 | return snprintf(data, sizeof(dimm->label) + 1, "%s\n", dimm->label); |
19974710 MCC |
495 | } |
496 | ||
497 | static ssize_t dimmdev_label_store(struct device *dev, | |
498 | struct device_attribute *mattr, | |
499 | const char *data, | |
500 | size_t count) | |
501 | { | |
502 | struct dimm_info *dimm = to_dimm(dev); | |
438470b8 | 503 | size_t copy_count = count; |
19974710 | 504 | |
438470b8 TK |
505 | if (count == 0) |
506 | return -EINVAL; | |
507 | ||
508 | if (data[count - 1] == '\0' || data[count - 1] == '\n') | |
509 | copy_count -= 1; | |
510 | ||
d0c9c930 | 511 | if (copy_count == 0 || copy_count >= sizeof(dimm->label)) |
438470b8 | 512 | return -EINVAL; |
19974710 | 513 | |
438470b8 TK |
514 | strncpy(dimm->label, data, copy_count); |
515 | dimm->label[copy_count] = '\0'; | |
19974710 | 516 | |
438470b8 | 517 | return count; |
19974710 MCC |
518 | } |
519 | ||
520 | static ssize_t dimmdev_size_show(struct device *dev, | |
521 | struct device_attribute *mattr, char *data) | |
522 | { | |
523 | struct dimm_info *dimm = to_dimm(dev); | |
524 | ||
525 | return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages)); | |
526 | } | |
527 | ||
528 | static ssize_t dimmdev_mem_type_show(struct device *dev, | |
529 | struct device_attribute *mattr, char *data) | |
530 | { | |
531 | struct dimm_info *dimm = to_dimm(dev); | |
532 | ||
d6dd77eb | 533 | return sprintf(data, "%s\n", edac_mem_types[dimm->mtype]); |
19974710 MCC |
534 | } |
535 | ||
536 | static ssize_t dimmdev_dev_type_show(struct device *dev, | |
537 | struct device_attribute *mattr, char *data) | |
538 | { | |
539 | struct dimm_info *dimm = to_dimm(dev); | |
540 | ||
541 | return sprintf(data, "%s\n", dev_types[dimm->dtype]); | |
542 | } | |
543 | ||
544 | static ssize_t dimmdev_edac_mode_show(struct device *dev, | |
545 | struct device_attribute *mattr, | |
546 | char *data) | |
547 | { | |
548 | struct dimm_info *dimm = to_dimm(dev); | |
549 | ||
550 | return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]); | |
551 | } | |
552 | ||
4fb6fde7 AM |
553 | static ssize_t dimmdev_ce_count_show(struct device *dev, |
554 | struct device_attribute *mattr, | |
555 | char *data) | |
556 | { | |
557 | struct dimm_info *dimm = to_dimm(dev); | |
977b1ce7 | 558 | |
4aa92c86 | 559 | return sprintf(data, "%u\n", dimm->ce_count); |
4fb6fde7 AM |
560 | } |
561 | ||
562 | static ssize_t dimmdev_ue_count_show(struct device *dev, | |
563 | struct device_attribute *mattr, | |
564 | char *data) | |
565 | { | |
566 | struct dimm_info *dimm = to_dimm(dev); | |
977b1ce7 | 567 | |
4aa92c86 | 568 | return sprintf(data, "%u\n", dimm->ue_count); |
4fb6fde7 AM |
569 | } |
570 | ||
19974710 MCC |
571 | /* dimm/rank attribute files */ |
572 | static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR, | |
573 | dimmdev_label_show, dimmdev_label_store); | |
574 | static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL); | |
575 | static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL); | |
576 | static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL); | |
577 | static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL); | |
578 | static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL); | |
4fb6fde7 AM |
579 | static DEVICE_ATTR(dimm_ce_count, S_IRUGO, dimmdev_ce_count_show, NULL); |
580 | static DEVICE_ATTR(dimm_ue_count, S_IRUGO, dimmdev_ue_count_show, NULL); | |
19974710 MCC |
581 | |
582 | /* attributes of the dimm<id>/rank<id> object */ | |
583 | static struct attribute *dimm_attrs[] = { | |
584 | &dev_attr_dimm_label.attr, | |
585 | &dev_attr_dimm_location.attr, | |
586 | &dev_attr_size.attr, | |
587 | &dev_attr_dimm_mem_type.attr, | |
588 | &dev_attr_dimm_dev_type.attr, | |
589 | &dev_attr_dimm_edac_mode.attr, | |
4fb6fde7 AM |
590 | &dev_attr_dimm_ce_count.attr, |
591 | &dev_attr_dimm_ue_count.attr, | |
19974710 MCC |
592 | NULL, |
593 | }; | |
594 | ||
1c18be5a | 595 | static const struct attribute_group dimm_attr_grp = { |
19974710 MCC |
596 | .attrs = dimm_attrs, |
597 | }; | |
598 | ||
599 | static const struct attribute_group *dimm_attr_groups[] = { | |
600 | &dimm_attr_grp, | |
601 | NULL | |
602 | }; | |
603 | ||
b2b3e736 | 604 | static const struct device_type dimm_attr_type = { |
19974710 | 605 | .groups = dimm_attr_groups, |
19974710 MCC |
606 | }; |
607 | ||
bea1bfd5 RR |
608 | static void dimm_release(struct device *dev) |
609 | { | |
610 | /* | |
611 | * Nothing to do, just unregister sysfs here. The mci | |
612 | * device owns the data and will also release it. | |
613 | */ | |
614 | } | |
615 | ||
19974710 MCC |
616 | /* Create a DIMM object under specifed memory controller device */ |
617 | static int edac_create_dimm_object(struct mem_ctl_info *mci, | |
c498afaf | 618 | struct dimm_info *dimm) |
19974710 MCC |
619 | { |
620 | int err; | |
621 | dimm->mci = mci; | |
622 | ||
623 | dimm->dev.type = &dimm_attr_type; | |
bea1bfd5 | 624 | dimm->dev.release = dimm_release; |
19974710 MCC |
625 | device_initialize(&dimm->dev); |
626 | ||
627 | dimm->dev.parent = &mci->dev; | |
9713faec | 628 | if (mci->csbased) |
c498afaf | 629 | dev_set_name(&dimm->dev, "rank%d", dimm->idx); |
19974710 | 630 | else |
c498afaf | 631 | dev_set_name(&dimm->dev, "dimm%d", dimm->idx); |
19974710 MCC |
632 | dev_set_drvdata(&dimm->dev, dimm); |
633 | pm_runtime_forbid(&mci->dev); | |
634 | ||
7adc05d2 | 635 | err = device_add(&dimm->dev); |
e701f412 RR |
636 | if (err) { |
637 | edac_dbg(1, "failure: create device %s\n", dev_name(&dimm->dev)); | |
7adc05d2 | 638 | put_device(&dimm->dev); |
e701f412 RR |
639 | return err; |
640 | } | |
19974710 | 641 | |
e701f412 RR |
642 | if (IS_ENABLED(CONFIG_EDAC_DEBUG)) { |
643 | char location[80]; | |
19974710 | 644 | |
e701f412 RR |
645 | edac_dimm_info_location(dimm, location, sizeof(location)); |
646 | edac_dbg(0, "device %s created at location %s\n", | |
647 | dev_name(&dimm->dev), location); | |
648 | } | |
649 | ||
650 | return 0; | |
19974710 | 651 | } |
7c9281d7 | 652 | |
7a623c03 MCC |
653 | /* |
654 | * Memory controller device | |
655 | */ | |
656 | ||
657 | #define to_mci(k) container_of(k, struct mem_ctl_info, dev) | |
7c9281d7 | 658 | |
7a623c03 MCC |
659 | static ssize_t mci_reset_counters_store(struct device *dev, |
660 | struct device_attribute *mattr, | |
079708b9 | 661 | const char *data, size_t count) |
7c9281d7 | 662 | { |
7a623c03 | 663 | struct mem_ctl_info *mci = to_mci(dev); |
4aa92c86 RR |
664 | struct dimm_info *dimm; |
665 | int row, chan; | |
666 | ||
5926ff50 MCC |
667 | mci->ue_mc = 0; |
668 | mci->ce_mc = 0; | |
7a623c03 MCC |
669 | mci->ue_noinfo_count = 0; |
670 | mci->ce_noinfo_count = 0; | |
7c9281d7 DT |
671 | |
672 | for (row = 0; row < mci->nr_csrows; row++) { | |
de3910eb | 673 | struct csrow_info *ri = mci->csrows[row]; |
7c9281d7 DT |
674 | |
675 | ri->ue_count = 0; | |
676 | ri->ce_count = 0; | |
677 | ||
678 | for (chan = 0; chan < ri->nr_channels; chan++) | |
de3910eb | 679 | ri->channels[chan]->ce_count = 0; |
7c9281d7 DT |
680 | } |
681 | ||
4aa92c86 RR |
682 | mci_for_each_dimm(mci, dimm) { |
683 | dimm->ue_count = 0; | |
684 | dimm->ce_count = 0; | |
7a623c03 MCC |
685 | } |
686 | ||
7c9281d7 DT |
687 | mci->start_time = jiffies; |
688 | return count; | |
689 | } | |
690 | ||
39094443 BP |
691 | /* Memory scrubbing interface: |
692 | * | |
693 | * A MC driver can limit the scrubbing bandwidth based on the CPU type. | |
694 | * Therefore, ->set_sdram_scrub_rate should be made to return the actual | |
695 | * bandwidth that is accepted or 0 when scrubbing is to be disabled. | |
696 | * | |
697 | * Negative value still means that an error has occurred while setting | |
698 | * the scrub rate. | |
699 | */ | |
7a623c03 MCC |
700 | static ssize_t mci_sdram_scrub_rate_store(struct device *dev, |
701 | struct device_attribute *mattr, | |
eba042a8 | 702 | const char *data, size_t count) |
7c9281d7 | 703 | { |
7a623c03 | 704 | struct mem_ctl_info *mci = to_mci(dev); |
eba042a8 | 705 | unsigned long bandwidth = 0; |
39094443 | 706 | int new_bw = 0; |
7c9281d7 | 707 | |
c7f62fc8 | 708 | if (kstrtoul(data, 10, &bandwidth) < 0) |
eba042a8 | 709 | return -EINVAL; |
7c9281d7 | 710 | |
39094443 | 711 | new_bw = mci->set_sdram_scrub_rate(mci, bandwidth); |
4949603a MT |
712 | if (new_bw < 0) { |
713 | edac_printk(KERN_WARNING, EDAC_MC, | |
714 | "Error setting scrub rate to: %lu\n", bandwidth); | |
715 | return -EINVAL; | |
7c9281d7 | 716 | } |
39094443 | 717 | |
4949603a | 718 | return count; |
7c9281d7 DT |
719 | } |
720 | ||
39094443 BP |
721 | /* |
722 | * ->get_sdram_scrub_rate() return value semantics same as above. | |
723 | */ | |
7a623c03 MCC |
724 | static ssize_t mci_sdram_scrub_rate_show(struct device *dev, |
725 | struct device_attribute *mattr, | |
726 | char *data) | |
7c9281d7 | 727 | { |
7a623c03 | 728 | struct mem_ctl_info *mci = to_mci(dev); |
39094443 | 729 | int bandwidth = 0; |
eba042a8 | 730 | |
39094443 BP |
731 | bandwidth = mci->get_sdram_scrub_rate(mci); |
732 | if (bandwidth < 0) { | |
eba042a8 | 733 | edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n"); |
39094443 | 734 | return bandwidth; |
7c9281d7 | 735 | } |
39094443 | 736 | |
39094443 | 737 | return sprintf(data, "%d\n", bandwidth); |
7c9281d7 DT |
738 | } |
739 | ||
740 | /* default attribute files for the MCI object */ | |
7a623c03 MCC |
741 | static ssize_t mci_ue_count_show(struct device *dev, |
742 | struct device_attribute *mattr, | |
743 | char *data) | |
7c9281d7 | 744 | { |
7a623c03 MCC |
745 | struct mem_ctl_info *mci = to_mci(dev); |
746 | ||
5926ff50 | 747 | return sprintf(data, "%d\n", mci->ue_mc); |
7c9281d7 DT |
748 | } |
749 | ||
7a623c03 MCC |
750 | static ssize_t mci_ce_count_show(struct device *dev, |
751 | struct device_attribute *mattr, | |
752 | char *data) | |
7c9281d7 | 753 | { |
7a623c03 MCC |
754 | struct mem_ctl_info *mci = to_mci(dev); |
755 | ||
5926ff50 | 756 | return sprintf(data, "%d\n", mci->ce_mc); |
7c9281d7 DT |
757 | } |
758 | ||
7a623c03 MCC |
759 | static ssize_t mci_ce_noinfo_show(struct device *dev, |
760 | struct device_attribute *mattr, | |
761 | char *data) | |
7c9281d7 | 762 | { |
7a623c03 MCC |
763 | struct mem_ctl_info *mci = to_mci(dev); |
764 | ||
079708b9 | 765 | return sprintf(data, "%d\n", mci->ce_noinfo_count); |
7c9281d7 DT |
766 | } |
767 | ||
7a623c03 MCC |
768 | static ssize_t mci_ue_noinfo_show(struct device *dev, |
769 | struct device_attribute *mattr, | |
770 | char *data) | |
7c9281d7 | 771 | { |
7a623c03 MCC |
772 | struct mem_ctl_info *mci = to_mci(dev); |
773 | ||
079708b9 | 774 | return sprintf(data, "%d\n", mci->ue_noinfo_count); |
7c9281d7 DT |
775 | } |
776 | ||
7a623c03 MCC |
777 | static ssize_t mci_seconds_show(struct device *dev, |
778 | struct device_attribute *mattr, | |
779 | char *data) | |
7c9281d7 | 780 | { |
7a623c03 MCC |
781 | struct mem_ctl_info *mci = to_mci(dev); |
782 | ||
079708b9 | 783 | return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ); |
7c9281d7 DT |
784 | } |
785 | ||
7a623c03 MCC |
786 | static ssize_t mci_ctl_name_show(struct device *dev, |
787 | struct device_attribute *mattr, | |
788 | char *data) | |
7c9281d7 | 789 | { |
7a623c03 MCC |
790 | struct mem_ctl_info *mci = to_mci(dev); |
791 | ||
079708b9 | 792 | return sprintf(data, "%s\n", mci->ctl_name); |
7c9281d7 DT |
793 | } |
794 | ||
7a623c03 MCC |
795 | static ssize_t mci_size_mb_show(struct device *dev, |
796 | struct device_attribute *mattr, | |
797 | char *data) | |
7c9281d7 | 798 | { |
7a623c03 | 799 | struct mem_ctl_info *mci = to_mci(dev); |
a895bf8b | 800 | int total_pages = 0, csrow_idx, j; |
7c9281d7 | 801 | |
a895bf8b | 802 | for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { |
de3910eb | 803 | struct csrow_info *csrow = mci->csrows[csrow_idx]; |
7c9281d7 | 804 | |
1eef1282 MCC |
805 | for (j = 0; j < csrow->nr_channels; j++) { |
806 | struct dimm_info *dimm = csrow->channels[j]->dimm; | |
3c062276 | 807 | |
1eef1282 | 808 | total_pages += dimm->nr_pages; |
a895bf8b | 809 | } |
7c9281d7 DT |
810 | } |
811 | ||
079708b9 | 812 | return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); |
7c9281d7 DT |
813 | } |
814 | ||
8ad6c78a MCC |
815 | static ssize_t mci_max_location_show(struct device *dev, |
816 | struct device_attribute *mattr, | |
817 | char *data) | |
818 | { | |
819 | struct mem_ctl_info *mci = to_mci(dev); | |
e6bbde8b | 820 | int len = PAGE_SIZE; |
8ad6c78a | 821 | char *p = data; |
e6bbde8b | 822 | int i, n; |
8ad6c78a MCC |
823 | |
824 | for (i = 0; i < mci->n_layers; i++) { | |
e6bbde8b XW |
825 | n = scnprintf(p, len, "%s %d ", |
826 | edac_layer_name[mci->layers[i].type], | |
827 | mci->layers[i].size - 1); | |
828 | len -= n; | |
829 | if (len <= 0) | |
830 | goto out; | |
831 | ||
832 | p += n; | |
8ad6c78a MCC |
833 | } |
834 | ||
e6bbde8b XW |
835 | p += scnprintf(p, len, "\n"); |
836 | out: | |
8ad6c78a MCC |
837 | return p - data; |
838 | } | |
839 | ||
7c9281d7 | 840 | /* default Control file */ |
f11135d8 | 841 | static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); |
7c9281d7 DT |
842 | |
843 | /* default Attribute files */ | |
f11135d8 BP |
844 | static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); |
845 | static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); | |
846 | static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); | |
847 | static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); | |
848 | static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); | |
849 | static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); | |
850 | static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); | |
851 | static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); | |
7c9281d7 DT |
852 | |
853 | /* memory scrubber attribute file */ | |
628ea92f | 854 | static DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show, |
2c1946b6 | 855 | mci_sdram_scrub_rate_store); /* umode set later in is_visible */ |
7c9281d7 | 856 | |
7a623c03 MCC |
857 | static struct attribute *mci_attrs[] = { |
858 | &dev_attr_reset_counters.attr, | |
859 | &dev_attr_mc_name.attr, | |
860 | &dev_attr_size_mb.attr, | |
861 | &dev_attr_seconds_since_reset.attr, | |
862 | &dev_attr_ue_noinfo_count.attr, | |
863 | &dev_attr_ce_noinfo_count.attr, | |
864 | &dev_attr_ue_count.attr, | |
865 | &dev_attr_ce_count.attr, | |
8ad6c78a | 866 | &dev_attr_max_location.attr, |
2c1946b6 | 867 | &dev_attr_sdram_scrub_rate.attr, |
7c9281d7 DT |
868 | NULL |
869 | }; | |
870 | ||
2c1946b6 TI |
871 | static umode_t mci_attr_is_visible(struct kobject *kobj, |
872 | struct attribute *attr, int idx) | |
873 | { | |
874 | struct device *dev = kobj_to_dev(kobj); | |
875 | struct mem_ctl_info *mci = to_mci(dev); | |
876 | umode_t mode = 0; | |
877 | ||
878 | if (attr != &dev_attr_sdram_scrub_rate.attr) | |
879 | return attr->mode; | |
880 | if (mci->get_sdram_scrub_rate) | |
881 | mode |= S_IRUGO; | |
882 | if (mci->set_sdram_scrub_rate) | |
883 | mode |= S_IWUSR; | |
884 | return mode; | |
885 | } | |
886 | ||
1c18be5a | 887 | static const struct attribute_group mci_attr_grp = { |
7a623c03 | 888 | .attrs = mci_attrs, |
2c1946b6 | 889 | .is_visible = mci_attr_is_visible, |
cc301b3a MCC |
890 | }; |
891 | ||
7a623c03 MCC |
892 | static const struct attribute_group *mci_attr_groups[] = { |
893 | &mci_attr_grp, | |
894 | NULL | |
cc301b3a MCC |
895 | }; |
896 | ||
b2b3e736 | 897 | static const struct device_type mci_attr_type = { |
7a623c03 | 898 | .groups = mci_attr_groups, |
7a623c03 | 899 | }; |
8096cfaf | 900 | |
7c9281d7 DT |
901 | /* |
902 | * Create a new Memory Controller kobject instance, | |
903 | * mc<id> under the 'mc' directory | |
904 | * | |
905 | * Return: | |
906 | * 0 Success | |
907 | * !0 Failure | |
908 | */ | |
4e8d230d TI |
909 | int edac_create_sysfs_mci_device(struct mem_ctl_info *mci, |
910 | const struct attribute_group **groups) | |
7c9281d7 | 911 | { |
c498afaf RR |
912 | struct dimm_info *dimm; |
913 | int err; | |
7c9281d7 | 914 | |
7a623c03 | 915 | /* get the /sys/devices/system/edac subsys reference */ |
7a623c03 | 916 | mci->dev.type = &mci_attr_type; |
de3910eb | 917 | mci->dev.parent = mci_pdev; |
4e8d230d | 918 | mci->dev.groups = groups; |
7a623c03 MCC |
919 | dev_set_name(&mci->dev, "mc%d", mci->mc_idx); |
920 | dev_set_drvdata(&mci->dev, mci); | |
921 | pm_runtime_forbid(&mci->dev); | |
922 | ||
7a623c03 MCC |
923 | err = device_add(&mci->dev); |
924 | if (err < 0) { | |
3d958823 | 925 | edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); |
bea1bfd5 | 926 | /* no put_device() here, free mci with _edac_mc_free() */ |
644110e1 | 927 | return err; |
42a8e397 DT |
928 | } |
929 | ||
e701f412 RR |
930 | edac_dbg(0, "device %s created\n", dev_name(&mci->dev)); |
931 | ||
7a623c03 MCC |
932 | /* |
933 | * Create the dimm/rank devices | |
7c9281d7 | 934 | */ |
c498afaf | 935 | mci_for_each_dimm(mci, dimm) { |
7a623c03 | 936 | /* Only expose populated DIMMs */ |
1bf1950c | 937 | if (!dimm->nr_pages) |
7a623c03 | 938 | continue; |
1bf1950c | 939 | |
c498afaf | 940 | err = edac_create_dimm_object(mci, dimm); |
e701f412 | 941 | if (err) |
bea1bfd5 | 942 | goto fail; |
7c9281d7 DT |
943 | } |
944 | ||
19974710 | 945 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 MCC |
946 | err = edac_create_csrow_objects(mci); |
947 | if (err < 0) | |
bea1bfd5 | 948 | goto fail; |
19974710 | 949 | #endif |
7a623c03 | 950 | |
7ac8bf9b | 951 | edac_create_debugfs_nodes(mci); |
7c9281d7 DT |
952 | return 0; |
953 | ||
bea1bfd5 RR |
954 | fail: |
955 | edac_remove_sysfs_mci_device(mci); | |
12e26969 | 956 | |
7c9281d7 DT |
957 | return err; |
958 | } | |
959 | ||
960 | /* | |
961 | * remove a Memory Controller instance | |
962 | */ | |
963 | void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | |
964 | { | |
c498afaf | 965 | struct dimm_info *dimm; |
7c9281d7 | 966 | |
bea1bfd5 RR |
967 | if (!device_is_registered(&mci->dev)) |
968 | return; | |
969 | ||
956b9ba1 | 970 | edac_dbg(0, "\n"); |
7c9281d7 | 971 | |
452a6bf9 | 972 | #ifdef CONFIG_EDAC_DEBUG |
30f84a89 | 973 | edac_debugfs_remove_recursive(mci->debugfs); |
452a6bf9 | 974 | #endif |
19974710 | 975 | #ifdef CONFIG_EDAC_LEGACY_SYSFS |
7a623c03 | 976 | edac_delete_csrow_objects(mci); |
19974710 | 977 | #endif |
7c9281d7 | 978 | |
c498afaf | 979 | mci_for_each_dimm(mci, dimm) { |
bea1bfd5 | 980 | if (!device_is_registered(&dimm->dev)) |
7a623c03 | 981 | continue; |
e701f412 | 982 | edac_dbg(1, "unregistering device %s\n", dev_name(&dimm->dev)); |
44d22e24 | 983 | device_unregister(&dimm->dev); |
6fe1108f | 984 | } |
8096cfaf | 985 | |
bea1bfd5 RR |
986 | /* only remove the device, but keep mci */ |
987 | device_del(&mci->dev); | |
7a623c03 | 988 | } |
8096cfaf | 989 | |
de3910eb | 990 | static void mc_attr_release(struct device *dev) |
7a623c03 | 991 | { |
de3910eb MCC |
992 | /* |
993 | * There's no container structure here, as this is just the mci | |
994 | * parent device, used to create the /sys/devices/mc sysfs node. | |
995 | * So, there are no attributes on it. | |
996 | */ | |
e701f412 | 997 | edac_dbg(1, "device %s released\n", dev_name(dev)); |
de3910eb | 998 | kfree(dev); |
7a623c03 | 999 | } |
8096cfaf | 1000 | |
8096cfaf | 1001 | /* |
7a623c03 | 1002 | * Init/exit code for the module. Basically, creates/removes /sys/class/rc |
8096cfaf | 1003 | */ |
7a623c03 | 1004 | int __init edac_mc_sysfs_init(void) |
8096cfaf | 1005 | { |
7a623c03 | 1006 | int err; |
8096cfaf | 1007 | |
de3910eb | 1008 | mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL); |
644110e1 RR |
1009 | if (!mci_pdev) |
1010 | return -ENOMEM; | |
de3910eb | 1011 | |
d4538000 | 1012 | mci_pdev->bus = edac_get_sysfs_subsys(); |
bea1bfd5 RR |
1013 | mci_pdev->release = mc_attr_release; |
1014 | mci_pdev->init_name = "mc"; | |
8096cfaf | 1015 | |
bea1bfd5 | 1016 | err = device_register(mci_pdev); |
644110e1 | 1017 | if (err < 0) { |
e701f412 | 1018 | edac_dbg(1, "failure: create device %s\n", dev_name(mci_pdev)); |
644110e1 RR |
1019 | put_device(mci_pdev); |
1020 | return err; | |
1021 | } | |
8096cfaf | 1022 | |
956b9ba1 | 1023 | edac_dbg(0, "device %s created\n", dev_name(mci_pdev)); |
de3910eb | 1024 | |
8096cfaf | 1025 | return 0; |
8096cfaf DT |
1026 | } |
1027 | ||
c6b97bcf | 1028 | void edac_mc_sysfs_exit(void) |
8096cfaf | 1029 | { |
44d22e24 | 1030 | device_unregister(mci_pdev); |
8096cfaf | 1031 | } |