[mirror_ubuntu-bionic-kernel.git] / drivers / edac / octeon_edac-pci.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2012 Cavium, Inc.
 * Copyright (C) 2009 Wind River Systems,
 *   written by Ralf Baechle <ralf@linux-mips.org>
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/edac.h>

#include <asm/octeon/cvmx.h>
#include <asm/octeon/cvmx-npi-defs.h>
#include <asm/octeon/cvmx-pci-defs.h>
#include <asm/octeon/octeon.h>

#include "edac_module.h"

static void octeon_pci_poll(struct edac_pci_ctl_info *pci)
{
	union cvmx_pci_cfg01 cfg01;

	cfg01.u32 = octeon_npi_read32(CVMX_NPI_PCI_CFG01);
	if (cfg01.s.dpe) {		/* Detected parity error */
		edac_pci_handle_pe(pci, pci->ctl_name);
		cfg01.s.dpe = 1;		/* Reset  */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
	if (cfg01.s.sse) {
		edac_pci_handle_npe(pci, "Signaled System Error");
		cfg01.s.sse = 1;		/* Reset */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
	if (cfg01.s.rma) {
		edac_pci_handle_npe(pci, "Received Master Abort");
		cfg01.s.rma = 1;		/* Reset */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
	if (cfg01.s.rta) {
		edac_pci_handle_npe(pci, "Received Target Abort");
		cfg01.s.rta = 1;		/* Reset */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
	if (cfg01.s.sta) {
		edac_pci_handle_npe(pci, "Signaled Target Abort");
		cfg01.s.sta = 1;		/* Reset */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
	if (cfg01.s.mdpe) {
		edac_pci_handle_npe(pci, "Master Data Parity Error");
		cfg01.s.mdpe = 1;		/* Reset */
		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	}
}

static int octeon_pci_probe(struct platform_device *pdev)
{
	struct edac_pci_ctl_info *pci;
	int res = 0;

	pci = edac_pci_alloc_ctl_info(0, "octeon_pci_err");
	if (!pci)
		return -ENOMEM;

	pci->dev = &pdev->dev;
	platform_set_drvdata(pdev, pci);
	pci->dev_name = dev_name(&pdev->dev);

	pci->mod_name = "octeon-pci";
	pci->ctl_name = "octeon_pci_err";
	pci->edac_check = octeon_pci_poll;

	if (edac_pci_add_device(pci, 0) > 0) {
		pr_err("%s: edac_pci_add_device() failed\n", __func__);
		goto err;
	}

	return 0;

err:
	edac_pci_free_ctl_info(pci);

	return res;
}

static int octeon_pci_remove(struct platform_device *pdev)
{
	struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);

	edac_pci_del_device(&pdev->dev);
	edac_pci_free_ctl_info(pci);

	return 0;
}

static struct platform_driver octeon_pci_driver = {
	.probe = octeon_pci_probe,
	.remove = octeon_pci_remove,
	.driver = {
		   .name = "octeon_pci_edac",
	}
};
module_platform_driver(octeon_pci_driver);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
Commit	Line	Data
f65aad41 RB	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
e1ced097	6	* Copyright (C) 2012 Cavium, Inc.
f65aad41 RB	7	* Copyright (C) 2009 Wind River Systems,
	8	* written by Ralf Baechle <ralf@linux-mips.org>
	9	*/
	10	#include <linux/module.h>
	11	#include <linux/init.h>
	12	#include <linux/slab.h>
	13	#include <linux/io.h>
	14	#include <linux/edac.h>
	15
	16	#include <asm/octeon/cvmx.h>
	17	#include <asm/octeon/cvmx-npi-defs.h>
	18	#include <asm/octeon/cvmx-pci-defs.h>
	19	#include <asm/octeon/octeon.h>
	20
f65aad41 RB	21	#include "edac_module.h"
f65aad41 RB	22
e1ced097	23	static void octeon_pci_poll(struct edac_pci_ctl_info *pci)
f65aad41 RB	24	{
	25	union cvmx_pci_cfg01 cfg01;
	26
	27	cfg01.u32 = octeon_npi_read32(CVMX_NPI_PCI_CFG01);
	28	if (cfg01.s.dpe) { /* Detected parity error */
	29	edac_pci_handle_pe(pci, pci->ctl_name);
	30	cfg01.s.dpe = 1; /* Reset */
	31	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	32	}
	33	if (cfg01.s.sse) {
	34	edac_pci_handle_npe(pci, "Signaled System Error");
	35	cfg01.s.sse = 1; /* Reset */
	36	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	37	}
	38	if (cfg01.s.rma) {
	39	edac_pci_handle_npe(pci, "Received Master Abort");
	40	cfg01.s.rma = 1; /* Reset */
	41	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	42	}
	43	if (cfg01.s.rta) {
	44	edac_pci_handle_npe(pci, "Received Target Abort");
	45	cfg01.s.rta = 1; /* Reset */
	46	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	47	}
	48	if (cfg01.s.sta) {
	49	edac_pci_handle_npe(pci, "Signaled Target Abort");
	50	cfg01.s.sta = 1; /* Reset */
	51	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	52	}
	53	if (cfg01.s.mdpe) {
	54	edac_pci_handle_npe(pci, "Master Data Parity Error");
	55	cfg01.s.mdpe = 1; /* Reset */
	56	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
	57	}
f65aad41 RB	58	}
f65aad41 RB	59
9b3c6e85	60	static int octeon_pci_probe(struct platform_device *pdev)
f65aad41 RB	61	{
	62	struct edac_pci_ctl_info *pci;
	63	int res = 0;
	64
	65	pci = edac_pci_alloc_ctl_info(0, "octeon_pci_err");
	66	if (!pci)
	67	return -ENOMEM;
	68
	69	pci->dev = &pdev->dev;
	70	platform_set_drvdata(pdev, pci);
	71	pci->dev_name = dev_name(&pdev->dev);
	72
	73	pci->mod_name = "octeon-pci";
	74	pci->ctl_name = "octeon_pci_err";
e1ced097	75	pci->edac_check = octeon_pci_poll;
f65aad41 RB	76
	77	if (edac_pci_add_device(pci, 0) > 0) {
	78	pr_err("%s: edac_pci_add_device() failed\n", __func__);
	79	goto err;
	80	}
	81
	82	return 0;
	83
	84	err:
	85	edac_pci_free_ctl_info(pci);
	86
	87	return res;
	88	}
	89
e1ced097	90	static int octeon_pci_remove(struct platform_device *pdev)
f65aad41 RB	91	{
	92	struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);
	93
	94	edac_pci_del_device(&pdev->dev);
	95	edac_pci_free_ctl_info(pci);
	96
	97	return 0;
	98	}
	99
e1ced097 DD	100	static struct platform_driver octeon_pci_driver = {
	101	.probe = octeon_pci_probe,
	102	.remove = octeon_pci_remove,
f65aad41	103	.driver = {
e1ced097	104	.name = "octeon_pci_edac",
f65aad41 RB	105	}
f65aad41 RB	106	};
e1ced097	107	module_platform_driver(octeon_pci_driver);
f65aad41 RB	108
	109	MODULE_LICENSE("GPL");
	110	MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");