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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
c781c06d
KH
2/*
3 * Copyright (C) 2005-2007 Kristian Hoegsberg <krh@bitplanet.net>
3038e353
KH
4 */
5
e8ca9702 6#include <linux/bug.h>
459f7923
SR
7#include <linux/completion.h>
8#include <linux/crc-itu-t.h>
3038e353 9#include <linux/device.h>
459f7923 10#include <linux/errno.h>
77c9a5da
SR
11#include <linux/firewire.h>
12#include <linux/firewire-constants.h>
e8ca9702
SR
13#include <linux/jiffies.h>
14#include <linux/kernel.h>
459f7923 15#include <linux/kref.h>
e8ca9702 16#include <linux/list.h>
459f7923 17#include <linux/module.h>
6a5033be 18#include <linux/mutex.h>
e8ca9702 19#include <linux/spinlock.h>
e8ca9702
SR
20#include <linux/workqueue.h>
21
60063497 22#include <linux/atomic.h>
e8ca9702 23#include <asm/byteorder.h>
459f7923 24
77c9a5da 25#include "core.h"
3038e353 26
26b4950d
SR
27#define define_fw_printk_level(func, kern_level) \
28void func(const struct fw_card *card, const char *fmt, ...) \
29{ \
30 struct va_format vaf; \
31 va_list args; \
32 \
33 va_start(args, fmt); \
34 vaf.fmt = fmt; \
35 vaf.va = &args; \
36 printk(kern_level KBUILD_MODNAME " %s: %pV", \
37 dev_name(card->device), &vaf); \
38 va_end(args); \
39}
40define_fw_printk_level(fw_err, KERN_ERR);
41define_fw_printk_level(fw_notice, KERN_NOTICE);
42
cb7c96da 43int fw_compute_block_crc(__be32 *block)
8e85973e
SR
44{
45 int length;
46 u16 crc;
47
48 length = (be32_to_cpu(block[0]) >> 16) & 0xff;
49 crc = crc_itu_t(0, (u8 *)&block[1], length * 4);
50 *block |= cpu_to_be32(crc);
51
52 return length;
53}
54
6a5033be 55static DEFINE_MUTEX(card_mutex);
3038e353
KH
56static LIST_HEAD(card_list);
57
58static LIST_HEAD(descriptor_list);
59static int descriptor_count;
60
fe242579 61static __be32 tmp_config_rom[256];
e300839d
SR
62/* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
63static size_t config_rom_length = 1 + 4 + 1 + 1;
fe242579 64
a77754a7
KH
65#define BIB_CRC(v) ((v) << 0)
66#define BIB_CRC_LENGTH(v) ((v) << 16)
67#define BIB_INFO_LENGTH(v) ((v) << 24)
edd5bdaf 68#define BIB_BUS_NAME 0x31333934 /* "1394" */
a77754a7
KH
69#define BIB_LINK_SPEED(v) ((v) << 0)
70#define BIB_GENERATION(v) ((v) << 4)
71#define BIB_MAX_ROM(v) ((v) << 8)
72#define BIB_MAX_RECEIVE(v) ((v) << 12)
73#define BIB_CYC_CLK_ACC(v) ((v) << 16)
74#define BIB_PMC ((1) << 27)
75#define BIB_BMC ((1) << 28)
76#define BIB_ISC ((1) << 29)
77#define BIB_CMC ((1) << 30)
edd5bdaf
SR
78#define BIB_IRMC ((1) << 31)
79#define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */
3038e353 80
dd5eeb99
CL
81/*
82 * IEEE-1394 specifies a default SPLIT_TIMEOUT value of 800 cycles (100 ms),
83 * but we have to make it longer because there are many devices whose firmware
84 * is just too slow for that.
85 */
86#define DEFAULT_SPLIT_TIMEOUT (2 * 8000)
87
6044565a
SR
88#define CANON_OUI 0x000085
89
e300839d 90static void generate_config_rom(struct fw_card *card, __be32 *config_rom)
3038e353
KH
91{
92 struct fw_descriptor *desc;
8e85973e 93 int i, j, k, length;
3038e353 94
c781c06d
KH
95 /*
96 * Initialize contents of config rom buffer. On the OHCI
5e20c282
SR
97 * controller, block reads to the config rom accesses the host
98 * memory, but quadlet read access the hardware bus info block
99 * registers. That's just crack, but it means we should make
2cc489c2 100 * sure the contents of bus info block in host memory matches
c781c06d
KH
101 * the version stored in the OHCI registers.
102 */
3038e353 103
8e85973e
SR
104 config_rom[0] = cpu_to_be32(
105 BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0));
edd5bdaf 106 config_rom[1] = cpu_to_be32(BIB_BUS_NAME);
8e85973e 107 config_rom[2] = cpu_to_be32(
a77754a7
KH
108 BIB_LINK_SPEED(card->link_speed) |
109 BIB_GENERATION(card->config_rom_generation++ % 14 + 2) |
110 BIB_MAX_ROM(2) |
111 BIB_MAX_RECEIVE(card->max_receive) |
edd5bdaf 112 BIB_BMC | BIB_ISC | BIB_CMC | BIB_IRMC);
8e85973e
SR
113 config_rom[3] = cpu_to_be32(card->guid >> 32);
114 config_rom[4] = cpu_to_be32(card->guid);
3038e353
KH
115
116 /* Generate root directory. */
edd5bdaf 117 config_rom[6] = cpu_to_be32(NODE_CAPABILITIES);
8e85973e
SR
118 i = 7;
119 j = 7 + descriptor_count;
3038e353
KH
120
121 /* Generate root directory entries for descriptors. */
122 list_for_each_entry (desc, &descriptor_list, link) {
937f6879 123 if (desc->immediate > 0)
8e85973e
SR
124 config_rom[i++] = cpu_to_be32(desc->immediate);
125 config_rom[i] = cpu_to_be32(desc->key | (j - i));
3038e353
KH
126 i++;
127 j += desc->length;
128 }
129
130 /* Update root directory length. */
8e85973e 131 config_rom[5] = cpu_to_be32((i - 5 - 1) << 16);
3038e353
KH
132
133 /* End of root directory, now copy in descriptors. */
134 list_for_each_entry (desc, &descriptor_list, link) {
8e85973e
SR
135 for (k = 0; k < desc->length; k++)
136 config_rom[i + k] = cpu_to_be32(desc->data[k]);
3038e353
KH
137 i += desc->length;
138 }
139
140 /* Calculate CRCs for all blocks in the config rom. This
141 * assumes that CRC length and info length are identical for
142 * the bus info block, which is always the case for this
143 * implementation. */
e175569c 144 for (i = 0; i < j; i += length + 1)
cb7c96da 145 length = fw_compute_block_crc(config_rom + i);
3038e353 146
e300839d 147 WARN_ON(j != config_rom_length);
3038e353
KH
148}
149
53dca511 150static void update_config_roms(void)
3038e353
KH
151{
152 struct fw_card *card;
3038e353
KH
153
154 list_for_each_entry (card, &card_list, link) {
e300839d
SR
155 generate_config_rom(card, tmp_config_rom);
156 card->driver->set_config_rom(card, tmp_config_rom,
157 config_rom_length);
3038e353
KH
158 }
159}
160
e300839d
SR
161static size_t required_space(struct fw_descriptor *desc)
162{
163 /* descriptor + entry into root dir + optional immediate entry */
164 return desc->length + 1 + (desc->immediate > 0 ? 1 : 0);
165}
166
53dca511 167int fw_core_add_descriptor(struct fw_descriptor *desc)
3038e353
KH
168{
169 size_t i;
e300839d 170 int ret;
3038e353 171
c781c06d
KH
172 /*
173 * Check descriptor is valid; the length of all blocks in the
3038e353 174 * descriptor has to add up to exactly the length of the
c781c06d
KH
175 * block.
176 */
3038e353
KH
177 i = 0;
178 while (i < desc->length)
179 i += (desc->data[i] >> 16) + 1;
180
181 if (i != desc->length)
66dea3e5 182 return -EINVAL;
3038e353 183
6a5033be 184 mutex_lock(&card_mutex);
3038e353 185
e300839d
SR
186 if (config_rom_length + required_space(desc) > 256) {
187 ret = -EBUSY;
188 } else {
189 list_add_tail(&desc->link, &descriptor_list);
190 config_rom_length += required_space(desc);
937f6879 191 descriptor_count++;
e300839d
SR
192 if (desc->immediate > 0)
193 descriptor_count++;
194 update_config_roms();
195 ret = 0;
196 }
3038e353 197
6a5033be 198 mutex_unlock(&card_mutex);
3038e353 199
e300839d 200 return ret;
3038e353 201}
c76acec6 202EXPORT_SYMBOL(fw_core_add_descriptor);
3038e353 203
53dca511 204void fw_core_remove_descriptor(struct fw_descriptor *desc)
3038e353 205{
6a5033be 206 mutex_lock(&card_mutex);
3038e353
KH
207
208 list_del(&desc->link);
e300839d 209 config_rom_length -= required_space(desc);
3038e353 210 descriptor_count--;
937f6879
KH
211 if (desc->immediate > 0)
212 descriptor_count--;
3038e353
KH
213 update_config_roms();
214
6a5033be 215 mutex_unlock(&card_mutex);
3038e353 216}
c76acec6 217EXPORT_SYMBOL(fw_core_remove_descriptor);
3038e353 218
02d37bed
SR
219static int reset_bus(struct fw_card *card, bool short_reset)
220{
221 int reg = short_reset ? 5 : 1;
222 int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;
223
224 return card->driver->update_phy_reg(card, reg, 0, bit);
225}
226
227void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset)
228{
229 /* We don't try hard to sort out requests of long vs. short resets. */
230 card->br_short = short_reset;
231
232 /* Use an arbitrary short delay to combine multiple reset requests. */
233 fw_card_get(card);
105e53f8 234 if (!queue_delayed_work(fw_workqueue, &card->br_work,
6ea9e7bb 235 delayed ? DIV_ROUND_UP(HZ, 100) : 0))
02d37bed
SR
236 fw_card_put(card);
237}
238EXPORT_SYMBOL(fw_schedule_bus_reset);
239
240static void br_work(struct work_struct *work)
241{
242 struct fw_card *card = container_of(work, struct fw_card, br_work.work);
243
244 /* Delay for 2s after last reset per IEEE 1394 clause 8.2.1. */
245 if (card->reset_jiffies != 0 &&
e71084af 246 time_before64(get_jiffies_64(), card->reset_jiffies + 2 * HZ)) {
105e53f8 247 if (!queue_delayed_work(fw_workqueue, &card->br_work, 2 * HZ))
02d37bed
SR
248 fw_card_put(card);
249 return;
250 }
251
252 fw_send_phy_config(card, FW_PHY_CONFIG_NO_NODE_ID, card->generation,
253 FW_PHY_CONFIG_CURRENT_GAP_COUNT);
254 reset_bus(card, card->br_short);
255 fw_card_put(card);
256}
257
cbae787c 258static void allocate_broadcast_channel(struct fw_card *card, int generation)
6104ee92 259{
cbae787c
SR
260 int channel, bandwidth = 0;
261
e91b2787
CL
262 if (!card->broadcast_channel_allocated) {
263 fw_iso_resource_manage(card, generation, 1ULL << 31,
f30e6d3e 264 &channel, &bandwidth, true);
e91b2787 265 if (channel != 31) {
26b4950d 266 fw_notice(card, "failed to allocate broadcast channel\n");
e91b2787
CL
267 return;
268 }
7889b60e 269 card->broadcast_channel_allocated = true;
6104ee92 270 }
e91b2787
CL
271
272 device_for_each_child(card->device, (void *)(long)generation,
273 fw_device_set_broadcast_channel);
6104ee92 274}
6104ee92 275
83db801c
KH
276static const char gap_count_table[] = {
277 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
278};
279
53dca511 280void fw_schedule_bm_work(struct fw_card *card, unsigned long delay)
0fa1986f 281{
0fa1986f 282 fw_card_get(card);
02d37bed 283 if (!schedule_delayed_work(&card->bm_work, delay))
0fa1986f
JF
284 fw_card_put(card);
285}
286
02d37bed 287static void bm_work(struct work_struct *work)
19a15b93 288{
02d37bed 289 struct fw_card *card = container_of(work, struct fw_card, bm_work.work);
10389536 290 struct fw_device *root_device, *irm_device;
cbae787c 291 struct fw_node *root_node;
250b2b6d 292 int root_id, new_root_id, irm_id, bm_id, local_id;
cbae787c 293 int gap_count, generation, grace, rcode;
25b1c3d8 294 bool do_reset = false;
62305823
SR
295 bool root_device_is_running;
296 bool root_device_is_cmc;
10389536 297 bool irm_is_1394_1995_only;
6044565a 298 bool keep_this_irm;
f30e6d3e 299 __be32 transaction_data[2];
19a15b93 300
ae948011 301 spin_lock_irq(&card->lock);
15803478 302
cbae787c 303 if (card->local_node == NULL) {
ae948011 304 spin_unlock_irq(&card->lock);
0fa1986f 305 goto out_put_card;
15803478 306 }
19a15b93
KH
307
308 generation = card->generation;
10389536 309
cbae787c
SR
310 root_node = card->root_node;
311 fw_node_get(root_node);
15803478 312 root_device = root_node->data;
62305823
SR
313 root_device_is_running = root_device &&
314 atomic_read(&root_device->state) == FW_DEVICE_RUNNING;
315 root_device_is_cmc = root_device && root_device->cmc;
10389536
SR
316
317 irm_device = card->irm_node->data;
318 irm_is_1394_1995_only = irm_device && irm_device->config_rom &&
319 (irm_device->config_rom[2] & 0x000000f0) == 0;
320
6044565a
SR
321 /* Canon MV5i works unreliably if it is not root node. */
322 keep_this_irm = irm_device && irm_device->config_rom &&
323 irm_device->config_rom[3] >> 8 == CANON_OUI;
324
cbae787c
SR
325 root_id = root_node->node_id;
326 irm_id = card->irm_node->node_id;
327 local_id = card->local_node->node_id;
e1dc7cab 328
e71084af
CL
329 grace = time_after64(get_jiffies_64(),
330 card->reset_jiffies + DIV_ROUND_UP(HZ, 8));
e1dc7cab 331
7e0e314f
CL
332 if ((is_next_generation(generation, card->bm_generation) &&
333 !card->bm_abdicate) ||
931c4834 334 (card->bm_generation != generation && grace)) {
c781c06d
KH
335 /*
336 * This first step is to figure out who is IRM and
931c4834
KH
337 * then try to become bus manager. If the IRM is not
338 * well defined (e.g. does not have an active link
339 * layer or does not responds to our lock request, we
340 * will have to do a little vigilante bus management.
341 * In that case, we do a goto into the gap count logic
342 * so that when we do the reset, we still optimize the
343 * gap count. That could well save a reset in the
c781c06d
KH
344 * next generation.
345 */
931c4834 346
cbae787c
SR
347 if (!card->irm_node->link_on) {
348 new_root_id = local_id;
26b4950d 349 fw_notice(card, "%s, making local node (%02x) root\n",
10389536
SR
350 "IRM has link off", new_root_id);
351 goto pick_me;
352 }
353
6044565a 354 if (irm_is_1394_1995_only && !keep_this_irm) {
10389536 355 new_root_id = local_id;
26b4950d 356 fw_notice(card, "%s, making local node (%02x) root\n",
10389536 357 "IRM is not 1394a compliant", new_root_id);
931c4834
KH
358 goto pick_me;
359 }
360
f30e6d3e
SR
361 transaction_data[0] = cpu_to_be32(0x3f);
362 transaction_data[1] = cpu_to_be32(local_id);
931c4834 363
ae948011 364 spin_unlock_irq(&card->lock);
931c4834 365
1e119fa9
JF
366 rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
367 irm_id, generation, SCODE_100,
368 CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID,
f30e6d3e 369 transaction_data, 8);
931c4834 370
1e119fa9
JF
371 if (rcode == RCODE_GENERATION)
372 /* Another bus reset, BM work has been rescheduled. */
15803478 373 goto out;
931c4834 374
f30e6d3e 375 bm_id = be32_to_cpu(transaction_data[0]);
cbae787c 376
250b2b6d
SR
377 spin_lock_irq(&card->lock);
378 if (rcode == RCODE_COMPLETE && generation == card->generation)
379 card->bm_node_id =
380 bm_id == 0x3f ? local_id : 0xffc0 | bm_id;
381 spin_unlock_irq(&card->lock);
cbae787c 382
250b2b6d 383 if (rcode == RCODE_COMPLETE && bm_id != 0x3f) {
cbae787c
SR
384 /* Somebody else is BM. Only act as IRM. */
385 if (local_id == irm_id)
386 allocate_broadcast_channel(card, generation);
387
15803478 388 goto out;
6104ee92 389 }
931c4834 390
bda3b8a1
CL
391 if (rcode == RCODE_SEND_ERROR) {
392 /*
393 * We have been unable to send the lock request due to
394 * some local problem. Let's try again later and hope
395 * that the problem has gone away by then.
396 */
397 fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
398 goto out;
399 }
400
ae948011 401 spin_lock_irq(&card->lock);
1e119fa9 402
6044565a 403 if (rcode != RCODE_COMPLETE && !keep_this_irm) {
c781c06d
KH
404 /*
405 * The lock request failed, maybe the IRM
931c4834
KH
406 * isn't really IRM capable after all. Let's
407 * do a bus reset and pick the local node as
c781c06d
KH
408 * root, and thus, IRM.
409 */
cbae787c 410 new_root_id = local_id;
3b00b008
CL
411 fw_notice(card, "BM lock failed (%s), making local node (%02x) root\n",
412 fw_rcode_string(rcode), new_root_id);
931c4834
KH
413 goto pick_me;
414 }
415 } else if (card->bm_generation != generation) {
c781c06d 416 /*
e1dc7cab
SR
417 * We weren't BM in the last generation, and the last
418 * bus reset is less than 125ms ago. Reschedule this job.
c781c06d 419 */
ae948011 420 spin_unlock_irq(&card->lock);
e1dc7cab 421 fw_schedule_bm_work(card, DIV_ROUND_UP(HZ, 8));
15803478 422 goto out;
931c4834
KH
423 }
424
c781c06d
KH
425 /*
426 * We're bus manager for this generation, so next step is to
931c4834 427 * make sure we have an active cycle master and do gap count
c781c06d
KH
428 * optimization.
429 */
931c4834 430 card->bm_generation = generation;
19a15b93 431
15803478 432 if (root_device == NULL) {
c781c06d
KH
433 /*
434 * Either link_on is false, or we failed to read the
435 * config rom. In either case, pick another root.
436 */
cbae787c 437 new_root_id = local_id;
62305823 438 } else if (!root_device_is_running) {
c781c06d
KH
439 /*
440 * If we haven't probed this device yet, bail out now
441 * and let's try again once that's done.
442 */
ae948011 443 spin_unlock_irq(&card->lock);
15803478 444 goto out;
62305823 445 } else if (root_device_is_cmc) {
c781c06d 446 /*
c374ab42
CL
447 * We will send out a force root packet for this
448 * node as part of the gap count optimization.
c781c06d 449 */
931c4834 450 new_root_id = root_id;
83db801c 451 } else {
c781c06d
KH
452 /*
453 * Current root has an active link layer and we
19a15b93 454 * successfully read the config rom, but it's not
c781c06d
KH
455 * cycle master capable.
456 */
cbae787c 457 new_root_id = local_id;
83db801c
KH
458 }
459
931c4834 460 pick_me:
24d40125
SR
461 /*
462 * Pick a gap count from 1394a table E-1. The table doesn't cover
463 * the typically much larger 1394b beta repeater delays though.
464 */
465 if (!card->beta_repeaters_present &&
15803478
SR
466 root_node->max_hops < ARRAY_SIZE(gap_count_table))
467 gap_count = gap_count_table[root_node->max_hops];
83db801c
KH
468 else
469 gap_count = 63;
470
c781c06d 471 /*
25b1c3d8
SR
472 * Finally, figure out if we should do a reset or not. If we have
473 * done less than 5 resets with the same physical topology and we
c781c06d
KH
474 * have either a new root or a new gap count setting, let's do it.
475 */
19a15b93 476
931c4834
KH
477 if (card->bm_retries++ < 5 &&
478 (card->gap_count != gap_count || new_root_id != root_id))
25b1c3d8 479 do_reset = true;
19a15b93 480
ae948011 481 spin_unlock_irq(&card->lock);
19a15b93 482
83db801c 483 if (do_reset) {
26b4950d
SR
484 fw_notice(card, "phy config: new root=%x, gap_count=%d\n",
485 new_root_id, gap_count);
931c4834 486 fw_send_phy_config(card, new_root_id, generation, gap_count);
02d37bed 487 reset_bus(card, true);
cbae787c 488 /* Will allocate broadcast channel after the reset. */
c374ab42 489 goto out;
19a15b93 490 }
6104ee92 491
c374ab42
CL
492 if (root_device_is_cmc) {
493 /*
494 * Make sure that the cycle master sends cycle start packets.
495 */
f30e6d3e 496 transaction_data[0] = cpu_to_be32(CSR_STATE_BIT_CMSTR);
c374ab42
CL
497 rcode = fw_run_transaction(card, TCODE_WRITE_QUADLET_REQUEST,
498 root_id, generation, SCODE_100,
499 CSR_REGISTER_BASE + CSR_STATE_SET,
f30e6d3e 500 transaction_data, 4);
c374ab42
CL
501 if (rcode == RCODE_GENERATION)
502 goto out;
19a15b93 503 }
6104ee92 504
c374ab42
CL
505 if (local_id == irm_id)
506 allocate_broadcast_channel(card, generation);
507
15803478 508 out:
15803478 509 fw_node_put(root_node);
0fa1986f
JF
510 out_put_card:
511 fw_card_put(card);
19a15b93
KH
512}
513
53dca511
SR
514void fw_card_initialize(struct fw_card *card,
515 const struct fw_card_driver *driver,
516 struct device *device)
3038e353 517{
bbf19db3 518 static atomic_t index = ATOMIC_INIT(-1);
3038e353 519
bbf19db3 520 card->index = atomic_inc_return(&index);
5e20c282 521 card->driver = driver;
3038e353 522 card->device = device;
5e20c282
SR
523 card->current_tlabel = 0;
524 card->tlabel_mask = 0;
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525 card->split_timeout_hi = DEFAULT_SPLIT_TIMEOUT / 8000;
526 card->split_timeout_lo = (DEFAULT_SPLIT_TIMEOUT % 8000) << 19;
527 card->split_timeout_cycles = DEFAULT_SPLIT_TIMEOUT;
528 card->split_timeout_jiffies =
529 DIV_ROUND_UP(DEFAULT_SPLIT_TIMEOUT * HZ, 8000);
3038e353 530 card->color = 0;
e534fe16 531 card->broadcast_channel = BROADCAST_CHANNEL_INITIAL;
3038e353 532
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SR
533 kref_init(&card->kref);
534 init_completion(&card->done);
5e20c282 535 INIT_LIST_HEAD(&card->transaction_list);
bf54e146 536 INIT_LIST_HEAD(&card->phy_receiver_list);
3038e353 537 spin_lock_init(&card->lock);
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538
539 card->local_node = NULL;
540
02d37bed
SR
541 INIT_DELAYED_WORK(&card->br_work, br_work);
542 INIT_DELAYED_WORK(&card->bm_work, bm_work);
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543}
544EXPORT_SYMBOL(fw_card_initialize);
545
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546int fw_card_add(struct fw_card *card,
547 u32 max_receive, u32 link_speed, u64 guid)
3038e353 548{
e1eff7a3 549 int ret;
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550
551 card->max_receive = max_receive;
552 card->link_speed = link_speed;
553 card->guid = guid;
554
6a5033be 555 mutex_lock(&card_mutex);
3038e353 556
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SR
557 generate_config_rom(card, tmp_config_rom);
558 ret = card->driver->enable(card, tmp_config_rom, config_rom_length);
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SR
559 if (ret == 0)
560 list_add_tail(&card->link, &card_list);
561
562 mutex_unlock(&card_mutex);
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SR
563
564 return ret;
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565}
566EXPORT_SYMBOL(fw_card_add);
567
c781c06d 568/*
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SR
569 * The next few functions implement a dummy driver that is used once a card
570 * driver shuts down an fw_card. This allows the driver to cleanly unload,
571 * as all IO to the card will be handled (and failed) by the dummy driver
572 * instead of calling into the module. Only functions for iso context
573 * shutdown still need to be provided by the card driver.
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SR
574 *
575 * .read/write_csr() should never be called anymore after the dummy driver
576 * was bound since they are only used within request handler context.
577 * .set_config_rom() is never called since the card is taken out of card_list
578 * before switching to the dummy driver.
c781c06d 579 */
3038e353 580
02d37bed 581static int dummy_read_phy_reg(struct fw_card *card, int address)
3038e353 582{
02d37bed 583 return -ENODEV;
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KH
584}
585
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586static int dummy_update_phy_reg(struct fw_card *card, int address,
587 int clear_bits, int set_bits)
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588{
589 return -ENODEV;
590}
591
53dca511 592static void dummy_send_request(struct fw_card *card, struct fw_packet *packet)
3038e353 593{
18d0cdfd 594 packet->callback(packet, card, RCODE_CANCELLED);
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595}
596
53dca511 597static void dummy_send_response(struct fw_card *card, struct fw_packet *packet)
3038e353 598{
18d0cdfd 599 packet->callback(packet, card, RCODE_CANCELLED);
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600}
601
53dca511 602static int dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet)
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603{
604 return -ENOENT;
605}
606
53dca511
SR
607static int dummy_enable_phys_dma(struct fw_card *card,
608 int node_id, int generation)
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609{
610 return -ENODEV;
611}
612
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SR
613static struct fw_iso_context *dummy_allocate_iso_context(struct fw_card *card,
614 int type, int channel, size_t header_size)
615{
616 return ERR_PTR(-ENODEV);
617}
618
619static int dummy_start_iso(struct fw_iso_context *ctx,
620 s32 cycle, u32 sync, u32 tags)
621{
622 return -ENODEV;
623}
624
625static int dummy_set_iso_channels(struct fw_iso_context *ctx, u64 *channels)
626{
627 return -ENODEV;
628}
629
630static int dummy_queue_iso(struct fw_iso_context *ctx, struct fw_iso_packet *p,
631 struct fw_iso_buffer *buffer, unsigned long payload)
632{
633 return -ENODEV;
634}
635
13882a82
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636static void dummy_flush_queue_iso(struct fw_iso_context *ctx)
637{
638}
639
d1bbd209
CL
640static int dummy_flush_iso_completions(struct fw_iso_context *ctx)
641{
642 return -ENODEV;
643}
644
d645f4da 645static const struct fw_card_driver dummy_driver_template = {
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SR
646 .read_phy_reg = dummy_read_phy_reg,
647 .update_phy_reg = dummy_update_phy_reg,
648 .send_request = dummy_send_request,
649 .send_response = dummy_send_response,
650 .cancel_packet = dummy_cancel_packet,
651 .enable_phys_dma = dummy_enable_phys_dma,
652 .allocate_iso_context = dummy_allocate_iso_context,
653 .start_iso = dummy_start_iso,
654 .set_iso_channels = dummy_set_iso_channels,
655 .queue_iso = dummy_queue_iso,
13882a82 656 .flush_queue_iso = dummy_flush_queue_iso,
d1bbd209 657 .flush_iso_completions = dummy_flush_iso_completions,
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658};
659
53dca511 660void fw_card_release(struct kref *kref)
459f7923
SR
661{
662 struct fw_card *card = container_of(kref, struct fw_card, kref);
663
664 complete(&card->done);
665}
fc5f80b1 666EXPORT_SYMBOL_GPL(fw_card_release);
459f7923 667
53dca511 668void fw_core_remove_card(struct fw_card *card)
3038e353 669{
d645f4da
SR
670 struct fw_card_driver dummy_driver = dummy_driver_template;
671
ecab4133
MB
672 card->driver->update_phy_reg(card, 4,
673 PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
02d37bed 674 fw_schedule_bus_reset(card, false, true);
3038e353 675
6a5033be 676 mutex_lock(&card_mutex);
e747a5c0 677 list_del_init(&card->link);
6a5033be 678 mutex_unlock(&card_mutex);
3038e353 679
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SR
680 /* Switch off most of the card driver interface. */
681 dummy_driver.free_iso_context = card->driver->free_iso_context;
682 dummy_driver.stop_iso = card->driver->stop_iso;
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683 card->driver = &dummy_driver;
684
3038e353 685 fw_destroy_nodes(card);
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SR
686
687 /* Wait for all users, especially device workqueue jobs, to finish. */
688 fw_card_put(card);
689 wait_for_completion(&card->done);
8a2d9ed3 690
1e8afea1 691 WARN_ON(!list_empty(&card->transaction_list));
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692}
693EXPORT_SYMBOL(fw_core_remove_card);