]>
Commit | Line | Data |
---|---|---|
8cb7cf56 SH |
1 | /* |
2 | * System Control and Power Interface (SCPI) Message Protocol driver | |
3 | * | |
4 | * SCPI Message Protocol is used between the System Control Processor(SCP) | |
5 | * and the Application Processors(AP). The Message Handling Unit(MHU) | |
6 | * provides a mechanism for inter-processor communication between SCP's | |
7 | * Cortex M3 and AP. | |
8 | * | |
9 | * SCP offers control and management of the core/cluster power states, | |
10 | * various power domain DVFS including the core/cluster, certain system | |
11 | * clocks configuration, thermal sensors and many others. | |
12 | * | |
13 | * Copyright (C) 2015 ARM Ltd. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify it | |
16 | * under the terms and conditions of the GNU General Public License, | |
17 | * version 2, as published by the Free Software Foundation. | |
18 | * | |
19 | * This program is distributed in the hope it will be useful, but WITHOUT | |
20 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
21 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
22 | * more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
26 | */ | |
27 | ||
28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
29 | ||
30 | #include <linux/bitmap.h> | |
31 | #include <linux/device.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/export.h> | |
34 | #include <linux/io.h> | |
35 | #include <linux/kernel.h> | |
36 | #include <linux/list.h> | |
37 | #include <linux/mailbox_client.h> | |
38 | #include <linux/module.h> | |
39 | #include <linux/of_address.h> | |
40 | #include <linux/of_platform.h> | |
41 | #include <linux/printk.h> | |
42 | #include <linux/scpi_protocol.h> | |
43 | #include <linux/slab.h> | |
44 | #include <linux/sort.h> | |
45 | #include <linux/spinlock.h> | |
46 | ||
47 | #define CMD_ID_SHIFT 0 | |
48 | #define CMD_ID_MASK 0x7f | |
49 | #define CMD_TOKEN_ID_SHIFT 8 | |
50 | #define CMD_TOKEN_ID_MASK 0xff | |
51 | #define CMD_DATA_SIZE_SHIFT 16 | |
52 | #define CMD_DATA_SIZE_MASK 0x1ff | |
53 | #define PACK_SCPI_CMD(cmd_id, tx_sz) \ | |
54 | ((((cmd_id) & CMD_ID_MASK) << CMD_ID_SHIFT) | \ | |
55 | (((tx_sz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT)) | |
56 | #define ADD_SCPI_TOKEN(cmd, token) \ | |
57 | ((cmd) |= (((token) & CMD_TOKEN_ID_MASK) << CMD_TOKEN_ID_SHIFT)) | |
58 | ||
59 | #define CMD_SIZE(cmd) (((cmd) >> CMD_DATA_SIZE_SHIFT) & CMD_DATA_SIZE_MASK) | |
60 | #define CMD_UNIQ_MASK (CMD_TOKEN_ID_MASK << CMD_TOKEN_ID_SHIFT | CMD_ID_MASK) | |
61 | #define CMD_XTRACT_UNIQ(cmd) ((cmd) & CMD_UNIQ_MASK) | |
62 | ||
63 | #define SCPI_SLOT 0 | |
64 | ||
65 | #define MAX_DVFS_DOMAINS 8 | |
66 | #define MAX_DVFS_OPPS 8 | |
67 | #define DVFS_LATENCY(hdr) (le32_to_cpu(hdr) >> 16) | |
68 | #define DVFS_OPP_COUNT(hdr) ((le32_to_cpu(hdr) >> 8) & 0xff) | |
69 | ||
70 | #define PROTOCOL_REV_MINOR_BITS 16 | |
71 | #define PROTOCOL_REV_MINOR_MASK ((1U << PROTOCOL_REV_MINOR_BITS) - 1) | |
72 | #define PROTOCOL_REV_MAJOR(x) ((x) >> PROTOCOL_REV_MINOR_BITS) | |
73 | #define PROTOCOL_REV_MINOR(x) ((x) & PROTOCOL_REV_MINOR_MASK) | |
74 | ||
75 | #define FW_REV_MAJOR_BITS 24 | |
76 | #define FW_REV_MINOR_BITS 16 | |
77 | #define FW_REV_PATCH_MASK ((1U << FW_REV_MINOR_BITS) - 1) | |
78 | #define FW_REV_MINOR_MASK ((1U << FW_REV_MAJOR_BITS) - 1) | |
79 | #define FW_REV_MAJOR(x) ((x) >> FW_REV_MAJOR_BITS) | |
80 | #define FW_REV_MINOR(x) (((x) & FW_REV_MINOR_MASK) >> FW_REV_MINOR_BITS) | |
81 | #define FW_REV_PATCH(x) ((x) & FW_REV_PATCH_MASK) | |
82 | ||
3bdd8843 | 83 | #define MAX_RX_TIMEOUT (msecs_to_jiffies(30)) |
8cb7cf56 SH |
84 | |
85 | enum scpi_error_codes { | |
86 | SCPI_SUCCESS = 0, /* Success */ | |
87 | SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */ | |
88 | SCPI_ERR_ALIGN = 2, /* Invalid alignment */ | |
89 | SCPI_ERR_SIZE = 3, /* Invalid size */ | |
90 | SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */ | |
91 | SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */ | |
92 | SCPI_ERR_RANGE = 6, /* Value out of range */ | |
93 | SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */ | |
94 | SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */ | |
95 | SCPI_ERR_PWRSTATE = 9, /* Invalid power state */ | |
96 | SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */ | |
97 | SCPI_ERR_DEVICE = 11, /* Device error */ | |
98 | SCPI_ERR_BUSY = 12, /* Device busy */ | |
99 | SCPI_ERR_MAX | |
100 | }; | |
101 | ||
761d0efe | 102 | /* SCPI Standard commands */ |
8cb7cf56 SH |
103 | enum scpi_std_cmd { |
104 | SCPI_CMD_INVALID = 0x00, | |
105 | SCPI_CMD_SCPI_READY = 0x01, | |
106 | SCPI_CMD_SCPI_CAPABILITIES = 0x02, | |
107 | SCPI_CMD_SET_CSS_PWR_STATE = 0x03, | |
108 | SCPI_CMD_GET_CSS_PWR_STATE = 0x04, | |
109 | SCPI_CMD_SET_SYS_PWR_STATE = 0x05, | |
110 | SCPI_CMD_SET_CPU_TIMER = 0x06, | |
111 | SCPI_CMD_CANCEL_CPU_TIMER = 0x07, | |
112 | SCPI_CMD_DVFS_CAPABILITIES = 0x08, | |
113 | SCPI_CMD_GET_DVFS_INFO = 0x09, | |
114 | SCPI_CMD_SET_DVFS = 0x0a, | |
115 | SCPI_CMD_GET_DVFS = 0x0b, | |
116 | SCPI_CMD_GET_DVFS_STAT = 0x0c, | |
117 | SCPI_CMD_CLOCK_CAPABILITIES = 0x0d, | |
118 | SCPI_CMD_GET_CLOCK_INFO = 0x0e, | |
119 | SCPI_CMD_SET_CLOCK_VALUE = 0x0f, | |
120 | SCPI_CMD_GET_CLOCK_VALUE = 0x10, | |
121 | SCPI_CMD_PSU_CAPABILITIES = 0x11, | |
122 | SCPI_CMD_GET_PSU_INFO = 0x12, | |
123 | SCPI_CMD_SET_PSU = 0x13, | |
124 | SCPI_CMD_GET_PSU = 0x14, | |
125 | SCPI_CMD_SENSOR_CAPABILITIES = 0x15, | |
126 | SCPI_CMD_SENSOR_INFO = 0x16, | |
127 | SCPI_CMD_SENSOR_VALUE = 0x17, | |
128 | SCPI_CMD_SENSOR_CFG_PERIODIC = 0x18, | |
129 | SCPI_CMD_SENSOR_CFG_BOUNDS = 0x19, | |
130 | SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1a, | |
131 | SCPI_CMD_SET_DEVICE_PWR_STATE = 0x1b, | |
132 | SCPI_CMD_GET_DEVICE_PWR_STATE = 0x1c, | |
133 | SCPI_CMD_COUNT | |
134 | }; | |
135 | ||
761d0efe SH |
136 | /* List of all commands used by this driver, used as indices */ |
137 | enum scpi_drv_cmds { | |
138 | CMD_SCPI_CAPABILITIES = 0, | |
139 | CMD_GET_CLOCK_INFO, | |
140 | CMD_GET_CLOCK_VALUE, | |
141 | CMD_SET_CLOCK_VALUE, | |
142 | CMD_GET_DVFS, | |
143 | CMD_SET_DVFS, | |
144 | CMD_GET_DVFS_INFO, | |
145 | CMD_SENSOR_CAPABILITIES, | |
146 | CMD_SENSOR_INFO, | |
147 | CMD_SENSOR_VALUE, | |
148 | CMD_SET_DEVICE_PWR_STATE, | |
149 | CMD_GET_DEVICE_PWR_STATE, | |
150 | CMD_MAX_COUNT, | |
151 | }; | |
152 | ||
153 | static int scpi_std_commands[CMD_MAX_COUNT] = { | |
154 | SCPI_CMD_SCPI_CAPABILITIES, | |
155 | SCPI_CMD_GET_CLOCK_INFO, | |
156 | SCPI_CMD_GET_CLOCK_VALUE, | |
157 | SCPI_CMD_SET_CLOCK_VALUE, | |
158 | SCPI_CMD_GET_DVFS, | |
159 | SCPI_CMD_SET_DVFS, | |
160 | SCPI_CMD_GET_DVFS_INFO, | |
161 | SCPI_CMD_SENSOR_CAPABILITIES, | |
162 | SCPI_CMD_SENSOR_INFO, | |
163 | SCPI_CMD_SENSOR_VALUE, | |
164 | SCPI_CMD_SET_DEVICE_PWR_STATE, | |
165 | SCPI_CMD_GET_DEVICE_PWR_STATE, | |
166 | }; | |
167 | ||
8cb7cf56 SH |
168 | struct scpi_xfer { |
169 | u32 slot; /* has to be first element */ | |
170 | u32 cmd; | |
171 | u32 status; | |
172 | const void *tx_buf; | |
173 | void *rx_buf; | |
174 | unsigned int tx_len; | |
175 | unsigned int rx_len; | |
176 | struct list_head node; | |
177 | struct completion done; | |
178 | }; | |
179 | ||
180 | struct scpi_chan { | |
181 | struct mbox_client cl; | |
182 | struct mbox_chan *chan; | |
183 | void __iomem *tx_payload; | |
184 | void __iomem *rx_payload; | |
185 | struct list_head rx_pending; | |
186 | struct list_head xfers_list; | |
187 | struct scpi_xfer *xfers; | |
188 | spinlock_t rx_lock; /* locking for the rx pending list */ | |
189 | struct mutex xfers_lock; | |
190 | u8 token; | |
191 | }; | |
192 | ||
193 | struct scpi_drvinfo { | |
194 | u32 protocol_version; | |
195 | u32 firmware_version; | |
196 | int num_chans; | |
761d0efe | 197 | int *commands; |
8cb7cf56 SH |
198 | atomic_t next_chan; |
199 | struct scpi_ops *scpi_ops; | |
200 | struct scpi_chan *channels; | |
201 | struct scpi_dvfs_info *dvfs[MAX_DVFS_DOMAINS]; | |
202 | }; | |
203 | ||
204 | /* | |
205 | * The SCP firmware only executes in little-endian mode, so any buffers | |
206 | * shared through SCPI should have their contents converted to little-endian | |
207 | */ | |
208 | struct scpi_shared_mem { | |
209 | __le32 command; | |
210 | __le32 status; | |
211 | u8 payload[0]; | |
212 | } __packed; | |
213 | ||
214 | struct scp_capabilities { | |
215 | __le32 protocol_version; | |
216 | __le32 event_version; | |
217 | __le32 platform_version; | |
218 | __le32 commands[4]; | |
219 | } __packed; | |
220 | ||
221 | struct clk_get_info { | |
222 | __le16 id; | |
223 | __le16 flags; | |
224 | __le32 min_rate; | |
225 | __le32 max_rate; | |
226 | u8 name[20]; | |
227 | } __packed; | |
228 | ||
229 | struct clk_get_value { | |
230 | __le32 rate; | |
231 | } __packed; | |
232 | ||
233 | struct clk_set_value { | |
234 | __le16 id; | |
235 | __le16 reserved; | |
236 | __le32 rate; | |
237 | } __packed; | |
238 | ||
239 | struct dvfs_info { | |
240 | __le32 header; | |
241 | struct { | |
242 | __le32 freq; | |
243 | __le32 m_volt; | |
244 | } opps[MAX_DVFS_OPPS]; | |
245 | } __packed; | |
246 | ||
8cb7cf56 SH |
247 | struct dvfs_set { |
248 | u8 domain; | |
249 | u8 index; | |
250 | } __packed; | |
251 | ||
38a1bdc9 PA |
252 | struct sensor_capabilities { |
253 | __le16 sensors; | |
254 | } __packed; | |
255 | ||
256 | struct _scpi_sensor_info { | |
257 | __le16 sensor_id; | |
258 | u8 class; | |
259 | u8 trigger_type; | |
260 | char name[20]; | |
261 | }; | |
262 | ||
263 | struct sensor_value { | |
2e874159 SH |
264 | __le32 lo_val; |
265 | __le32 hi_val; | |
38a1bdc9 PA |
266 | } __packed; |
267 | ||
37a441dc SH |
268 | struct dev_pstate_set { |
269 | u16 dev_id; | |
270 | u8 pstate; | |
271 | } __packed; | |
272 | ||
8cb7cf56 SH |
273 | static struct scpi_drvinfo *scpi_info; |
274 | ||
275 | static int scpi_linux_errmap[SCPI_ERR_MAX] = { | |
276 | /* better than switch case as long as return value is continuous */ | |
277 | 0, /* SCPI_SUCCESS */ | |
278 | -EINVAL, /* SCPI_ERR_PARAM */ | |
279 | -ENOEXEC, /* SCPI_ERR_ALIGN */ | |
280 | -EMSGSIZE, /* SCPI_ERR_SIZE */ | |
281 | -EINVAL, /* SCPI_ERR_HANDLER */ | |
282 | -EACCES, /* SCPI_ERR_ACCESS */ | |
283 | -ERANGE, /* SCPI_ERR_RANGE */ | |
284 | -ETIMEDOUT, /* SCPI_ERR_TIMEOUT */ | |
285 | -ENOMEM, /* SCPI_ERR_NOMEM */ | |
286 | -EINVAL, /* SCPI_ERR_PWRSTATE */ | |
287 | -EOPNOTSUPP, /* SCPI_ERR_SUPPORT */ | |
288 | -EIO, /* SCPI_ERR_DEVICE */ | |
289 | -EBUSY, /* SCPI_ERR_BUSY */ | |
290 | }; | |
291 | ||
292 | static inline int scpi_to_linux_errno(int errno) | |
293 | { | |
294 | if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX) | |
295 | return scpi_linux_errmap[errno]; | |
296 | return -EIO; | |
297 | } | |
298 | ||
299 | static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd) | |
300 | { | |
301 | unsigned long flags; | |
302 | struct scpi_xfer *t, *match = NULL; | |
303 | ||
304 | spin_lock_irqsave(&ch->rx_lock, flags); | |
305 | if (list_empty(&ch->rx_pending)) { | |
306 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
307 | return; | |
308 | } | |
309 | ||
310 | list_for_each_entry(t, &ch->rx_pending, node) | |
311 | if (CMD_XTRACT_UNIQ(t->cmd) == CMD_XTRACT_UNIQ(cmd)) { | |
312 | list_del(&t->node); | |
313 | match = t; | |
314 | break; | |
315 | } | |
316 | /* check if wait_for_completion is in progress or timed-out */ | |
317 | if (match && !completion_done(&match->done)) { | |
318 | struct scpi_shared_mem *mem = ch->rx_payload; | |
319 | unsigned int len = min(match->rx_len, CMD_SIZE(cmd)); | |
320 | ||
321 | match->status = le32_to_cpu(mem->status); | |
322 | memcpy_fromio(match->rx_buf, mem->payload, len); | |
323 | if (match->rx_len > len) | |
324 | memset(match->rx_buf + len, 0, match->rx_len - len); | |
325 | complete(&match->done); | |
326 | } | |
327 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
328 | } | |
329 | ||
330 | static void scpi_handle_remote_msg(struct mbox_client *c, void *msg) | |
331 | { | |
332 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
333 | struct scpi_shared_mem *mem = ch->rx_payload; | |
334 | u32 cmd = le32_to_cpu(mem->command); | |
335 | ||
336 | scpi_process_cmd(ch, cmd); | |
337 | } | |
338 | ||
339 | static void scpi_tx_prepare(struct mbox_client *c, void *msg) | |
340 | { | |
341 | unsigned long flags; | |
342 | struct scpi_xfer *t = msg; | |
343 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
344 | struct scpi_shared_mem *mem = (struct scpi_shared_mem *)ch->tx_payload; | |
345 | ||
346 | if (t->tx_buf) | |
347 | memcpy_toio(mem->payload, t->tx_buf, t->tx_len); | |
348 | if (t->rx_buf) { | |
349 | if (!(++ch->token)) | |
350 | ++ch->token; | |
351 | ADD_SCPI_TOKEN(t->cmd, ch->token); | |
352 | spin_lock_irqsave(&ch->rx_lock, flags); | |
353 | list_add_tail(&t->node, &ch->rx_pending); | |
354 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
355 | } | |
356 | mem->command = cpu_to_le32(t->cmd); | |
357 | } | |
358 | ||
359 | static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch) | |
360 | { | |
361 | struct scpi_xfer *t; | |
362 | ||
363 | mutex_lock(&ch->xfers_lock); | |
364 | if (list_empty(&ch->xfers_list)) { | |
365 | mutex_unlock(&ch->xfers_lock); | |
366 | return NULL; | |
367 | } | |
368 | t = list_first_entry(&ch->xfers_list, struct scpi_xfer, node); | |
369 | list_del(&t->node); | |
370 | mutex_unlock(&ch->xfers_lock); | |
371 | return t; | |
372 | } | |
373 | ||
374 | static void put_scpi_xfer(struct scpi_xfer *t, struct scpi_chan *ch) | |
375 | { | |
376 | mutex_lock(&ch->xfers_lock); | |
377 | list_add_tail(&t->node, &ch->xfers_list); | |
378 | mutex_unlock(&ch->xfers_lock); | |
379 | } | |
380 | ||
761d0efe | 381 | static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len, |
8cb7cf56 SH |
382 | void *rx_buf, unsigned int rx_len) |
383 | { | |
384 | int ret; | |
385 | u8 chan; | |
761d0efe | 386 | u8 cmd; |
8cb7cf56 SH |
387 | struct scpi_xfer *msg; |
388 | struct scpi_chan *scpi_chan; | |
389 | ||
761d0efe SH |
390 | if (scpi_info->commands[idx] < 0) |
391 | return -EOPNOTSUPP; | |
392 | ||
393 | cmd = scpi_info->commands[idx]; | |
394 | ||
8cb7cf56 SH |
395 | chan = atomic_inc_return(&scpi_info->next_chan) % scpi_info->num_chans; |
396 | scpi_chan = scpi_info->channels + chan; | |
397 | ||
398 | msg = get_scpi_xfer(scpi_chan); | |
399 | if (!msg) | |
400 | return -ENOMEM; | |
401 | ||
402 | msg->slot = BIT(SCPI_SLOT); | |
403 | msg->cmd = PACK_SCPI_CMD(cmd, tx_len); | |
404 | msg->tx_buf = tx_buf; | |
405 | msg->tx_len = tx_len; | |
406 | msg->rx_buf = rx_buf; | |
407 | msg->rx_len = rx_len; | |
408 | init_completion(&msg->done); | |
409 | ||
410 | ret = mbox_send_message(scpi_chan->chan, msg); | |
411 | if (ret < 0 || !rx_buf) | |
412 | goto out; | |
413 | ||
414 | if (!wait_for_completion_timeout(&msg->done, MAX_RX_TIMEOUT)) | |
415 | ret = -ETIMEDOUT; | |
416 | else | |
417 | /* first status word */ | |
dd9a1d69 | 418 | ret = msg->status; |
8cb7cf56 SH |
419 | out: |
420 | if (ret < 0 && rx_buf) /* remove entry from the list if timed-out */ | |
421 | scpi_process_cmd(scpi_chan, msg->cmd); | |
422 | ||
423 | put_scpi_xfer(msg, scpi_chan); | |
424 | /* SCPI error codes > 0, translate them to Linux scale*/ | |
425 | return ret > 0 ? scpi_to_linux_errno(ret) : ret; | |
426 | } | |
427 | ||
428 | static u32 scpi_get_version(void) | |
429 | { | |
430 | return scpi_info->protocol_version; | |
431 | } | |
432 | ||
433 | static int | |
434 | scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max) | |
435 | { | |
436 | int ret; | |
437 | struct clk_get_info clk; | |
438 | __le16 le_clk_id = cpu_to_le16(clk_id); | |
439 | ||
761d0efe | 440 | ret = scpi_send_message(CMD_GET_CLOCK_INFO, &le_clk_id, |
8cb7cf56 SH |
441 | sizeof(le_clk_id), &clk, sizeof(clk)); |
442 | if (!ret) { | |
443 | *min = le32_to_cpu(clk.min_rate); | |
444 | *max = le32_to_cpu(clk.max_rate); | |
445 | } | |
446 | return ret; | |
447 | } | |
448 | ||
449 | static unsigned long scpi_clk_get_val(u16 clk_id) | |
450 | { | |
451 | int ret; | |
452 | struct clk_get_value clk; | |
453 | __le16 le_clk_id = cpu_to_le16(clk_id); | |
454 | ||
761d0efe | 455 | ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id, |
8cb7cf56 | 456 | sizeof(le_clk_id), &clk, sizeof(clk)); |
761d0efe | 457 | |
8cb7cf56 SH |
458 | return ret ? ret : le32_to_cpu(clk.rate); |
459 | } | |
460 | ||
461 | static int scpi_clk_set_val(u16 clk_id, unsigned long rate) | |
462 | { | |
463 | int stat; | |
464 | struct clk_set_value clk = { | |
465 | .id = cpu_to_le16(clk_id), | |
466 | .rate = cpu_to_le32(rate) | |
467 | }; | |
468 | ||
761d0efe | 469 | return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk), |
8cb7cf56 SH |
470 | &stat, sizeof(stat)); |
471 | } | |
472 | ||
473 | static int scpi_dvfs_get_idx(u8 domain) | |
474 | { | |
475 | int ret; | |
f9d91de0 | 476 | u8 dvfs_idx; |
8cb7cf56 | 477 | |
761d0efe | 478 | ret = scpi_send_message(CMD_GET_DVFS, &domain, sizeof(domain), |
f9d91de0 | 479 | &dvfs_idx, sizeof(dvfs_idx)); |
761d0efe | 480 | |
f9d91de0 | 481 | return ret ? ret : dvfs_idx; |
8cb7cf56 SH |
482 | } |
483 | ||
484 | static int scpi_dvfs_set_idx(u8 domain, u8 index) | |
485 | { | |
486 | int stat; | |
487 | struct dvfs_set dvfs = {domain, index}; | |
488 | ||
761d0efe | 489 | return scpi_send_message(CMD_SET_DVFS, &dvfs, sizeof(dvfs), |
8cb7cf56 SH |
490 | &stat, sizeof(stat)); |
491 | } | |
492 | ||
493 | static int opp_cmp_func(const void *opp1, const void *opp2) | |
494 | { | |
495 | const struct scpi_opp *t1 = opp1, *t2 = opp2; | |
496 | ||
497 | return t1->freq - t2->freq; | |
498 | } | |
499 | ||
500 | static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain) | |
501 | { | |
502 | struct scpi_dvfs_info *info; | |
503 | struct scpi_opp *opp; | |
504 | struct dvfs_info buf; | |
505 | int ret, i; | |
506 | ||
507 | if (domain >= MAX_DVFS_DOMAINS) | |
508 | return ERR_PTR(-EINVAL); | |
509 | ||
510 | if (scpi_info->dvfs[domain]) /* data already populated */ | |
511 | return scpi_info->dvfs[domain]; | |
512 | ||
761d0efe | 513 | ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain), |
8cb7cf56 | 514 | &buf, sizeof(buf)); |
8cb7cf56 SH |
515 | if (ret) |
516 | return ERR_PTR(ret); | |
517 | ||
518 | info = kmalloc(sizeof(*info), GFP_KERNEL); | |
519 | if (!info) | |
520 | return ERR_PTR(-ENOMEM); | |
521 | ||
522 | info->count = DVFS_OPP_COUNT(buf.header); | |
523 | info->latency = DVFS_LATENCY(buf.header) * 1000; /* uS to nS */ | |
524 | ||
525 | info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL); | |
526 | if (!info->opps) { | |
527 | kfree(info); | |
528 | return ERR_PTR(-ENOMEM); | |
529 | } | |
530 | ||
531 | for (i = 0, opp = info->opps; i < info->count; i++, opp++) { | |
532 | opp->freq = le32_to_cpu(buf.opps[i].freq); | |
533 | opp->m_volt = le32_to_cpu(buf.opps[i].m_volt); | |
534 | } | |
535 | ||
536 | sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL); | |
537 | ||
538 | scpi_info->dvfs[domain] = info; | |
539 | return info; | |
540 | } | |
541 | ||
38a1bdc9 PA |
542 | static int scpi_sensor_get_capability(u16 *sensors) |
543 | { | |
544 | struct sensor_capabilities cap_buf; | |
545 | int ret; | |
546 | ||
761d0efe | 547 | ret = scpi_send_message(CMD_SENSOR_CAPABILITIES, NULL, 0, &cap_buf, |
38a1bdc9 PA |
548 | sizeof(cap_buf)); |
549 | if (!ret) | |
550 | *sensors = le16_to_cpu(cap_buf.sensors); | |
551 | ||
552 | return ret; | |
553 | } | |
554 | ||
555 | static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info) | |
556 | { | |
557 | __le16 id = cpu_to_le16(sensor_id); | |
558 | struct _scpi_sensor_info _info; | |
559 | int ret; | |
560 | ||
761d0efe | 561 | ret = scpi_send_message(CMD_SENSOR_INFO, &id, sizeof(id), |
38a1bdc9 PA |
562 | &_info, sizeof(_info)); |
563 | if (!ret) { | |
564 | memcpy(info, &_info, sizeof(*info)); | |
565 | info->sensor_id = le16_to_cpu(_info.sensor_id); | |
566 | } | |
567 | ||
568 | return ret; | |
569 | } | |
570 | ||
3678b98f | 571 | static int scpi_sensor_get_value(u16 sensor, u64 *val) |
38a1bdc9 | 572 | { |
dd9a1d69 | 573 | __le16 id = cpu_to_le16(sensor); |
38a1bdc9 PA |
574 | struct sensor_value buf; |
575 | int ret; | |
576 | ||
761d0efe | 577 | ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id), |
38a1bdc9 PA |
578 | &buf, sizeof(buf)); |
579 | if (!ret) | |
2e874159 SH |
580 | *val = (u64)le32_to_cpu(buf.hi_val) << 32 | |
581 | le32_to_cpu(buf.lo_val); | |
38a1bdc9 PA |
582 | |
583 | return ret; | |
584 | } | |
585 | ||
37a441dc SH |
586 | static int scpi_device_get_power_state(u16 dev_id) |
587 | { | |
588 | int ret; | |
589 | u8 pstate; | |
590 | __le16 id = cpu_to_le16(dev_id); | |
591 | ||
761d0efe | 592 | ret = scpi_send_message(CMD_GET_DEVICE_PWR_STATE, &id, |
37a441dc SH |
593 | sizeof(id), &pstate, sizeof(pstate)); |
594 | return ret ? ret : pstate; | |
595 | } | |
596 | ||
597 | static int scpi_device_set_power_state(u16 dev_id, u8 pstate) | |
598 | { | |
599 | int stat; | |
600 | struct dev_pstate_set dev_set = { | |
601 | .dev_id = cpu_to_le16(dev_id), | |
602 | .pstate = pstate, | |
603 | }; | |
604 | ||
761d0efe | 605 | return scpi_send_message(CMD_SET_DEVICE_PWR_STATE, &dev_set, |
37a441dc SH |
606 | sizeof(dev_set), &stat, sizeof(stat)); |
607 | } | |
608 | ||
8cb7cf56 SH |
609 | static struct scpi_ops scpi_ops = { |
610 | .get_version = scpi_get_version, | |
611 | .clk_get_range = scpi_clk_get_range, | |
612 | .clk_get_val = scpi_clk_get_val, | |
613 | .clk_set_val = scpi_clk_set_val, | |
614 | .dvfs_get_idx = scpi_dvfs_get_idx, | |
615 | .dvfs_set_idx = scpi_dvfs_set_idx, | |
616 | .dvfs_get_info = scpi_dvfs_get_info, | |
38a1bdc9 PA |
617 | .sensor_get_capability = scpi_sensor_get_capability, |
618 | .sensor_get_info = scpi_sensor_get_info, | |
619 | .sensor_get_value = scpi_sensor_get_value, | |
37a441dc SH |
620 | .device_get_power_state = scpi_device_get_power_state, |
621 | .device_set_power_state = scpi_device_set_power_state, | |
8cb7cf56 SH |
622 | }; |
623 | ||
624 | struct scpi_ops *get_scpi_ops(void) | |
625 | { | |
626 | return scpi_info ? scpi_info->scpi_ops : NULL; | |
627 | } | |
628 | EXPORT_SYMBOL_GPL(get_scpi_ops); | |
629 | ||
630 | static int scpi_init_versions(struct scpi_drvinfo *info) | |
631 | { | |
632 | int ret; | |
633 | struct scp_capabilities caps; | |
634 | ||
761d0efe | 635 | ret = scpi_send_message(CMD_SCPI_CAPABILITIES, NULL, 0, |
8cb7cf56 SH |
636 | &caps, sizeof(caps)); |
637 | if (!ret) { | |
638 | info->protocol_version = le32_to_cpu(caps.protocol_version); | |
639 | info->firmware_version = le32_to_cpu(caps.platform_version); | |
640 | } | |
641 | return ret; | |
642 | } | |
643 | ||
644 | static ssize_t protocol_version_show(struct device *dev, | |
645 | struct device_attribute *attr, char *buf) | |
646 | { | |
647 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); | |
648 | ||
649 | return sprintf(buf, "%d.%d\n", | |
650 | PROTOCOL_REV_MAJOR(scpi_info->protocol_version), | |
651 | PROTOCOL_REV_MINOR(scpi_info->protocol_version)); | |
652 | } | |
653 | static DEVICE_ATTR_RO(protocol_version); | |
654 | ||
655 | static ssize_t firmware_version_show(struct device *dev, | |
656 | struct device_attribute *attr, char *buf) | |
657 | { | |
658 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); | |
659 | ||
660 | return sprintf(buf, "%d.%d.%d\n", | |
661 | FW_REV_MAJOR(scpi_info->firmware_version), | |
662 | FW_REV_MINOR(scpi_info->firmware_version), | |
663 | FW_REV_PATCH(scpi_info->firmware_version)); | |
664 | } | |
665 | static DEVICE_ATTR_RO(firmware_version); | |
666 | ||
667 | static struct attribute *versions_attrs[] = { | |
668 | &dev_attr_firmware_version.attr, | |
669 | &dev_attr_protocol_version.attr, | |
670 | NULL, | |
671 | }; | |
672 | ATTRIBUTE_GROUPS(versions); | |
673 | ||
674 | static void | |
675 | scpi_free_channels(struct device *dev, struct scpi_chan *pchan, int count) | |
676 | { | |
677 | int i; | |
678 | ||
679 | for (i = 0; i < count && pchan->chan; i++, pchan++) { | |
680 | mbox_free_channel(pchan->chan); | |
681 | devm_kfree(dev, pchan->xfers); | |
682 | devm_iounmap(dev, pchan->rx_payload); | |
683 | } | |
684 | } | |
685 | ||
686 | static int scpi_remove(struct platform_device *pdev) | |
687 | { | |
688 | int i; | |
689 | struct device *dev = &pdev->dev; | |
690 | struct scpi_drvinfo *info = platform_get_drvdata(pdev); | |
691 | ||
692 | scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */ | |
693 | ||
694 | of_platform_depopulate(dev); | |
695 | sysfs_remove_groups(&dev->kobj, versions_groups); | |
696 | scpi_free_channels(dev, info->channels, info->num_chans); | |
697 | platform_set_drvdata(pdev, NULL); | |
698 | ||
699 | for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) { | |
700 | kfree(info->dvfs[i]->opps); | |
701 | kfree(info->dvfs[i]); | |
702 | } | |
703 | devm_kfree(dev, info->channels); | |
704 | devm_kfree(dev, info); | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
709 | #define MAX_SCPI_XFERS 10 | |
710 | static int scpi_alloc_xfer_list(struct device *dev, struct scpi_chan *ch) | |
711 | { | |
712 | int i; | |
713 | struct scpi_xfer *xfers; | |
714 | ||
715 | xfers = devm_kzalloc(dev, MAX_SCPI_XFERS * sizeof(*xfers), GFP_KERNEL); | |
716 | if (!xfers) | |
717 | return -ENOMEM; | |
718 | ||
719 | ch->xfers = xfers; | |
720 | for (i = 0; i < MAX_SCPI_XFERS; i++, xfers++) | |
721 | list_add_tail(&xfers->node, &ch->xfers_list); | |
722 | return 0; | |
723 | } | |
724 | ||
725 | static int scpi_probe(struct platform_device *pdev) | |
726 | { | |
727 | int count, idx, ret; | |
728 | struct resource res; | |
729 | struct scpi_chan *scpi_chan; | |
730 | struct device *dev = &pdev->dev; | |
731 | struct device_node *np = dev->of_node; | |
732 | ||
733 | scpi_info = devm_kzalloc(dev, sizeof(*scpi_info), GFP_KERNEL); | |
734 | if (!scpi_info) | |
735 | return -ENOMEM; | |
736 | ||
737 | count = of_count_phandle_with_args(np, "mboxes", "#mbox-cells"); | |
738 | if (count < 0) { | |
739 | dev_err(dev, "no mboxes property in '%s'\n", np->full_name); | |
740 | return -ENODEV; | |
741 | } | |
742 | ||
743 | scpi_chan = devm_kcalloc(dev, count, sizeof(*scpi_chan), GFP_KERNEL); | |
744 | if (!scpi_chan) | |
745 | return -ENOMEM; | |
746 | ||
747 | for (idx = 0; idx < count; idx++) { | |
748 | resource_size_t size; | |
749 | struct scpi_chan *pchan = scpi_chan + idx; | |
750 | struct mbox_client *cl = &pchan->cl; | |
751 | struct device_node *shmem = of_parse_phandle(np, "shmem", idx); | |
752 | ||
b079bd55 PC |
753 | ret = of_address_to_resource(shmem, 0, &res); |
754 | of_node_put(shmem); | |
755 | if (ret) { | |
8cb7cf56 | 756 | dev_err(dev, "failed to get SCPI payload mem resource\n"); |
8cb7cf56 SH |
757 | goto err; |
758 | } | |
759 | ||
760 | size = resource_size(&res); | |
761 | pchan->rx_payload = devm_ioremap(dev, res.start, size); | |
762 | if (!pchan->rx_payload) { | |
763 | dev_err(dev, "failed to ioremap SCPI payload\n"); | |
764 | ret = -EADDRNOTAVAIL; | |
765 | goto err; | |
766 | } | |
767 | pchan->tx_payload = pchan->rx_payload + (size >> 1); | |
768 | ||
769 | cl->dev = dev; | |
770 | cl->rx_callback = scpi_handle_remote_msg; | |
771 | cl->tx_prepare = scpi_tx_prepare; | |
772 | cl->tx_block = true; | |
3bdd8843 | 773 | cl->tx_tout = 20; |
8cb7cf56 SH |
774 | cl->knows_txdone = false; /* controller can't ack */ |
775 | ||
776 | INIT_LIST_HEAD(&pchan->rx_pending); | |
777 | INIT_LIST_HEAD(&pchan->xfers_list); | |
778 | spin_lock_init(&pchan->rx_lock); | |
779 | mutex_init(&pchan->xfers_lock); | |
780 | ||
781 | ret = scpi_alloc_xfer_list(dev, pchan); | |
782 | if (!ret) { | |
783 | pchan->chan = mbox_request_channel(cl, idx); | |
784 | if (!IS_ERR(pchan->chan)) | |
785 | continue; | |
786 | ret = PTR_ERR(pchan->chan); | |
787 | if (ret != -EPROBE_DEFER) | |
788 | dev_err(dev, "failed to get channel%d err %d\n", | |
789 | idx, ret); | |
790 | } | |
791 | err: | |
792 | scpi_free_channels(dev, scpi_chan, idx); | |
793 | scpi_info = NULL; | |
794 | return ret; | |
795 | } | |
796 | ||
797 | scpi_info->channels = scpi_chan; | |
798 | scpi_info->num_chans = count; | |
761d0efe SH |
799 | scpi_info->commands = scpi_std_commands; |
800 | ||
8cb7cf56 SH |
801 | platform_set_drvdata(pdev, scpi_info); |
802 | ||
803 | ret = scpi_init_versions(scpi_info); | |
804 | if (ret) { | |
805 | dev_err(dev, "incorrect or no SCP firmware found\n"); | |
806 | scpi_remove(pdev); | |
807 | return ret; | |
808 | } | |
809 | ||
810 | _dev_info(dev, "SCP Protocol %d.%d Firmware %d.%d.%d version\n", | |
811 | PROTOCOL_REV_MAJOR(scpi_info->protocol_version), | |
812 | PROTOCOL_REV_MINOR(scpi_info->protocol_version), | |
813 | FW_REV_MAJOR(scpi_info->firmware_version), | |
814 | FW_REV_MINOR(scpi_info->firmware_version), | |
815 | FW_REV_PATCH(scpi_info->firmware_version)); | |
816 | scpi_info->scpi_ops = &scpi_ops; | |
817 | ||
818 | ret = sysfs_create_groups(&dev->kobj, versions_groups); | |
819 | if (ret) | |
820 | dev_err(dev, "unable to create sysfs version group\n"); | |
821 | ||
822 | return of_platform_populate(dev->of_node, NULL, NULL, dev); | |
823 | } | |
824 | ||
825 | static const struct of_device_id scpi_of_match[] = { | |
826 | {.compatible = "arm,scpi"}, | |
827 | {}, | |
828 | }; | |
829 | ||
830 | MODULE_DEVICE_TABLE(of, scpi_of_match); | |
831 | ||
832 | static struct platform_driver scpi_driver = { | |
833 | .driver = { | |
834 | .name = "scpi_protocol", | |
835 | .of_match_table = scpi_of_match, | |
836 | }, | |
837 | .probe = scpi_probe, | |
838 | .remove = scpi_remove, | |
839 | }; | |
840 | module_platform_driver(scpi_driver); | |
841 | ||
842 | MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>"); | |
843 | MODULE_DESCRIPTION("ARM SCPI mailbox protocol driver"); | |
844 | MODULE_LICENSE("GPL v2"); |