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9952f691 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
8cb7cf56 SH |
2 | /* |
3 | * System Control and Power Interface (SCPI) Message Protocol driver | |
4 | * | |
5 | * SCPI Message Protocol is used between the System Control Processor(SCP) | |
6 | * and the Application Processors(AP). The Message Handling Unit(MHU) | |
7 | * provides a mechanism for inter-processor communication between SCP's | |
8 | * Cortex M3 and AP. | |
9 | * | |
10 | * SCP offers control and management of the core/cluster power states, | |
11 | * various power domain DVFS including the core/cluster, certain system | |
12 | * clocks configuration, thermal sensors and many others. | |
13 | * | |
14 | * Copyright (C) 2015 ARM Ltd. | |
8cb7cf56 SH |
15 | */ |
16 | ||
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
18 | ||
19 | #include <linux/bitmap.h> | |
7cd49a26 | 20 | #include <linux/bitfield.h> |
8cb7cf56 SH |
21 | #include <linux/device.h> |
22 | #include <linux/err.h> | |
23 | #include <linux/export.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/mailbox_client.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/of_address.h> | |
30 | #include <linux/of_platform.h> | |
31 | #include <linux/printk.h> | |
45ca7df7 | 32 | #include <linux/pm_opp.h> |
8cb7cf56 SH |
33 | #include <linux/scpi_protocol.h> |
34 | #include <linux/slab.h> | |
35 | #include <linux/sort.h> | |
36 | #include <linux/spinlock.h> | |
37 | ||
96fe77b6 HK |
38 | #define CMD_ID_MASK GENMASK(6, 0) |
39 | #define CMD_TOKEN_ID_MASK GENMASK(15, 8) | |
40 | #define CMD_DATA_SIZE_MASK GENMASK(24, 16) | |
41 | #define CMD_LEGACY_DATA_SIZE_MASK GENMASK(28, 20) | |
42 | #define PACK_SCPI_CMD(cmd_id, tx_sz) \ | |
43 | (FIELD_PREP(CMD_ID_MASK, cmd_id) | \ | |
44 | FIELD_PREP(CMD_DATA_SIZE_MASK, tx_sz)) | |
45 | #define PACK_LEGACY_SCPI_CMD(cmd_id, tx_sz) \ | |
46 | (FIELD_PREP(CMD_ID_MASK, cmd_id) | \ | |
47 | FIELD_PREP(CMD_LEGACY_DATA_SIZE_MASK, tx_sz)) | |
48 | ||
49 | #define CMD_SIZE(cmd) FIELD_GET(CMD_DATA_SIZE_MASK, cmd) | |
50 | #define CMD_UNIQ_MASK (CMD_TOKEN_ID_MASK | CMD_ID_MASK) | |
8cb7cf56 SH |
51 | #define CMD_XTRACT_UNIQ(cmd) ((cmd) & CMD_UNIQ_MASK) |
52 | ||
53 | #define SCPI_SLOT 0 | |
54 | ||
55 | #define MAX_DVFS_DOMAINS 8 | |
bb789cd1 | 56 | #define MAX_DVFS_OPPS 16 |
81faa556 | 57 | |
7cd49a26 HK |
58 | #define PROTO_REV_MAJOR_MASK GENMASK(31, 16) |
59 | #define PROTO_REV_MINOR_MASK GENMASK(15, 0) | |
81faa556 | 60 | |
7cd49a26 HK |
61 | #define FW_REV_MAJOR_MASK GENMASK(31, 24) |
62 | #define FW_REV_MINOR_MASK GENMASK(23, 16) | |
63 | #define FW_REV_PATCH_MASK GENMASK(15, 0) | |
8cb7cf56 | 64 | |
3bdd8843 | 65 | #define MAX_RX_TIMEOUT (msecs_to_jiffies(30)) |
8cb7cf56 SH |
66 | |
67 | enum scpi_error_codes { | |
68 | SCPI_SUCCESS = 0, /* Success */ | |
69 | SCPI_ERR_PARAM = 1, /* Invalid parameter(s) */ | |
70 | SCPI_ERR_ALIGN = 2, /* Invalid alignment */ | |
71 | SCPI_ERR_SIZE = 3, /* Invalid size */ | |
72 | SCPI_ERR_HANDLER = 4, /* Invalid handler/callback */ | |
73 | SCPI_ERR_ACCESS = 5, /* Invalid access/permission denied */ | |
74 | SCPI_ERR_RANGE = 6, /* Value out of range */ | |
75 | SCPI_ERR_TIMEOUT = 7, /* Timeout has occurred */ | |
76 | SCPI_ERR_NOMEM = 8, /* Invalid memory area or pointer */ | |
77 | SCPI_ERR_PWRSTATE = 9, /* Invalid power state */ | |
78 | SCPI_ERR_SUPPORT = 10, /* Not supported or disabled */ | |
79 | SCPI_ERR_DEVICE = 11, /* Device error */ | |
80 | SCPI_ERR_BUSY = 12, /* Device busy */ | |
81 | SCPI_ERR_MAX | |
82 | }; | |
83 | ||
761d0efe | 84 | /* SCPI Standard commands */ |
8cb7cf56 SH |
85 | enum scpi_std_cmd { |
86 | SCPI_CMD_INVALID = 0x00, | |
87 | SCPI_CMD_SCPI_READY = 0x01, | |
88 | SCPI_CMD_SCPI_CAPABILITIES = 0x02, | |
89 | SCPI_CMD_SET_CSS_PWR_STATE = 0x03, | |
90 | SCPI_CMD_GET_CSS_PWR_STATE = 0x04, | |
91 | SCPI_CMD_SET_SYS_PWR_STATE = 0x05, | |
92 | SCPI_CMD_SET_CPU_TIMER = 0x06, | |
93 | SCPI_CMD_CANCEL_CPU_TIMER = 0x07, | |
94 | SCPI_CMD_DVFS_CAPABILITIES = 0x08, | |
95 | SCPI_CMD_GET_DVFS_INFO = 0x09, | |
96 | SCPI_CMD_SET_DVFS = 0x0a, | |
97 | SCPI_CMD_GET_DVFS = 0x0b, | |
98 | SCPI_CMD_GET_DVFS_STAT = 0x0c, | |
99 | SCPI_CMD_CLOCK_CAPABILITIES = 0x0d, | |
100 | SCPI_CMD_GET_CLOCK_INFO = 0x0e, | |
101 | SCPI_CMD_SET_CLOCK_VALUE = 0x0f, | |
102 | SCPI_CMD_GET_CLOCK_VALUE = 0x10, | |
103 | SCPI_CMD_PSU_CAPABILITIES = 0x11, | |
104 | SCPI_CMD_GET_PSU_INFO = 0x12, | |
105 | SCPI_CMD_SET_PSU = 0x13, | |
106 | SCPI_CMD_GET_PSU = 0x14, | |
107 | SCPI_CMD_SENSOR_CAPABILITIES = 0x15, | |
108 | SCPI_CMD_SENSOR_INFO = 0x16, | |
109 | SCPI_CMD_SENSOR_VALUE = 0x17, | |
110 | SCPI_CMD_SENSOR_CFG_PERIODIC = 0x18, | |
111 | SCPI_CMD_SENSOR_CFG_BOUNDS = 0x19, | |
112 | SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1a, | |
113 | SCPI_CMD_SET_DEVICE_PWR_STATE = 0x1b, | |
114 | SCPI_CMD_GET_DEVICE_PWR_STATE = 0x1c, | |
115 | SCPI_CMD_COUNT | |
116 | }; | |
117 | ||
4dfe32d5 NA |
118 | /* SCPI Legacy Commands */ |
119 | enum legacy_scpi_std_cmd { | |
120 | LEGACY_SCPI_CMD_INVALID = 0x00, | |
121 | LEGACY_SCPI_CMD_SCPI_READY = 0x01, | |
122 | LEGACY_SCPI_CMD_SCPI_CAPABILITIES = 0x02, | |
123 | LEGACY_SCPI_CMD_EVENT = 0x03, | |
124 | LEGACY_SCPI_CMD_SET_CSS_PWR_STATE = 0x04, | |
125 | LEGACY_SCPI_CMD_GET_CSS_PWR_STATE = 0x05, | |
126 | LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT = 0x06, | |
127 | LEGACY_SCPI_CMD_GET_PWR_STATE_STAT = 0x07, | |
128 | LEGACY_SCPI_CMD_SYS_PWR_STATE = 0x08, | |
129 | LEGACY_SCPI_CMD_L2_READY = 0x09, | |
130 | LEGACY_SCPI_CMD_SET_AP_TIMER = 0x0a, | |
131 | LEGACY_SCPI_CMD_CANCEL_AP_TIME = 0x0b, | |
132 | LEGACY_SCPI_CMD_DVFS_CAPABILITIES = 0x0c, | |
133 | LEGACY_SCPI_CMD_GET_DVFS_INFO = 0x0d, | |
134 | LEGACY_SCPI_CMD_SET_DVFS = 0x0e, | |
135 | LEGACY_SCPI_CMD_GET_DVFS = 0x0f, | |
136 | LEGACY_SCPI_CMD_GET_DVFS_STAT = 0x10, | |
137 | LEGACY_SCPI_CMD_SET_RTC = 0x11, | |
138 | LEGACY_SCPI_CMD_GET_RTC = 0x12, | |
139 | LEGACY_SCPI_CMD_CLOCK_CAPABILITIES = 0x13, | |
140 | LEGACY_SCPI_CMD_SET_CLOCK_INDEX = 0x14, | |
141 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE = 0x15, | |
142 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE = 0x16, | |
143 | LEGACY_SCPI_CMD_PSU_CAPABILITIES = 0x17, | |
144 | LEGACY_SCPI_CMD_SET_PSU = 0x18, | |
145 | LEGACY_SCPI_CMD_GET_PSU = 0x19, | |
146 | LEGACY_SCPI_CMD_SENSOR_CAPABILITIES = 0x1a, | |
147 | LEGACY_SCPI_CMD_SENSOR_INFO = 0x1b, | |
148 | LEGACY_SCPI_CMD_SENSOR_VALUE = 0x1c, | |
149 | LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC = 0x1d, | |
150 | LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS = 0x1e, | |
151 | LEGACY_SCPI_CMD_SENSOR_ASYNC_VALUE = 0x1f, | |
152 | LEGACY_SCPI_CMD_COUNT | |
153 | }; | |
154 | ||
155 | /* List all commands that are required to go through the high priority link */ | |
156 | static int legacy_hpriority_cmds[] = { | |
157 | LEGACY_SCPI_CMD_GET_CSS_PWR_STATE, | |
158 | LEGACY_SCPI_CMD_CFG_PWR_STATE_STAT, | |
159 | LEGACY_SCPI_CMD_GET_PWR_STATE_STAT, | |
160 | LEGACY_SCPI_CMD_SET_DVFS, | |
161 | LEGACY_SCPI_CMD_GET_DVFS, | |
162 | LEGACY_SCPI_CMD_SET_RTC, | |
163 | LEGACY_SCPI_CMD_GET_RTC, | |
164 | LEGACY_SCPI_CMD_SET_CLOCK_INDEX, | |
165 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE, | |
166 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE, | |
167 | LEGACY_SCPI_CMD_SET_PSU, | |
168 | LEGACY_SCPI_CMD_GET_PSU, | |
169 | LEGACY_SCPI_CMD_SENSOR_CFG_PERIODIC, | |
170 | LEGACY_SCPI_CMD_SENSOR_CFG_BOUNDS, | |
171 | }; | |
172 | ||
173 | /* List all commands used by this driver, used as indexes */ | |
761d0efe SH |
174 | enum scpi_drv_cmds { |
175 | CMD_SCPI_CAPABILITIES = 0, | |
176 | CMD_GET_CLOCK_INFO, | |
177 | CMD_GET_CLOCK_VALUE, | |
178 | CMD_SET_CLOCK_VALUE, | |
179 | CMD_GET_DVFS, | |
180 | CMD_SET_DVFS, | |
181 | CMD_GET_DVFS_INFO, | |
182 | CMD_SENSOR_CAPABILITIES, | |
183 | CMD_SENSOR_INFO, | |
184 | CMD_SENSOR_VALUE, | |
185 | CMD_SET_DEVICE_PWR_STATE, | |
186 | CMD_GET_DEVICE_PWR_STATE, | |
187 | CMD_MAX_COUNT, | |
188 | }; | |
189 | ||
190 | static int scpi_std_commands[CMD_MAX_COUNT] = { | |
191 | SCPI_CMD_SCPI_CAPABILITIES, | |
192 | SCPI_CMD_GET_CLOCK_INFO, | |
193 | SCPI_CMD_GET_CLOCK_VALUE, | |
194 | SCPI_CMD_SET_CLOCK_VALUE, | |
195 | SCPI_CMD_GET_DVFS, | |
196 | SCPI_CMD_SET_DVFS, | |
197 | SCPI_CMD_GET_DVFS_INFO, | |
198 | SCPI_CMD_SENSOR_CAPABILITIES, | |
199 | SCPI_CMD_SENSOR_INFO, | |
200 | SCPI_CMD_SENSOR_VALUE, | |
201 | SCPI_CMD_SET_DEVICE_PWR_STATE, | |
202 | SCPI_CMD_GET_DEVICE_PWR_STATE, | |
203 | }; | |
204 | ||
4dfe32d5 NA |
205 | static int scpi_legacy_commands[CMD_MAX_COUNT] = { |
206 | LEGACY_SCPI_CMD_SCPI_CAPABILITIES, | |
207 | -1, /* GET_CLOCK_INFO */ | |
208 | LEGACY_SCPI_CMD_GET_CLOCK_VALUE, | |
209 | LEGACY_SCPI_CMD_SET_CLOCK_VALUE, | |
210 | LEGACY_SCPI_CMD_GET_DVFS, | |
211 | LEGACY_SCPI_CMD_SET_DVFS, | |
212 | LEGACY_SCPI_CMD_GET_DVFS_INFO, | |
213 | LEGACY_SCPI_CMD_SENSOR_CAPABILITIES, | |
214 | LEGACY_SCPI_CMD_SENSOR_INFO, | |
215 | LEGACY_SCPI_CMD_SENSOR_VALUE, | |
216 | -1, /* SET_DEVICE_PWR_STATE */ | |
217 | -1, /* GET_DEVICE_PWR_STATE */ | |
218 | }; | |
219 | ||
8cb7cf56 SH |
220 | struct scpi_xfer { |
221 | u32 slot; /* has to be first element */ | |
222 | u32 cmd; | |
223 | u32 status; | |
224 | const void *tx_buf; | |
225 | void *rx_buf; | |
226 | unsigned int tx_len; | |
227 | unsigned int rx_len; | |
228 | struct list_head node; | |
229 | struct completion done; | |
230 | }; | |
231 | ||
232 | struct scpi_chan { | |
233 | struct mbox_client cl; | |
234 | struct mbox_chan *chan; | |
235 | void __iomem *tx_payload; | |
236 | void __iomem *rx_payload; | |
237 | struct list_head rx_pending; | |
238 | struct list_head xfers_list; | |
239 | struct scpi_xfer *xfers; | |
240 | spinlock_t rx_lock; /* locking for the rx pending list */ | |
241 | struct mutex xfers_lock; | |
242 | u8 token; | |
243 | }; | |
244 | ||
245 | struct scpi_drvinfo { | |
246 | u32 protocol_version; | |
247 | u32 firmware_version; | |
4dfe32d5 | 248 | bool is_legacy; |
8cb7cf56 | 249 | int num_chans; |
761d0efe | 250 | int *commands; |
4dfe32d5 | 251 | DECLARE_BITMAP(cmd_priority, LEGACY_SCPI_CMD_COUNT); |
8cb7cf56 SH |
252 | atomic_t next_chan; |
253 | struct scpi_ops *scpi_ops; | |
254 | struct scpi_chan *channels; | |
255 | struct scpi_dvfs_info *dvfs[MAX_DVFS_DOMAINS]; | |
256 | }; | |
257 | ||
258 | /* | |
259 | * The SCP firmware only executes in little-endian mode, so any buffers | |
260 | * shared through SCPI should have their contents converted to little-endian | |
261 | */ | |
262 | struct scpi_shared_mem { | |
263 | __le32 command; | |
264 | __le32 status; | |
265 | u8 payload[0]; | |
266 | } __packed; | |
267 | ||
4dfe32d5 NA |
268 | struct legacy_scpi_shared_mem { |
269 | __le32 status; | |
270 | u8 payload[0]; | |
271 | } __packed; | |
272 | ||
8cb7cf56 SH |
273 | struct scp_capabilities { |
274 | __le32 protocol_version; | |
275 | __le32 event_version; | |
276 | __le32 platform_version; | |
277 | __le32 commands[4]; | |
278 | } __packed; | |
279 | ||
280 | struct clk_get_info { | |
281 | __le16 id; | |
282 | __le16 flags; | |
283 | __le32 min_rate; | |
284 | __le32 max_rate; | |
285 | u8 name[20]; | |
286 | } __packed; | |
287 | ||
8cb7cf56 SH |
288 | struct clk_set_value { |
289 | __le16 id; | |
290 | __le16 reserved; | |
291 | __le32 rate; | |
292 | } __packed; | |
293 | ||
4dfe32d5 NA |
294 | struct legacy_clk_set_value { |
295 | __le32 rate; | |
296 | __le16 id; | |
297 | __le16 reserved; | |
298 | } __packed; | |
299 | ||
8cb7cf56 | 300 | struct dvfs_info { |
a963d7c5 HK |
301 | u8 domain; |
302 | u8 opp_count; | |
303 | __le16 latency; | |
8cb7cf56 SH |
304 | struct { |
305 | __le32 freq; | |
306 | __le32 m_volt; | |
307 | } opps[MAX_DVFS_OPPS]; | |
308 | } __packed; | |
309 | ||
8cb7cf56 SH |
310 | struct dvfs_set { |
311 | u8 domain; | |
312 | u8 index; | |
313 | } __packed; | |
314 | ||
38a1bdc9 PA |
315 | struct _scpi_sensor_info { |
316 | __le16 sensor_id; | |
317 | u8 class; | |
318 | u8 trigger_type; | |
319 | char name[20]; | |
320 | }; | |
321 | ||
37a441dc | 322 | struct dev_pstate_set { |
0d301768 | 323 | __le16 dev_id; |
37a441dc SH |
324 | u8 pstate; |
325 | } __packed; | |
326 | ||
8cb7cf56 SH |
327 | static struct scpi_drvinfo *scpi_info; |
328 | ||
329 | static int scpi_linux_errmap[SCPI_ERR_MAX] = { | |
330 | /* better than switch case as long as return value is continuous */ | |
331 | 0, /* SCPI_SUCCESS */ | |
332 | -EINVAL, /* SCPI_ERR_PARAM */ | |
333 | -ENOEXEC, /* SCPI_ERR_ALIGN */ | |
334 | -EMSGSIZE, /* SCPI_ERR_SIZE */ | |
335 | -EINVAL, /* SCPI_ERR_HANDLER */ | |
336 | -EACCES, /* SCPI_ERR_ACCESS */ | |
337 | -ERANGE, /* SCPI_ERR_RANGE */ | |
338 | -ETIMEDOUT, /* SCPI_ERR_TIMEOUT */ | |
339 | -ENOMEM, /* SCPI_ERR_NOMEM */ | |
340 | -EINVAL, /* SCPI_ERR_PWRSTATE */ | |
341 | -EOPNOTSUPP, /* SCPI_ERR_SUPPORT */ | |
342 | -EIO, /* SCPI_ERR_DEVICE */ | |
343 | -EBUSY, /* SCPI_ERR_BUSY */ | |
344 | }; | |
345 | ||
346 | static inline int scpi_to_linux_errno(int errno) | |
347 | { | |
348 | if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX) | |
349 | return scpi_linux_errmap[errno]; | |
350 | return -EIO; | |
351 | } | |
352 | ||
353 | static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd) | |
354 | { | |
355 | unsigned long flags; | |
356 | struct scpi_xfer *t, *match = NULL; | |
357 | ||
358 | spin_lock_irqsave(&ch->rx_lock, flags); | |
359 | if (list_empty(&ch->rx_pending)) { | |
360 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
361 | return; | |
362 | } | |
363 | ||
4dfe32d5 NA |
364 | /* Command type is not replied by the SCP Firmware in legacy Mode |
365 | * We should consider that command is the head of pending RX commands | |
366 | * if the list is not empty. In TX only mode, the list would be empty. | |
367 | */ | |
368 | if (scpi_info->is_legacy) { | |
369 | match = list_first_entry(&ch->rx_pending, struct scpi_xfer, | |
370 | node); | |
371 | list_del(&match->node); | |
372 | } else { | |
373 | list_for_each_entry(t, &ch->rx_pending, node) | |
374 | if (CMD_XTRACT_UNIQ(t->cmd) == CMD_XTRACT_UNIQ(cmd)) { | |
375 | list_del(&t->node); | |
376 | match = t; | |
377 | break; | |
378 | } | |
379 | } | |
8cb7cf56 SH |
380 | /* check if wait_for_completion is in progress or timed-out */ |
381 | if (match && !completion_done(&match->done)) { | |
4dfe32d5 NA |
382 | unsigned int len; |
383 | ||
384 | if (scpi_info->is_legacy) { | |
5204abd3 HK |
385 | struct legacy_scpi_shared_mem __iomem *mem = |
386 | ch->rx_payload; | |
4dfe32d5 NA |
387 | |
388 | /* RX Length is not replied by the legacy Firmware */ | |
389 | len = match->rx_len; | |
390 | ||
5204abd3 | 391 | match->status = ioread32(&mem->status); |
4dfe32d5 NA |
392 | memcpy_fromio(match->rx_buf, mem->payload, len); |
393 | } else { | |
5204abd3 | 394 | struct scpi_shared_mem __iomem *mem = ch->rx_payload; |
4dfe32d5 | 395 | |
96fe77b6 | 396 | len = min_t(unsigned int, match->rx_len, CMD_SIZE(cmd)); |
4dfe32d5 | 397 | |
5204abd3 | 398 | match->status = ioread32(&mem->status); |
4dfe32d5 NA |
399 | memcpy_fromio(match->rx_buf, mem->payload, len); |
400 | } | |
8cb7cf56 | 401 | |
8cb7cf56 SH |
402 | if (match->rx_len > len) |
403 | memset(match->rx_buf + len, 0, match->rx_len - len); | |
404 | complete(&match->done); | |
405 | } | |
406 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
407 | } | |
408 | ||
409 | static void scpi_handle_remote_msg(struct mbox_client *c, void *msg) | |
410 | { | |
411 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
5204abd3 | 412 | struct scpi_shared_mem __iomem *mem = ch->rx_payload; |
4dfe32d5 NA |
413 | u32 cmd = 0; |
414 | ||
415 | if (!scpi_info->is_legacy) | |
5204abd3 | 416 | cmd = ioread32(&mem->command); |
8cb7cf56 SH |
417 | |
418 | scpi_process_cmd(ch, cmd); | |
419 | } | |
420 | ||
421 | static void scpi_tx_prepare(struct mbox_client *c, void *msg) | |
422 | { | |
423 | unsigned long flags; | |
424 | struct scpi_xfer *t = msg; | |
425 | struct scpi_chan *ch = container_of(c, struct scpi_chan, cl); | |
5204abd3 | 426 | struct scpi_shared_mem __iomem *mem = ch->tx_payload; |
8cb7cf56 | 427 | |
4dfe32d5 NA |
428 | if (t->tx_buf) { |
429 | if (scpi_info->is_legacy) | |
430 | memcpy_toio(ch->tx_payload, t->tx_buf, t->tx_len); | |
431 | else | |
432 | memcpy_toio(mem->payload, t->tx_buf, t->tx_len); | |
433 | } | |
434 | ||
8cb7cf56 SH |
435 | if (t->rx_buf) { |
436 | if (!(++ch->token)) | |
437 | ++ch->token; | |
96fe77b6 | 438 | t->cmd |= FIELD_PREP(CMD_TOKEN_ID_MASK, ch->token); |
8cb7cf56 SH |
439 | spin_lock_irqsave(&ch->rx_lock, flags); |
440 | list_add_tail(&t->node, &ch->rx_pending); | |
441 | spin_unlock_irqrestore(&ch->rx_lock, flags); | |
442 | } | |
4dfe32d5 NA |
443 | |
444 | if (!scpi_info->is_legacy) | |
5204abd3 | 445 | iowrite32(t->cmd, &mem->command); |
8cb7cf56 SH |
446 | } |
447 | ||
448 | static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch) | |
449 | { | |
450 | struct scpi_xfer *t; | |
451 | ||
452 | mutex_lock(&ch->xfers_lock); | |
453 | if (list_empty(&ch->xfers_list)) { | |
454 | mutex_unlock(&ch->xfers_lock); | |
455 | return NULL; | |
456 | } | |
457 | t = list_first_entry(&ch->xfers_list, struct scpi_xfer, node); | |
458 | list_del(&t->node); | |
459 | mutex_unlock(&ch->xfers_lock); | |
460 | return t; | |
461 | } | |
462 | ||
463 | static void put_scpi_xfer(struct scpi_xfer *t, struct scpi_chan *ch) | |
464 | { | |
465 | mutex_lock(&ch->xfers_lock); | |
466 | list_add_tail(&t->node, &ch->xfers_list); | |
467 | mutex_unlock(&ch->xfers_lock); | |
468 | } | |
469 | ||
761d0efe | 470 | static int scpi_send_message(u8 idx, void *tx_buf, unsigned int tx_len, |
8cb7cf56 SH |
471 | void *rx_buf, unsigned int rx_len) |
472 | { | |
473 | int ret; | |
474 | u8 chan; | |
761d0efe | 475 | u8 cmd; |
8cb7cf56 SH |
476 | struct scpi_xfer *msg; |
477 | struct scpi_chan *scpi_chan; | |
478 | ||
761d0efe SH |
479 | if (scpi_info->commands[idx] < 0) |
480 | return -EOPNOTSUPP; | |
481 | ||
482 | cmd = scpi_info->commands[idx]; | |
483 | ||
4dfe32d5 NA |
484 | if (scpi_info->is_legacy) |
485 | chan = test_bit(cmd, scpi_info->cmd_priority) ? 1 : 0; | |
486 | else | |
487 | chan = atomic_inc_return(&scpi_info->next_chan) % | |
488 | scpi_info->num_chans; | |
8cb7cf56 SH |
489 | scpi_chan = scpi_info->channels + chan; |
490 | ||
491 | msg = get_scpi_xfer(scpi_chan); | |
492 | if (!msg) | |
493 | return -ENOMEM; | |
494 | ||
4dfe32d5 NA |
495 | if (scpi_info->is_legacy) { |
496 | msg->cmd = PACK_LEGACY_SCPI_CMD(cmd, tx_len); | |
497 | msg->slot = msg->cmd; | |
498 | } else { | |
499 | msg->slot = BIT(SCPI_SLOT); | |
500 | msg->cmd = PACK_SCPI_CMD(cmd, tx_len); | |
501 | } | |
8cb7cf56 SH |
502 | msg->tx_buf = tx_buf; |
503 | msg->tx_len = tx_len; | |
504 | msg->rx_buf = rx_buf; | |
505 | msg->rx_len = rx_len; | |
c511fa3f | 506 | reinit_completion(&msg->done); |
8cb7cf56 SH |
507 | |
508 | ret = mbox_send_message(scpi_chan->chan, msg); | |
509 | if (ret < 0 || !rx_buf) | |
510 | goto out; | |
511 | ||
512 | if (!wait_for_completion_timeout(&msg->done, MAX_RX_TIMEOUT)) | |
513 | ret = -ETIMEDOUT; | |
514 | else | |
515 | /* first status word */ | |
dd9a1d69 | 516 | ret = msg->status; |
8cb7cf56 SH |
517 | out: |
518 | if (ret < 0 && rx_buf) /* remove entry from the list if timed-out */ | |
519 | scpi_process_cmd(scpi_chan, msg->cmd); | |
520 | ||
521 | put_scpi_xfer(msg, scpi_chan); | |
522 | /* SCPI error codes > 0, translate them to Linux scale*/ | |
523 | return ret > 0 ? scpi_to_linux_errno(ret) : ret; | |
524 | } | |
525 | ||
526 | static u32 scpi_get_version(void) | |
527 | { | |
528 | return scpi_info->protocol_version; | |
529 | } | |
530 | ||
531 | static int | |
532 | scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max) | |
533 | { | |
534 | int ret; | |
535 | struct clk_get_info clk; | |
536 | __le16 le_clk_id = cpu_to_le16(clk_id); | |
537 | ||
761d0efe | 538 | ret = scpi_send_message(CMD_GET_CLOCK_INFO, &le_clk_id, |
8cb7cf56 SH |
539 | sizeof(le_clk_id), &clk, sizeof(clk)); |
540 | if (!ret) { | |
541 | *min = le32_to_cpu(clk.min_rate); | |
542 | *max = le32_to_cpu(clk.max_rate); | |
543 | } | |
544 | return ret; | |
545 | } | |
546 | ||
547 | static unsigned long scpi_clk_get_val(u16 clk_id) | |
548 | { | |
549 | int ret; | |
c10bd41a | 550 | __le32 rate; |
8cb7cf56 SH |
551 | __le16 le_clk_id = cpu_to_le16(clk_id); |
552 | ||
761d0efe | 553 | ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id, |
c10bd41a | 554 | sizeof(le_clk_id), &rate, sizeof(rate)); |
761d0efe | 555 | |
c10bd41a | 556 | return ret ? ret : le32_to_cpu(rate); |
8cb7cf56 SH |
557 | } |
558 | ||
559 | static int scpi_clk_set_val(u16 clk_id, unsigned long rate) | |
560 | { | |
561 | int stat; | |
562 | struct clk_set_value clk = { | |
563 | .id = cpu_to_le16(clk_id), | |
564 | .rate = cpu_to_le32(rate) | |
565 | }; | |
566 | ||
761d0efe | 567 | return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk), |
8cb7cf56 SH |
568 | &stat, sizeof(stat)); |
569 | } | |
570 | ||
4dfe32d5 NA |
571 | static int legacy_scpi_clk_set_val(u16 clk_id, unsigned long rate) |
572 | { | |
573 | int stat; | |
574 | struct legacy_clk_set_value clk = { | |
575 | .id = cpu_to_le16(clk_id), | |
576 | .rate = cpu_to_le32(rate) | |
577 | }; | |
578 | ||
579 | return scpi_send_message(CMD_SET_CLOCK_VALUE, &clk, sizeof(clk), | |
580 | &stat, sizeof(stat)); | |
581 | } | |
582 | ||
8cb7cf56 SH |
583 | static int scpi_dvfs_get_idx(u8 domain) |
584 | { | |
585 | int ret; | |
f9d91de0 | 586 | u8 dvfs_idx; |
8cb7cf56 | 587 | |
761d0efe | 588 | ret = scpi_send_message(CMD_GET_DVFS, &domain, sizeof(domain), |
f9d91de0 | 589 | &dvfs_idx, sizeof(dvfs_idx)); |
761d0efe | 590 | |
f9d91de0 | 591 | return ret ? ret : dvfs_idx; |
8cb7cf56 SH |
592 | } |
593 | ||
594 | static int scpi_dvfs_set_idx(u8 domain, u8 index) | |
595 | { | |
596 | int stat; | |
597 | struct dvfs_set dvfs = {domain, index}; | |
598 | ||
761d0efe | 599 | return scpi_send_message(CMD_SET_DVFS, &dvfs, sizeof(dvfs), |
8cb7cf56 SH |
600 | &stat, sizeof(stat)); |
601 | } | |
602 | ||
603 | static int opp_cmp_func(const void *opp1, const void *opp2) | |
604 | { | |
605 | const struct scpi_opp *t1 = opp1, *t2 = opp2; | |
606 | ||
607 | return t1->freq - t2->freq; | |
608 | } | |
609 | ||
610 | static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain) | |
611 | { | |
612 | struct scpi_dvfs_info *info; | |
613 | struct scpi_opp *opp; | |
614 | struct dvfs_info buf; | |
615 | int ret, i; | |
616 | ||
81faa556 OJ |
617 | if (domain >= MAX_DVFS_DOMAINS) |
618 | return ERR_PTR(-EINVAL); | |
619 | ||
620 | if (scpi_info->dvfs[domain]) /* data already populated */ | |
621 | return scpi_info->dvfs[domain]; | |
622 | ||
761d0efe | 623 | ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain), |
8cb7cf56 | 624 | &buf, sizeof(buf)); |
8cb7cf56 | 625 | if (ret) |
81faa556 | 626 | return ERR_PTR(ret); |
8cb7cf56 | 627 | |
81faa556 | 628 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
8cb7cf56 | 629 | if (!info) |
81faa556 | 630 | return ERR_PTR(-ENOMEM); |
8cb7cf56 | 631 | |
a963d7c5 HK |
632 | info->count = buf.opp_count; |
633 | info->latency = le16_to_cpu(buf.latency) * 1000; /* uS to nS */ | |
8cb7cf56 | 634 | |
81faa556 OJ |
635 | info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL); |
636 | if (!info->opps) { | |
637 | kfree(info); | |
638 | return ERR_PTR(-ENOMEM); | |
639 | } | |
8cb7cf56 SH |
640 | |
641 | for (i = 0, opp = info->opps; i < info->count; i++, opp++) { | |
642 | opp->freq = le32_to_cpu(buf.opps[i].freq); | |
643 | opp->m_volt = le32_to_cpu(buf.opps[i].m_volt); | |
644 | } | |
645 | ||
646 | sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL); | |
647 | ||
648 | scpi_info->dvfs[domain] = info; | |
81faa556 | 649 | return info; |
8cb7cf56 SH |
650 | } |
651 | ||
45ca7df7 SH |
652 | static int scpi_dev_domain_id(struct device *dev) |
653 | { | |
654 | struct of_phandle_args clkspec; | |
655 | ||
656 | if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells", | |
657 | 0, &clkspec)) | |
658 | return -EINVAL; | |
659 | ||
660 | return clkspec.args[0]; | |
661 | } | |
662 | ||
663 | static struct scpi_dvfs_info *scpi_dvfs_info(struct device *dev) | |
664 | { | |
665 | int domain = scpi_dev_domain_id(dev); | |
666 | ||
667 | if (domain < 0) | |
668 | return ERR_PTR(domain); | |
669 | ||
670 | return scpi_dvfs_get_info(domain); | |
671 | } | |
672 | ||
673 | static int scpi_dvfs_get_transition_latency(struct device *dev) | |
674 | { | |
675 | struct scpi_dvfs_info *info = scpi_dvfs_info(dev); | |
676 | ||
677 | if (IS_ERR(info)) | |
678 | return PTR_ERR(info); | |
679 | ||
45ca7df7 SH |
680 | return info->latency; |
681 | } | |
682 | ||
683 | static int scpi_dvfs_add_opps_to_device(struct device *dev) | |
684 | { | |
685 | int idx, ret; | |
686 | struct scpi_opp *opp; | |
687 | struct scpi_dvfs_info *info = scpi_dvfs_info(dev); | |
688 | ||
689 | if (IS_ERR(info)) | |
690 | return PTR_ERR(info); | |
691 | ||
692 | if (!info->opps) | |
693 | return -EIO; | |
694 | ||
695 | for (opp = info->opps, idx = 0; idx < info->count; idx++, opp++) { | |
696 | ret = dev_pm_opp_add(dev, opp->freq, opp->m_volt * 1000); | |
697 | if (ret) { | |
698 | dev_warn(dev, "failed to add opp %uHz %umV\n", | |
699 | opp->freq, opp->m_volt); | |
700 | while (idx-- > 0) | |
701 | dev_pm_opp_remove(dev, (--opp)->freq); | |
702 | return ret; | |
703 | } | |
704 | } | |
705 | return 0; | |
706 | } | |
707 | ||
38a1bdc9 PA |
708 | static int scpi_sensor_get_capability(u16 *sensors) |
709 | { | |
17431b78 | 710 | __le16 cap; |
38a1bdc9 PA |
711 | int ret; |
712 | ||
17431b78 HK |
713 | ret = scpi_send_message(CMD_SENSOR_CAPABILITIES, NULL, 0, &cap, |
714 | sizeof(cap)); | |
38a1bdc9 | 715 | if (!ret) |
17431b78 | 716 | *sensors = le16_to_cpu(cap); |
38a1bdc9 PA |
717 | |
718 | return ret; | |
719 | } | |
720 | ||
721 | static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info) | |
722 | { | |
723 | __le16 id = cpu_to_le16(sensor_id); | |
724 | struct _scpi_sensor_info _info; | |
725 | int ret; | |
726 | ||
761d0efe | 727 | ret = scpi_send_message(CMD_SENSOR_INFO, &id, sizeof(id), |
38a1bdc9 PA |
728 | &_info, sizeof(_info)); |
729 | if (!ret) { | |
730 | memcpy(info, &_info, sizeof(*info)); | |
731 | info->sensor_id = le16_to_cpu(_info.sensor_id); | |
732 | } | |
733 | ||
734 | return ret; | |
735 | } | |
736 | ||
3678b98f | 737 | static int scpi_sensor_get_value(u16 sensor, u64 *val) |
38a1bdc9 | 738 | { |
dd9a1d69 | 739 | __le16 id = cpu_to_le16(sensor); |
c10bd41a | 740 | __le64 value; |
38a1bdc9 PA |
741 | int ret; |
742 | ||
761d0efe | 743 | ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id), |
c10bd41a | 744 | &value, sizeof(value)); |
a766347b MB |
745 | if (ret) |
746 | return ret; | |
747 | ||
748 | if (scpi_info->is_legacy) | |
83a6060c | 749 | /* only 32-bits supported, upper 32 bits can be junk */ |
c10bd41a | 750 | *val = le32_to_cpup((__le32 *)&value); |
a766347b | 751 | else |
c10bd41a | 752 | *val = le64_to_cpu(value); |
38a1bdc9 | 753 | |
a766347b | 754 | return 0; |
38a1bdc9 PA |
755 | } |
756 | ||
37a441dc SH |
757 | static int scpi_device_get_power_state(u16 dev_id) |
758 | { | |
759 | int ret; | |
760 | u8 pstate; | |
761 | __le16 id = cpu_to_le16(dev_id); | |
762 | ||
761d0efe | 763 | ret = scpi_send_message(CMD_GET_DEVICE_PWR_STATE, &id, |
37a441dc SH |
764 | sizeof(id), &pstate, sizeof(pstate)); |
765 | return ret ? ret : pstate; | |
766 | } | |
767 | ||
768 | static int scpi_device_set_power_state(u16 dev_id, u8 pstate) | |
769 | { | |
770 | int stat; | |
771 | struct dev_pstate_set dev_set = { | |
772 | .dev_id = cpu_to_le16(dev_id), | |
773 | .pstate = pstate, | |
774 | }; | |
775 | ||
761d0efe | 776 | return scpi_send_message(CMD_SET_DEVICE_PWR_STATE, &dev_set, |
37a441dc SH |
777 | sizeof(dev_set), &stat, sizeof(stat)); |
778 | } | |
779 | ||
8cb7cf56 SH |
780 | static struct scpi_ops scpi_ops = { |
781 | .get_version = scpi_get_version, | |
782 | .clk_get_range = scpi_clk_get_range, | |
783 | .clk_get_val = scpi_clk_get_val, | |
784 | .clk_set_val = scpi_clk_set_val, | |
785 | .dvfs_get_idx = scpi_dvfs_get_idx, | |
786 | .dvfs_set_idx = scpi_dvfs_set_idx, | |
787 | .dvfs_get_info = scpi_dvfs_get_info, | |
45ca7df7 SH |
788 | .device_domain_id = scpi_dev_domain_id, |
789 | .get_transition_latency = scpi_dvfs_get_transition_latency, | |
790 | .add_opps_to_device = scpi_dvfs_add_opps_to_device, | |
38a1bdc9 PA |
791 | .sensor_get_capability = scpi_sensor_get_capability, |
792 | .sensor_get_info = scpi_sensor_get_info, | |
793 | .sensor_get_value = scpi_sensor_get_value, | |
37a441dc SH |
794 | .device_get_power_state = scpi_device_get_power_state, |
795 | .device_set_power_state = scpi_device_set_power_state, | |
8cb7cf56 SH |
796 | }; |
797 | ||
798 | struct scpi_ops *get_scpi_ops(void) | |
799 | { | |
800 | return scpi_info ? scpi_info->scpi_ops : NULL; | |
801 | } | |
802 | EXPORT_SYMBOL_GPL(get_scpi_ops); | |
803 | ||
804 | static int scpi_init_versions(struct scpi_drvinfo *info) | |
805 | { | |
806 | int ret; | |
807 | struct scp_capabilities caps; | |
808 | ||
761d0efe | 809 | ret = scpi_send_message(CMD_SCPI_CAPABILITIES, NULL, 0, |
8cb7cf56 SH |
810 | &caps, sizeof(caps)); |
811 | if (!ret) { | |
812 | info->protocol_version = le32_to_cpu(caps.protocol_version); | |
813 | info->firmware_version = le32_to_cpu(caps.platform_version); | |
814 | } | |
abd3e805 NA |
815 | /* Ignore error if not implemented */ |
816 | if (scpi_info->is_legacy && ret == -EOPNOTSUPP) | |
817 | return 0; | |
818 | ||
8cb7cf56 SH |
819 | return ret; |
820 | } | |
821 | ||
822 | static ssize_t protocol_version_show(struct device *dev, | |
823 | struct device_attribute *attr, char *buf) | |
824 | { | |
81faa556 OJ |
825 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); |
826 | ||
7cd49a26 HK |
827 | return sprintf(buf, "%lu.%lu\n", |
828 | FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version), | |
829 | FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version)); | |
8cb7cf56 SH |
830 | } |
831 | static DEVICE_ATTR_RO(protocol_version); | |
832 | ||
833 | static ssize_t firmware_version_show(struct device *dev, | |
834 | struct device_attribute *attr, char *buf) | |
835 | { | |
81faa556 OJ |
836 | struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev); |
837 | ||
7cd49a26 HK |
838 | return sprintf(buf, "%lu.%lu.%lu\n", |
839 | FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version), | |
840 | FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version), | |
841 | FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version)); | |
8cb7cf56 SH |
842 | } |
843 | static DEVICE_ATTR_RO(firmware_version); | |
844 | ||
845 | static struct attribute *versions_attrs[] = { | |
846 | &dev_attr_firmware_version.attr, | |
847 | &dev_attr_protocol_version.attr, | |
848 | NULL, | |
849 | }; | |
850 | ATTRIBUTE_GROUPS(versions); | |
851 | ||
c14f1db4 | 852 | static void scpi_free_channels(void *data) |
8cb7cf56 | 853 | { |
c14f1db4 | 854 | struct scpi_drvinfo *info = data; |
8cb7cf56 SH |
855 | int i; |
856 | ||
c14f1db4 HK |
857 | for (i = 0; i < info->num_chans; i++) |
858 | mbox_free_channel(info->channels[i].chan); | |
81faa556 OJ |
859 | } |
860 | ||
861 | static int scpi_remove(struct platform_device *pdev) | |
862 | { | |
863 | int i; | |
81faa556 OJ |
864 | struct scpi_drvinfo *info = platform_get_drvdata(pdev); |
865 | ||
866 | scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */ | |
867 | ||
81faa556 OJ |
868 | for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) { |
869 | kfree(info->dvfs[i]->opps); | |
870 | kfree(info->dvfs[i]); | |
871 | } | |
81faa556 OJ |
872 | |
873 | return 0; | |
8cb7cf56 SH |
874 | } |
875 | ||
8cb7cf56 SH |
876 | #define MAX_SCPI_XFERS 10 |
877 | static int scpi_alloc_xfer_list(struct device *dev, struct scpi_chan *ch) | |
878 | { | |
879 | int i; | |
880 | struct scpi_xfer *xfers; | |
881 | ||
a86854d0 | 882 | xfers = devm_kcalloc(dev, MAX_SCPI_XFERS, sizeof(*xfers), GFP_KERNEL); |
8cb7cf56 SH |
883 | if (!xfers) |
884 | return -ENOMEM; | |
885 | ||
886 | ch->xfers = xfers; | |
c511fa3f AK |
887 | for (i = 0; i < MAX_SCPI_XFERS; i++, xfers++) { |
888 | init_completion(&xfers->done); | |
8cb7cf56 | 889 | list_add_tail(&xfers->node, &ch->xfers_list); |
c511fa3f AK |
890 | } |
891 | ||
8cb7cf56 SH |
892 | return 0; |
893 | } | |
894 | ||
8358c6b5 SH |
895 | static const struct of_device_id legacy_scpi_of_match[] = { |
896 | {.compatible = "arm,scpi-pre-1.0"}, | |
897 | {}, | |
898 | }; | |
899 | ||
8cb7cf56 SH |
900 | static int scpi_probe(struct platform_device *pdev) |
901 | { | |
902 | int count, idx, ret; | |
903 | struct resource res; | |
8cb7cf56 SH |
904 | struct device *dev = &pdev->dev; |
905 | struct device_node *np = dev->of_node; | |
906 | ||
907 | scpi_info = devm_kzalloc(dev, sizeof(*scpi_info), GFP_KERNEL); | |
908 | if (!scpi_info) | |
909 | return -ENOMEM; | |
910 | ||
8358c6b5 SH |
911 | if (of_match_device(legacy_scpi_of_match, &pdev->dev)) |
912 | scpi_info->is_legacy = true; | |
913 | ||
8cb7cf56 SH |
914 | count = of_count_phandle_with_args(np, "mboxes", "#mbox-cells"); |
915 | if (count < 0) { | |
9deee319 | 916 | dev_err(dev, "no mboxes property in '%pOF'\n", np); |
8cb7cf56 SH |
917 | return -ENODEV; |
918 | } | |
919 | ||
c14f1db4 HK |
920 | scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan), |
921 | GFP_KERNEL); | |
922 | if (!scpi_info->channels) | |
8cb7cf56 SH |
923 | return -ENOMEM; |
924 | ||
c14f1db4 HK |
925 | ret = devm_add_action(dev, scpi_free_channels, scpi_info); |
926 | if (ret) | |
927 | return ret; | |
928 | ||
929 | for (; scpi_info->num_chans < count; scpi_info->num_chans++) { | |
8cb7cf56 | 930 | resource_size_t size; |
c14f1db4 HK |
931 | int idx = scpi_info->num_chans; |
932 | struct scpi_chan *pchan = scpi_info->channels + idx; | |
8cb7cf56 SH |
933 | struct mbox_client *cl = &pchan->cl; |
934 | struct device_node *shmem = of_parse_phandle(np, "shmem", idx); | |
935 | ||
b079bd55 PC |
936 | ret = of_address_to_resource(shmem, 0, &res); |
937 | of_node_put(shmem); | |
938 | if (ret) { | |
8cb7cf56 | 939 | dev_err(dev, "failed to get SCPI payload mem resource\n"); |
c14f1db4 | 940 | return ret; |
8cb7cf56 SH |
941 | } |
942 | ||
943 | size = resource_size(&res); | |
944 | pchan->rx_payload = devm_ioremap(dev, res.start, size); | |
945 | if (!pchan->rx_payload) { | |
946 | dev_err(dev, "failed to ioremap SCPI payload\n"); | |
c14f1db4 | 947 | return -EADDRNOTAVAIL; |
8cb7cf56 SH |
948 | } |
949 | pchan->tx_payload = pchan->rx_payload + (size >> 1); | |
950 | ||
951 | cl->dev = dev; | |
952 | cl->rx_callback = scpi_handle_remote_msg; | |
953 | cl->tx_prepare = scpi_tx_prepare; | |
954 | cl->tx_block = true; | |
3bdd8843 | 955 | cl->tx_tout = 20; |
8cb7cf56 SH |
956 | cl->knows_txdone = false; /* controller can't ack */ |
957 | ||
958 | INIT_LIST_HEAD(&pchan->rx_pending); | |
959 | INIT_LIST_HEAD(&pchan->xfers_list); | |
960 | spin_lock_init(&pchan->rx_lock); | |
961 | mutex_init(&pchan->xfers_lock); | |
962 | ||
963 | ret = scpi_alloc_xfer_list(dev, pchan); | |
964 | if (!ret) { | |
965 | pchan->chan = mbox_request_channel(cl, idx); | |
966 | if (!IS_ERR(pchan->chan)) | |
967 | continue; | |
968 | ret = PTR_ERR(pchan->chan); | |
969 | if (ret != -EPROBE_DEFER) | |
970 | dev_err(dev, "failed to get channel%d err %d\n", | |
971 | idx, ret); | |
972 | } | |
8cb7cf56 SH |
973 | return ret; |
974 | } | |
975 | ||
761d0efe | 976 | scpi_info->commands = scpi_std_commands; |
81faa556 OJ |
977 | |
978 | platform_set_drvdata(pdev, scpi_info); | |
761d0efe | 979 | |
4dfe32d5 NA |
980 | if (scpi_info->is_legacy) { |
981 | /* Replace with legacy variants */ | |
982 | scpi_ops.clk_set_val = legacy_scpi_clk_set_val; | |
983 | scpi_info->commands = scpi_legacy_commands; | |
984 | ||
985 | /* Fill priority bitmap */ | |
986 | for (idx = 0; idx < ARRAY_SIZE(legacy_hpriority_cmds); idx++) | |
987 | set_bit(legacy_hpriority_cmds[idx], | |
988 | scpi_info->cmd_priority); | |
989 | } | |
990 | ||
8cb7cf56 SH |
991 | ret = scpi_init_versions(scpi_info); |
992 | if (ret) { | |
993 | dev_err(dev, "incorrect or no SCP firmware found\n"); | |
8cb7cf56 SH |
994 | return ret; |
995 | } | |
996 | ||
62c60efb HK |
997 | if (scpi_info->is_legacy && !scpi_info->protocol_version && |
998 | !scpi_info->firmware_version) | |
999 | dev_info(dev, "SCP Protocol legacy pre-1.0 firmware\n"); | |
1000 | else | |
1001 | dev_info(dev, "SCP Protocol %lu.%lu Firmware %lu.%lu.%lu version\n", | |
1002 | FIELD_GET(PROTO_REV_MAJOR_MASK, | |
1003 | scpi_info->protocol_version), | |
1004 | FIELD_GET(PROTO_REV_MINOR_MASK, | |
1005 | scpi_info->protocol_version), | |
1006 | FIELD_GET(FW_REV_MAJOR_MASK, | |
1007 | scpi_info->firmware_version), | |
1008 | FIELD_GET(FW_REV_MINOR_MASK, | |
1009 | scpi_info->firmware_version), | |
1010 | FIELD_GET(FW_REV_PATCH_MASK, | |
1011 | scpi_info->firmware_version)); | |
81faa556 | 1012 | scpi_info->scpi_ops = &scpi_ops; |
8cb7cf56 | 1013 | |
5abc7935 | 1014 | ret = devm_device_add_groups(dev, versions_groups); |
8cb7cf56 SH |
1015 | if (ret) |
1016 | dev_err(dev, "unable to create sysfs version group\n"); | |
1017 | ||
5abc7935 | 1018 | return devm_of_platform_populate(dev); |
8cb7cf56 SH |
1019 | } |
1020 | ||
1021 | static const struct of_device_id scpi_of_match[] = { | |
1022 | {.compatible = "arm,scpi"}, | |
8358c6b5 | 1023 | {.compatible = "arm,scpi-pre-1.0"}, |
8cb7cf56 SH |
1024 | {}, |
1025 | }; | |
1026 | ||
1027 | MODULE_DEVICE_TABLE(of, scpi_of_match); | |
1028 | ||
1029 | static struct platform_driver scpi_driver = { | |
1030 | .driver = { | |
1031 | .name = "scpi_protocol", | |
1032 | .of_match_table = scpi_of_match, | |
1033 | }, | |
1034 | .probe = scpi_probe, | |
81faa556 | 1035 | .remove = scpi_remove, |
8cb7cf56 SH |
1036 | }; |
1037 | module_platform_driver(scpi_driver); | |
1038 | ||
1039 | MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>"); | |
1040 | MODULE_DESCRIPTION("ARM SCPI mailbox protocol driver"); | |
1041 | MODULE_LICENSE("GPL v2"); |