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Commit | Line | Data |
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6a8c3be7 AT |
1 | # |
2 | # FPGA framework configuration | |
3 | # | |
4 | ||
5 | menu "FPGA Configuration Support" | |
6 | ||
7 | config FPGA | |
8 | tristate "FPGA Configuration Framework" | |
9 | help | |
10 | Say Y here if you want support for configuring FPGAs from the | |
11 | kernel. The FPGA framework adds a FPGA manager class and FPGA | |
12 | manager drivers. | |
13 | ||
fab6266e AT |
14 | if FPGA |
15 | ||
0fa20cdf AT |
16 | config FPGA_REGION |
17 | tristate "FPGA Region" | |
18 | depends on OF && FPGA_BRIDGE | |
19 | help | |
20 | FPGA Regions allow loading FPGA images under control of | |
21 | the Device Tree. | |
22 | ||
fab6266e AT |
23 | config FPGA_MGR_SOCFPGA |
24 | tristate "Altera SOCFPGA FPGA Manager" | |
a0e1b618 | 25 | depends on ARCH_SOCFPGA || COMPILE_TEST |
fab6266e AT |
26 | help |
27 | FPGA manager driver support for Altera SOCFPGA. | |
28 | ||
acbb910a AT |
29 | config FPGA_MGR_SOCFPGA_A10 |
30 | tristate "Altera SoCFPGA Arria10" | |
a0e1b618 JG |
31 | depends on ARCH_SOCFPGA || COMPILE_TEST |
32 | select REGMAP_MMIO | |
acbb910a AT |
33 | help |
34 | FPGA manager driver support for Altera Arria10 SoCFPGA. | |
35 | ||
37784706 MF |
36 | config FPGA_MGR_ZYNQ_FPGA |
37 | tristate "Xilinx Zynq FPGA" | |
54e9b099 | 38 | depends on ARCH_ZYNQ || COMPILE_TEST |
1c8cb409 | 39 | depends on HAS_DMA |
37784706 MF |
40 | help |
41 | FPGA manager driver support for Xilinx Zynq FPGAs. | |
42 | ||
21aeda95 AT |
43 | config FPGA_BRIDGE |
44 | tristate "FPGA Bridge Framework" | |
45 | depends on OF | |
46 | help | |
47 | Say Y here if you want to support bridges connected between host | |
48 | processors and FPGAs or between FPGAs. | |
49 | ||
e5f8efa5 AT |
50 | config SOCFPGA_FPGA_BRIDGE |
51 | tristate "Altera SoCFPGA FPGA Bridges" | |
52 | depends on ARCH_SOCFPGA && FPGA_BRIDGE | |
53 | help | |
54 | Say Y to enable drivers for FPGA bridges for Altera SOCFPGA | |
55 | devices. | |
56 | ||
ca24a648 AT |
57 | config ALTERA_FREEZE_BRIDGE |
58 | tristate "Altera FPGA Freeze Bridge" | |
59 | depends on ARCH_SOCFPGA && FPGA_BRIDGE | |
60 | help | |
61 | Say Y to enable drivers for Altera FPGA Freeze bridges. A | |
62 | freeze bridge is a bridge that exists in the FPGA fabric to | |
63 | isolate one region of the FPGA from the busses while that | |
64 | region is being reprogrammed. | |
65 | ||
fab6266e AT |
66 | endif # FPGA |
67 | ||
6a8c3be7 | 68 | endmenu |