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6a8c3be7 AT |
1 | /* |
2 | * FPGA Manager Core | |
3 | * | |
4 | * Copyright (C) 2013-2015 Altera Corporation | |
5 | * | |
6 | * With code from the mailing list: | |
7 | * Copyright (C) 2013 Xilinx, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms and conditions of the GNU General Public License, | |
11 | * version 2, as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope it will be useful, but WITHOUT | |
14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
16 | * more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License along with | |
19 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | #include <linux/firmware.h> | |
22 | #include <linux/fpga/fpga-mgr.h> | |
23 | #include <linux/idr.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/of.h> | |
26 | #include <linux/mutex.h> | |
27 | #include <linux/slab.h> | |
28 | ||
29 | static DEFINE_IDA(fpga_mgr_ida); | |
30 | static struct class *fpga_mgr_class; | |
31 | ||
32 | /** | |
33 | * fpga_mgr_buf_load - load fpga from image in buffer | |
34 | * @mgr: fpga manager | |
35 | * @flags: flags setting fpga confuration modes | |
36 | * @buf: buffer contain fpga image | |
37 | * @count: byte count of buf | |
38 | * | |
39 | * Step the low level fpga manager through the device-specific steps of getting | |
40 | * an FPGA ready to be configured, writing the image to it, then doing whatever | |
41 | * post-configuration steps necessary. | |
42 | * | |
43 | * Return: 0 on success, negative error code otherwise. | |
44 | */ | |
45 | int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf, | |
46 | size_t count) | |
47 | { | |
48 | struct device *dev = &mgr->dev; | |
49 | int ret; | |
50 | ||
51 | if (!mgr) | |
52 | return -ENODEV; | |
53 | ||
54 | /* | |
55 | * Call the low level driver's write_init function. This will do the | |
56 | * device-specific things to get the FPGA into the state where it is | |
57 | * ready to receive an FPGA image. | |
58 | */ | |
59 | mgr->state = FPGA_MGR_STATE_WRITE_INIT; | |
60 | ret = mgr->mops->write_init(mgr, flags, buf, count); | |
61 | if (ret) { | |
62 | dev_err(dev, "Error preparing FPGA for writing\n"); | |
63 | mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR; | |
64 | return ret; | |
65 | } | |
66 | ||
67 | /* | |
68 | * Write the FPGA image to the FPGA. | |
69 | */ | |
70 | mgr->state = FPGA_MGR_STATE_WRITE; | |
71 | ret = mgr->mops->write(mgr, buf, count); | |
72 | if (ret) { | |
73 | dev_err(dev, "Error while writing image data to FPGA\n"); | |
74 | mgr->state = FPGA_MGR_STATE_WRITE_ERR; | |
75 | return ret; | |
76 | } | |
77 | ||
78 | /* | |
79 | * After all the FPGA image has been written, do the device specific | |
80 | * steps to finish and set the FPGA into operating mode. | |
81 | */ | |
82 | mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; | |
83 | ret = mgr->mops->write_complete(mgr, flags); | |
84 | if (ret) { | |
85 | dev_err(dev, "Error after writing image data to FPGA\n"); | |
86 | mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; | |
87 | return ret; | |
88 | } | |
89 | mgr->state = FPGA_MGR_STATE_OPERATING; | |
90 | ||
91 | return 0; | |
92 | } | |
93 | EXPORT_SYMBOL_GPL(fpga_mgr_buf_load); | |
94 | ||
95 | /** | |
96 | * fpga_mgr_firmware_load - request firmware and load to fpga | |
97 | * @mgr: fpga manager | |
98 | * @flags: flags setting fpga confuration modes | |
99 | * @image_name: name of image file on the firmware search path | |
100 | * | |
101 | * Request an FPGA image using the firmware class, then write out to the FPGA. | |
102 | * Update the state before each step to provide info on what step failed if | |
103 | * there is a failure. | |
104 | * | |
105 | * Return: 0 on success, negative error code otherwise. | |
106 | */ | |
107 | int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags, | |
108 | const char *image_name) | |
109 | { | |
110 | struct device *dev = &mgr->dev; | |
111 | const struct firmware *fw; | |
112 | int ret; | |
113 | ||
114 | if (!mgr) | |
115 | return -ENODEV; | |
116 | ||
117 | dev_info(dev, "writing %s to %s\n", image_name, mgr->name); | |
118 | ||
119 | mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ; | |
120 | ||
121 | ret = request_firmware(&fw, image_name, dev); | |
122 | if (ret) { | |
123 | mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR; | |
124 | dev_err(dev, "Error requesting firmware %s\n", image_name); | |
125 | return ret; | |
126 | } | |
127 | ||
128 | ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size); | |
129 | if (ret) | |
130 | return ret; | |
131 | ||
132 | release_firmware(fw); | |
133 | ||
134 | return 0; | |
135 | } | |
136 | EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load); | |
137 | ||
138 | static const char * const state_str[] = { | |
139 | [FPGA_MGR_STATE_UNKNOWN] = "unknown", | |
140 | [FPGA_MGR_STATE_POWER_OFF] = "power off", | |
141 | [FPGA_MGR_STATE_POWER_UP] = "power up", | |
142 | [FPGA_MGR_STATE_RESET] = "reset", | |
143 | ||
144 | /* requesting FPGA image from firmware */ | |
145 | [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request", | |
146 | [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error", | |
147 | ||
148 | /* Preparing FPGA to receive image */ | |
149 | [FPGA_MGR_STATE_WRITE_INIT] = "write init", | |
150 | [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error", | |
151 | ||
152 | /* Writing image to FPGA */ | |
153 | [FPGA_MGR_STATE_WRITE] = "write", | |
154 | [FPGA_MGR_STATE_WRITE_ERR] = "write error", | |
155 | ||
156 | /* Finishing configuration after image has been written */ | |
157 | [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete", | |
158 | [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error", | |
159 | ||
160 | /* FPGA reports to be in normal operating mode */ | |
161 | [FPGA_MGR_STATE_OPERATING] = "operating", | |
162 | }; | |
163 | ||
164 | static ssize_t name_show(struct device *dev, | |
165 | struct device_attribute *attr, char *buf) | |
166 | { | |
167 | struct fpga_manager *mgr = to_fpga_manager(dev); | |
168 | ||
169 | return sprintf(buf, "%s\n", mgr->name); | |
170 | } | |
171 | ||
172 | static ssize_t state_show(struct device *dev, | |
173 | struct device_attribute *attr, char *buf) | |
174 | { | |
175 | struct fpga_manager *mgr = to_fpga_manager(dev); | |
176 | ||
177 | return sprintf(buf, "%s\n", state_str[mgr->state]); | |
178 | } | |
179 | ||
180 | static DEVICE_ATTR_RO(name); | |
181 | static DEVICE_ATTR_RO(state); | |
182 | ||
183 | static struct attribute *fpga_mgr_attrs[] = { | |
184 | &dev_attr_name.attr, | |
185 | &dev_attr_state.attr, | |
186 | NULL, | |
187 | }; | |
188 | ATTRIBUTE_GROUPS(fpga_mgr); | |
189 | ||
190 | static int fpga_mgr_of_node_match(struct device *dev, const void *data) | |
191 | { | |
192 | return dev->of_node == data; | |
193 | } | |
194 | ||
195 | /** | |
196 | * of_fpga_mgr_get - get an exclusive reference to a fpga mgr | |
197 | * @node: device node | |
198 | * | |
199 | * Given a device node, get an exclusive reference to a fpga mgr. | |
200 | * | |
201 | * Return: fpga manager struct or IS_ERR() condition containing error code. | |
202 | */ | |
203 | struct fpga_manager *of_fpga_mgr_get(struct device_node *node) | |
204 | { | |
205 | struct fpga_manager *mgr; | |
206 | struct device *dev; | |
654ba4cc | 207 | int ret = -ENODEV; |
6a8c3be7 AT |
208 | |
209 | dev = class_find_device(fpga_mgr_class, NULL, node, | |
210 | fpga_mgr_of_node_match); | |
211 | if (!dev) | |
212 | return ERR_PTR(-ENODEV); | |
213 | ||
214 | mgr = to_fpga_manager(dev); | |
6a8c3be7 | 215 | if (!mgr) |
654ba4cc | 216 | goto err_dev; |
6a8c3be7 AT |
217 | |
218 | /* Get exclusive use of fpga manager */ | |
654ba4cc AT |
219 | if (!mutex_trylock(&mgr->ref_mutex)) { |
220 | ret = -EBUSY; | |
221 | goto err_dev; | |
6a8c3be7 AT |
222 | } |
223 | ||
654ba4cc AT |
224 | if (!try_module_get(dev->parent->driver->owner)) |
225 | goto err_ll_mod; | |
226 | ||
6a8c3be7 | 227 | return mgr; |
654ba4cc AT |
228 | |
229 | err_ll_mod: | |
230 | mutex_unlock(&mgr->ref_mutex); | |
231 | err_dev: | |
232 | put_device(dev); | |
233 | return ERR_PTR(ret); | |
6a8c3be7 AT |
234 | } |
235 | EXPORT_SYMBOL_GPL(of_fpga_mgr_get); | |
236 | ||
237 | /** | |
238 | * fpga_mgr_put - release a reference to a fpga manager | |
239 | * @mgr: fpga manager structure | |
240 | */ | |
241 | void fpga_mgr_put(struct fpga_manager *mgr) | |
242 | { | |
654ba4cc AT |
243 | module_put(mgr->dev.parent->driver->owner); |
244 | mutex_unlock(&mgr->ref_mutex); | |
245 | put_device(&mgr->dev); | |
6a8c3be7 AT |
246 | } |
247 | EXPORT_SYMBOL_GPL(fpga_mgr_put); | |
248 | ||
249 | /** | |
250 | * fpga_mgr_register - register a low level fpga manager driver | |
251 | * @dev: fpga manager device from pdev | |
252 | * @name: fpga manager name | |
253 | * @mops: pointer to structure of fpga manager ops | |
254 | * @priv: fpga manager private data | |
255 | * | |
256 | * Return: 0 on success, negative error code otherwise. | |
257 | */ | |
258 | int fpga_mgr_register(struct device *dev, const char *name, | |
259 | const struct fpga_manager_ops *mops, | |
260 | void *priv) | |
261 | { | |
262 | struct fpga_manager *mgr; | |
263 | const char *dt_label; | |
264 | int id, ret; | |
265 | ||
266 | if (!mops || !mops->write_init || !mops->write || | |
267 | !mops->write_complete || !mops->state) { | |
268 | dev_err(dev, "Attempt to register without fpga_manager_ops\n"); | |
269 | return -EINVAL; | |
270 | } | |
271 | ||
272 | if (!name || !strlen(name)) { | |
273 | dev_err(dev, "Attempt to register with no name!\n"); | |
274 | return -EINVAL; | |
275 | } | |
276 | ||
277 | mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); | |
278 | if (!mgr) | |
279 | return -ENOMEM; | |
280 | ||
281 | id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL); | |
282 | if (id < 0) { | |
283 | ret = id; | |
284 | goto error_kfree; | |
285 | } | |
286 | ||
287 | mutex_init(&mgr->ref_mutex); | |
288 | ||
289 | mgr->name = name; | |
290 | mgr->mops = mops; | |
291 | mgr->priv = priv; | |
292 | ||
293 | /* | |
294 | * Initialize framework state by requesting low level driver read state | |
295 | * from device. FPGA may be in reset mode or may have been programmed | |
296 | * by bootloader or EEPROM. | |
297 | */ | |
298 | mgr->state = mgr->mops->state(mgr); | |
299 | ||
300 | device_initialize(&mgr->dev); | |
301 | mgr->dev.class = fpga_mgr_class; | |
302 | mgr->dev.parent = dev; | |
303 | mgr->dev.of_node = dev->of_node; | |
304 | mgr->dev.id = id; | |
305 | dev_set_drvdata(dev, mgr); | |
306 | ||
307 | dt_label = of_get_property(mgr->dev.of_node, "label", NULL); | |
308 | if (dt_label) | |
309 | ret = dev_set_name(&mgr->dev, "%s", dt_label); | |
310 | else | |
311 | ret = dev_set_name(&mgr->dev, "fpga%d", id); | |
312 | ||
313 | ret = device_add(&mgr->dev); | |
314 | if (ret) | |
315 | goto error_device; | |
316 | ||
317 | dev_info(&mgr->dev, "%s registered\n", mgr->name); | |
318 | ||
319 | return 0; | |
320 | ||
321 | error_device: | |
322 | ida_simple_remove(&fpga_mgr_ida, id); | |
323 | error_kfree: | |
324 | kfree(mgr); | |
325 | ||
326 | return ret; | |
327 | } | |
328 | EXPORT_SYMBOL_GPL(fpga_mgr_register); | |
329 | ||
330 | /** | |
331 | * fpga_mgr_unregister - unregister a low level fpga manager driver | |
332 | * @dev: fpga manager device from pdev | |
333 | */ | |
334 | void fpga_mgr_unregister(struct device *dev) | |
335 | { | |
336 | struct fpga_manager *mgr = dev_get_drvdata(dev); | |
337 | ||
338 | dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name); | |
339 | ||
340 | /* | |
341 | * If the low level driver provides a method for putting fpga into | |
342 | * a desired state upon unregister, do it. | |
343 | */ | |
344 | if (mgr->mops->fpga_remove) | |
345 | mgr->mops->fpga_remove(mgr); | |
346 | ||
347 | device_unregister(&mgr->dev); | |
348 | } | |
349 | EXPORT_SYMBOL_GPL(fpga_mgr_unregister); | |
350 | ||
351 | static void fpga_mgr_dev_release(struct device *dev) | |
352 | { | |
353 | struct fpga_manager *mgr = to_fpga_manager(dev); | |
354 | ||
355 | ida_simple_remove(&fpga_mgr_ida, mgr->dev.id); | |
356 | kfree(mgr); | |
357 | } | |
358 | ||
359 | static int __init fpga_mgr_class_init(void) | |
360 | { | |
361 | pr_info("FPGA manager framework\n"); | |
362 | ||
363 | fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager"); | |
364 | if (IS_ERR(fpga_mgr_class)) | |
365 | return PTR_ERR(fpga_mgr_class); | |
366 | ||
367 | fpga_mgr_class->dev_groups = fpga_mgr_groups; | |
368 | fpga_mgr_class->dev_release = fpga_mgr_dev_release; | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
373 | static void __exit fpga_mgr_class_exit(void) | |
374 | { | |
375 | class_destroy(fpga_mgr_class); | |
376 | ida_destroy(&fpga_mgr_ida); | |
377 | } | |
378 | ||
379 | MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>"); | |
380 | MODULE_DESCRIPTION("FPGA manager framework"); | |
381 | MODULE_LICENSE("GPL v2"); | |
382 | ||
383 | subsys_initcall(fpga_mgr_class_init); | |
384 | module_exit(fpga_mgr_class_exit); |