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0fa20cdf AT |
1 | /* |
2 | * FPGA Region - Device Tree support for FPGA programming under Linux | |
3 | * | |
4 | * Copyright (C) 2013-2016 Altera Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | #include <linux/fpga/fpga-bridge.h> | |
20 | #include <linux/fpga/fpga-mgr.h> | |
21 | #include <linux/idr.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/of_platform.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/spinlock.h> | |
28 | ||
29 | /** | |
30 | * struct fpga_region - FPGA Region structure | |
31 | * @dev: FPGA Region device | |
32 | * @mutex: enforces exclusive reference to region | |
33 | * @bridge_list: list of FPGA bridges specified in region | |
34 | * @info: fpga image specific information | |
35 | */ | |
36 | struct fpga_region { | |
37 | struct device dev; | |
38 | struct mutex mutex; /* for exclusive reference to region */ | |
39 | struct list_head bridge_list; | |
40 | struct fpga_image_info *info; | |
41 | }; | |
42 | ||
43 | #define to_fpga_region(d) container_of(d, struct fpga_region, dev) | |
44 | ||
45 | static DEFINE_IDA(fpga_region_ida); | |
46 | static struct class *fpga_region_class; | |
47 | ||
48 | static const struct of_device_id fpga_region_of_match[] = { | |
49 | { .compatible = "fpga-region", }, | |
50 | {}, | |
51 | }; | |
52 | MODULE_DEVICE_TABLE(of, fpga_region_of_match); | |
53 | ||
54 | static int fpga_region_of_node_match(struct device *dev, const void *data) | |
55 | { | |
56 | return dev->of_node == data; | |
57 | } | |
58 | ||
59 | /** | |
60 | * fpga_region_find - find FPGA region | |
61 | * @np: device node of FPGA Region | |
62 | * Caller will need to put_device(®ion->dev) when done. | |
63 | * Returns FPGA Region struct or NULL | |
64 | */ | |
65 | static struct fpga_region *fpga_region_find(struct device_node *np) | |
66 | { | |
67 | struct device *dev; | |
68 | ||
69 | dev = class_find_device(fpga_region_class, NULL, np, | |
70 | fpga_region_of_node_match); | |
71 | if (!dev) | |
72 | return NULL; | |
73 | ||
74 | return to_fpga_region(dev); | |
75 | } | |
76 | ||
77 | /** | |
78 | * fpga_region_get - get an exclusive reference to a fpga region | |
79 | * @region: FPGA Region struct | |
80 | * | |
81 | * Caller should call fpga_region_put() when done with region. | |
82 | * | |
83 | * Return fpga_region struct if successful. | |
84 | * Return -EBUSY if someone already has a reference to the region. | |
85 | * Return -ENODEV if @np is not a FPGA Region. | |
86 | */ | |
87 | static struct fpga_region *fpga_region_get(struct fpga_region *region) | |
88 | { | |
89 | struct device *dev = ®ion->dev; | |
90 | ||
91 | if (!mutex_trylock(®ion->mutex)) { | |
92 | dev_dbg(dev, "%s: FPGA Region already in use\n", __func__); | |
93 | return ERR_PTR(-EBUSY); | |
94 | } | |
95 | ||
96 | get_device(dev); | |
97 | of_node_get(dev->of_node); | |
98 | if (!try_module_get(dev->parent->driver->owner)) { | |
99 | of_node_put(dev->of_node); | |
100 | put_device(dev); | |
101 | mutex_unlock(®ion->mutex); | |
102 | return ERR_PTR(-ENODEV); | |
103 | } | |
104 | ||
105 | dev_dbg(®ion->dev, "get\n"); | |
106 | ||
107 | return region; | |
108 | } | |
109 | ||
110 | /** | |
111 | * fpga_region_put - release a reference to a region | |
112 | * | |
113 | * @region: FPGA region | |
114 | */ | |
115 | static void fpga_region_put(struct fpga_region *region) | |
116 | { | |
117 | struct device *dev = ®ion->dev; | |
118 | ||
119 | dev_dbg(®ion->dev, "put\n"); | |
120 | ||
121 | module_put(dev->parent->driver->owner); | |
122 | of_node_put(dev->of_node); | |
123 | put_device(dev); | |
124 | mutex_unlock(®ion->mutex); | |
125 | } | |
126 | ||
127 | /** | |
128 | * fpga_region_get_manager - get exclusive reference for FPGA manager | |
129 | * @region: FPGA region | |
130 | * | |
131 | * Get FPGA Manager from "fpga-mgr" property or from ancestor region. | |
132 | * | |
133 | * Caller should call fpga_mgr_put() when done with manager. | |
134 | * | |
135 | * Return: fpga manager struct or IS_ERR() condition containing error code. | |
136 | */ | |
137 | static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region) | |
138 | { | |
139 | struct device *dev = ®ion->dev; | |
140 | struct device_node *np = dev->of_node; | |
141 | struct device_node *mgr_node; | |
142 | struct fpga_manager *mgr; | |
143 | ||
144 | of_node_get(np); | |
145 | while (np) { | |
146 | if (of_device_is_compatible(np, "fpga-region")) { | |
147 | mgr_node = of_parse_phandle(np, "fpga-mgr", 0); | |
148 | if (mgr_node) { | |
149 | mgr = of_fpga_mgr_get(mgr_node); | |
b7d53af8 | 150 | of_node_put(mgr_node); |
0fa20cdf AT |
151 | of_node_put(np); |
152 | return mgr; | |
153 | } | |
154 | } | |
155 | np = of_get_next_parent(np); | |
156 | } | |
157 | of_node_put(np); | |
158 | ||
159 | return ERR_PTR(-EINVAL); | |
160 | } | |
161 | ||
162 | /** | |
163 | * fpga_region_get_bridges - create a list of bridges | |
164 | * @region: FPGA region | |
165 | * @overlay: device node of the overlay | |
166 | * | |
167 | * Create a list of bridges including the parent bridge and the bridges | |
168 | * specified by "fpga-bridges" property. Note that the | |
169 | * fpga_bridges_enable/disable/put functions are all fine with an empty list | |
170 | * if that happens. | |
171 | * | |
172 | * Caller should call fpga_bridges_put(®ion->bridge_list) when | |
173 | * done with the bridges. | |
174 | * | |
175 | * Return 0 for success (even if there are no bridges specified) | |
176 | * or -EBUSY if any of the bridges are in use. | |
177 | */ | |
178 | static int fpga_region_get_bridges(struct fpga_region *region, | |
179 | struct device_node *overlay) | |
180 | { | |
181 | struct device *dev = ®ion->dev; | |
182 | struct device_node *region_np = dev->of_node; | |
183 | struct device_node *br, *np, *parent_br = NULL; | |
184 | int i, ret; | |
185 | ||
186 | /* If parent is a bridge, add to list */ | |
187 | ret = fpga_bridge_get_to_list(region_np->parent, region->info, | |
188 | ®ion->bridge_list); | |
189 | if (ret == -EBUSY) | |
190 | return ret; | |
191 | ||
192 | if (!ret) | |
193 | parent_br = region_np->parent; | |
194 | ||
195 | /* If overlay has a list of bridges, use it. */ | |
b7d53af8 IA |
196 | br = of_parse_phandle(overlay, "fpga-bridges", 0); |
197 | if (br) { | |
198 | of_node_put(br); | |
0fa20cdf | 199 | np = overlay; |
b7d53af8 | 200 | } else { |
0fa20cdf | 201 | np = region_np; |
b7d53af8 | 202 | } |
0fa20cdf AT |
203 | |
204 | for (i = 0; ; i++) { | |
205 | br = of_parse_phandle(np, "fpga-bridges", i); | |
206 | if (!br) | |
207 | break; | |
208 | ||
209 | /* If parent bridge is in list, skip it. */ | |
b7d53af8 IA |
210 | if (br == parent_br) { |
211 | of_node_put(br); | |
0fa20cdf | 212 | continue; |
b7d53af8 | 213 | } |
0fa20cdf AT |
214 | |
215 | /* If node is a bridge, get it and add to list */ | |
216 | ret = fpga_bridge_get_to_list(br, region->info, | |
217 | ®ion->bridge_list); | |
b7d53af8 | 218 | of_node_put(br); |
0fa20cdf AT |
219 | |
220 | /* If any of the bridges are in use, give up */ | |
221 | if (ret == -EBUSY) { | |
222 | fpga_bridges_put(®ion->bridge_list); | |
223 | return -EBUSY; | |
224 | } | |
225 | } | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
230 | /** | |
231 | * fpga_region_program_fpga - program FPGA | |
232 | * @region: FPGA region | |
233 | * @firmware_name: name of FPGA image firmware file | |
234 | * @overlay: device node of the overlay | |
235 | * Program an FPGA using information in the device tree. | |
236 | * Function assumes that there is a firmware-name property. | |
237 | * Return 0 for success or negative error code. | |
238 | */ | |
239 | static int fpga_region_program_fpga(struct fpga_region *region, | |
240 | const char *firmware_name, | |
241 | struct device_node *overlay) | |
242 | { | |
243 | struct fpga_manager *mgr; | |
244 | int ret; | |
245 | ||
246 | region = fpga_region_get(region); | |
247 | if (IS_ERR(region)) { | |
248 | pr_err("failed to get fpga region\n"); | |
249 | return PTR_ERR(region); | |
250 | } | |
251 | ||
252 | mgr = fpga_region_get_manager(region); | |
253 | if (IS_ERR(mgr)) { | |
254 | pr_err("failed to get fpga region manager\n"); | |
e73bbf64 TK |
255 | ret = PTR_ERR(mgr); |
256 | goto err_put_region; | |
0fa20cdf AT |
257 | } |
258 | ||
259 | ret = fpga_region_get_bridges(region, overlay); | |
260 | if (ret) { | |
261 | pr_err("failed to get fpga region bridges\n"); | |
262 | goto err_put_mgr; | |
263 | } | |
264 | ||
265 | ret = fpga_bridges_disable(®ion->bridge_list); | |
266 | if (ret) { | |
267 | pr_err("failed to disable region bridges\n"); | |
268 | goto err_put_br; | |
269 | } | |
270 | ||
271 | ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name); | |
272 | if (ret) { | |
273 | pr_err("failed to load fpga image\n"); | |
274 | goto err_put_br; | |
275 | } | |
276 | ||
277 | ret = fpga_bridges_enable(®ion->bridge_list); | |
278 | if (ret) { | |
279 | pr_err("failed to enable region bridges\n"); | |
280 | goto err_put_br; | |
281 | } | |
282 | ||
283 | fpga_mgr_put(mgr); | |
284 | fpga_region_put(region); | |
285 | ||
286 | return 0; | |
287 | ||
288 | err_put_br: | |
289 | fpga_bridges_put(®ion->bridge_list); | |
290 | err_put_mgr: | |
291 | fpga_mgr_put(mgr); | |
e73bbf64 | 292 | err_put_region: |
0fa20cdf AT |
293 | fpga_region_put(region); |
294 | ||
295 | return ret; | |
296 | } | |
297 | ||
298 | /** | |
299 | * child_regions_with_firmware | |
300 | * @overlay: device node of the overlay | |
301 | * | |
302 | * If the overlay adds child FPGA regions, they are not allowed to have | |
303 | * firmware-name property. | |
304 | * | |
305 | * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name. | |
306 | */ | |
307 | static int child_regions_with_firmware(struct device_node *overlay) | |
308 | { | |
309 | struct device_node *child_region; | |
310 | const char *child_firmware_name; | |
311 | int ret = 0; | |
312 | ||
313 | of_node_get(overlay); | |
314 | ||
315 | child_region = of_find_matching_node(overlay, fpga_region_of_match); | |
316 | while (child_region) { | |
317 | if (!of_property_read_string(child_region, "firmware-name", | |
318 | &child_firmware_name)) { | |
319 | ret = -EINVAL; | |
320 | break; | |
321 | } | |
322 | child_region = of_find_matching_node(child_region, | |
323 | fpga_region_of_match); | |
324 | } | |
325 | ||
326 | of_node_put(child_region); | |
327 | ||
328 | if (ret) | |
13bf35b5 RH |
329 | pr_err("firmware-name not allowed in child FPGA region: %pOF", |
330 | child_region); | |
0fa20cdf AT |
331 | |
332 | return ret; | |
333 | } | |
334 | ||
335 | /** | |
336 | * fpga_region_notify_pre_apply - pre-apply overlay notification | |
337 | * | |
338 | * @region: FPGA region that the overlay was applied to | |
339 | * @nd: overlay notification data | |
340 | * | |
341 | * Called after when an overlay targeted to a FPGA Region is about to be | |
342 | * applied. Function will check the properties that will be added to the FPGA | |
343 | * region. If the checks pass, it will program the FPGA. | |
344 | * | |
345 | * The checks are: | |
346 | * The overlay must add either firmware-name or external-fpga-config property | |
347 | * to the FPGA Region. | |
348 | * | |
161db575 MF |
349 | * firmware-name : program the FPGA |
350 | * external-fpga-config : FPGA is already programmed | |
351 | * encrypted-fpga-config : FPGA bitstream is encrypted | |
0fa20cdf AT |
352 | * |
353 | * The overlay can add other FPGA regions, but child FPGA regions cannot have a | |
354 | * firmware-name property since those regions don't exist yet. | |
355 | * | |
356 | * If the overlay that breaks the rules, notifier returns an error and the | |
357 | * overlay is rejected before it goes into the main tree. | |
358 | * | |
359 | * Returns 0 for success or negative error code for failure. | |
360 | */ | |
361 | static int fpga_region_notify_pre_apply(struct fpga_region *region, | |
362 | struct of_overlay_notify_data *nd) | |
363 | { | |
364 | const char *firmware_name = NULL; | |
365 | struct fpga_image_info *info; | |
366 | int ret; | |
367 | ||
368 | info = devm_kzalloc(®ion->dev, sizeof(*info), GFP_KERNEL); | |
369 | if (!info) | |
370 | return -ENOMEM; | |
371 | ||
372 | region->info = info; | |
373 | ||
374 | /* Reject overlay if child FPGA Regions have firmware-name property */ | |
375 | ret = child_regions_with_firmware(nd->overlay); | |
376 | if (ret) | |
377 | return ret; | |
378 | ||
379 | /* Read FPGA region properties from the overlay */ | |
380 | if (of_property_read_bool(nd->overlay, "partial-fpga-config")) | |
381 | info->flags |= FPGA_MGR_PARTIAL_RECONFIG; | |
382 | ||
383 | if (of_property_read_bool(nd->overlay, "external-fpga-config")) | |
384 | info->flags |= FPGA_MGR_EXTERNAL_CONFIG; | |
385 | ||
161db575 MF |
386 | if (of_property_read_bool(nd->overlay, "encrypted-fpga-config")) |
387 | info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM; | |
388 | ||
0fa20cdf AT |
389 | of_property_read_string(nd->overlay, "firmware-name", &firmware_name); |
390 | ||
391 | of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us", | |
392 | &info->enable_timeout_us); | |
393 | ||
394 | of_property_read_u32(nd->overlay, "region-freeze-timeout-us", | |
395 | &info->disable_timeout_us); | |
396 | ||
42d5ec95 AT |
397 | of_property_read_u32(nd->overlay, "config-complete-timeout-us", |
398 | &info->config_complete_timeout_us); | |
399 | ||
0fa20cdf AT |
400 | /* If FPGA was externally programmed, don't specify firmware */ |
401 | if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) { | |
402 | pr_err("error: specified firmware and external-fpga-config"); | |
403 | return -EINVAL; | |
404 | } | |
405 | ||
406 | /* FPGA is already configured externally. We're done. */ | |
407 | if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) | |
408 | return 0; | |
409 | ||
410 | /* If we got this far, we should be programming the FPGA */ | |
411 | if (!firmware_name) { | |
412 | pr_err("should specify firmware-name or external-fpga-config\n"); | |
413 | return -EINVAL; | |
414 | } | |
415 | ||
416 | return fpga_region_program_fpga(region, firmware_name, nd->overlay); | |
417 | } | |
418 | ||
419 | /** | |
420 | * fpga_region_notify_post_remove - post-remove overlay notification | |
421 | * | |
422 | * @region: FPGA region that was targeted by the overlay that was removed | |
423 | * @nd: overlay notification data | |
424 | * | |
425 | * Called after an overlay has been removed if the overlay's target was a | |
426 | * FPGA region. | |
427 | */ | |
428 | static void fpga_region_notify_post_remove(struct fpga_region *region, | |
429 | struct of_overlay_notify_data *nd) | |
430 | { | |
431 | fpga_bridges_disable(®ion->bridge_list); | |
432 | fpga_bridges_put(®ion->bridge_list); | |
433 | devm_kfree(®ion->dev, region->info); | |
434 | region->info = NULL; | |
435 | } | |
436 | ||
437 | /** | |
438 | * of_fpga_region_notify - reconfig notifier for dynamic DT changes | |
439 | * @nb: notifier block | |
440 | * @action: notifier action | |
441 | * @arg: reconfig data | |
442 | * | |
443 | * This notifier handles programming a FPGA when a "firmware-name" property is | |
444 | * added to a fpga-region. | |
445 | * | |
446 | * Returns NOTIFY_OK or error if FPGA programming fails. | |
447 | */ | |
448 | static int of_fpga_region_notify(struct notifier_block *nb, | |
449 | unsigned long action, void *arg) | |
450 | { | |
451 | struct of_overlay_notify_data *nd = arg; | |
452 | struct fpga_region *region; | |
453 | int ret; | |
454 | ||
455 | switch (action) { | |
456 | case OF_OVERLAY_PRE_APPLY: | |
457 | pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__); | |
458 | break; | |
459 | case OF_OVERLAY_POST_APPLY: | |
460 | pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__); | |
461 | return NOTIFY_OK; /* not for us */ | |
462 | case OF_OVERLAY_PRE_REMOVE: | |
463 | pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__); | |
464 | return NOTIFY_OK; /* not for us */ | |
465 | case OF_OVERLAY_POST_REMOVE: | |
466 | pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__); | |
467 | break; | |
468 | default: /* should not happen */ | |
469 | return NOTIFY_OK; | |
470 | } | |
471 | ||
472 | region = fpga_region_find(nd->target); | |
473 | if (!region) | |
474 | return NOTIFY_OK; | |
475 | ||
476 | ret = 0; | |
477 | switch (action) { | |
478 | case OF_OVERLAY_PRE_APPLY: | |
479 | ret = fpga_region_notify_pre_apply(region, nd); | |
480 | break; | |
481 | ||
482 | case OF_OVERLAY_POST_REMOVE: | |
483 | fpga_region_notify_post_remove(region, nd); | |
484 | break; | |
485 | } | |
486 | ||
487 | put_device(®ion->dev); | |
488 | ||
489 | if (ret) | |
490 | return notifier_from_errno(ret); | |
491 | ||
492 | return NOTIFY_OK; | |
493 | } | |
494 | ||
495 | static struct notifier_block fpga_region_of_nb = { | |
496 | .notifier_call = of_fpga_region_notify, | |
497 | }; | |
498 | ||
499 | static int fpga_region_probe(struct platform_device *pdev) | |
500 | { | |
501 | struct device *dev = &pdev->dev; | |
502 | struct device_node *np = dev->of_node; | |
503 | struct fpga_region *region; | |
504 | int id, ret = 0; | |
505 | ||
506 | region = kzalloc(sizeof(*region), GFP_KERNEL); | |
507 | if (!region) | |
508 | return -ENOMEM; | |
509 | ||
510 | id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL); | |
511 | if (id < 0) { | |
512 | ret = id; | |
513 | goto err_kfree; | |
514 | } | |
515 | ||
516 | mutex_init(®ion->mutex); | |
517 | INIT_LIST_HEAD(®ion->bridge_list); | |
518 | ||
519 | device_initialize(®ion->dev); | |
520 | region->dev.class = fpga_region_class; | |
521 | region->dev.parent = dev; | |
522 | region->dev.of_node = np; | |
523 | region->dev.id = id; | |
524 | dev_set_drvdata(dev, region); | |
525 | ||
526 | ret = dev_set_name(®ion->dev, "region%d", id); | |
527 | if (ret) | |
528 | goto err_remove; | |
529 | ||
530 | ret = device_add(®ion->dev); | |
531 | if (ret) | |
532 | goto err_remove; | |
533 | ||
534 | of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev); | |
535 | ||
536 | dev_info(dev, "FPGA Region probed\n"); | |
537 | ||
538 | return 0; | |
539 | ||
540 | err_remove: | |
541 | ida_simple_remove(&fpga_region_ida, id); | |
542 | err_kfree: | |
543 | kfree(region); | |
544 | ||
545 | return ret; | |
546 | } | |
547 | ||
548 | static int fpga_region_remove(struct platform_device *pdev) | |
549 | { | |
550 | struct fpga_region *region = platform_get_drvdata(pdev); | |
551 | ||
552 | device_unregister(®ion->dev); | |
553 | ||
554 | return 0; | |
555 | } | |
556 | ||
557 | static struct platform_driver fpga_region_driver = { | |
558 | .probe = fpga_region_probe, | |
559 | .remove = fpga_region_remove, | |
560 | .driver = { | |
561 | .name = "fpga-region", | |
562 | .of_match_table = of_match_ptr(fpga_region_of_match), | |
563 | }, | |
564 | }; | |
565 | ||
566 | static void fpga_region_dev_release(struct device *dev) | |
567 | { | |
568 | struct fpga_region *region = to_fpga_region(dev); | |
569 | ||
570 | ida_simple_remove(&fpga_region_ida, region->dev.id); | |
571 | kfree(region); | |
572 | } | |
573 | ||
574 | /** | |
575 | * fpga_region_init - init function for fpga_region class | |
576 | * Creates the fpga_region class and registers a reconfig notifier. | |
577 | */ | |
578 | static int __init fpga_region_init(void) | |
579 | { | |
580 | int ret; | |
581 | ||
582 | fpga_region_class = class_create(THIS_MODULE, "fpga_region"); | |
583 | if (IS_ERR(fpga_region_class)) | |
584 | return PTR_ERR(fpga_region_class); | |
585 | ||
586 | fpga_region_class->dev_release = fpga_region_dev_release; | |
587 | ||
588 | ret = of_overlay_notifier_register(&fpga_region_of_nb); | |
589 | if (ret) | |
590 | goto err_class; | |
591 | ||
592 | ret = platform_driver_register(&fpga_region_driver); | |
593 | if (ret) | |
594 | goto err_plat; | |
595 | ||
596 | return 0; | |
597 | ||
598 | err_plat: | |
599 | of_overlay_notifier_unregister(&fpga_region_of_nb); | |
600 | err_class: | |
601 | class_destroy(fpga_region_class); | |
602 | ida_destroy(&fpga_region_ida); | |
603 | return ret; | |
604 | } | |
605 | ||
606 | static void __exit fpga_region_exit(void) | |
607 | { | |
608 | platform_driver_unregister(&fpga_region_driver); | |
609 | of_overlay_notifier_unregister(&fpga_region_of_nb); | |
610 | class_destroy(fpga_region_class); | |
611 | ida_destroy(&fpga_region_ida); | |
612 | } | |
613 | ||
614 | subsys_initcall(fpga_region_init); | |
615 | module_exit(fpga_region_exit); | |
616 | ||
617 | MODULE_DESCRIPTION("FPGA Region"); | |
618 | MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>"); | |
619 | MODULE_LICENSE("GPL v2"); |