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0508ad1f JK |
1 | /* |
2 | * FSI core driver | |
3 | * | |
4 | * Copyright (C) IBM Corporation 2016 | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
2b545cd8 | 16 | #include <linux/crc4.h> |
0508ad1f JK |
17 | #include <linux/device.h> |
18 | #include <linux/fsi.h> | |
09aecfab | 19 | #include <linux/idr.h> |
0508ad1f | 20 | #include <linux/module.h> |
2b545cd8 | 21 | #include <linux/slab.h> |
f7ade2a6 | 22 | #include <linux/bitops.h> |
0508ad1f | 23 | |
09aecfab JK |
24 | #include "fsi-master.h" |
25 | ||
66433b05 JK |
26 | #define CREATE_TRACE_POINTS |
27 | #include <trace/events/fsi.h> | |
28 | ||
f7ade2a6 JK |
29 | #define FSI_SLAVE_CONF_NEXT_MASK GENMASK(31, 31) |
30 | #define FSI_SLAVE_CONF_SLOTS_MASK GENMASK(23, 16) | |
31 | #define FSI_SLAVE_CONF_SLOTS_SHIFT 16 | |
32 | #define FSI_SLAVE_CONF_VERSION_MASK GENMASK(15, 12) | |
33 | #define FSI_SLAVE_CONF_VERSION_SHIFT 12 | |
34 | #define FSI_SLAVE_CONF_TYPE_MASK GENMASK(11, 4) | |
35 | #define FSI_SLAVE_CONF_TYPE_SHIFT 4 | |
36 | #define FSI_SLAVE_CONF_CRC_SHIFT 4 | |
37 | #define FSI_SLAVE_CONF_CRC_MASK GENMASK(3, 0) | |
38 | #define FSI_SLAVE_CONF_DATA_BITS 28 | |
39 | ||
4efe37f4 JK |
40 | #define FSI_PEEK_BASE 0x410 |
41 | ||
f7ade2a6 JK |
42 | static const int engine_page_size = 0x400; |
43 | ||
2b37c3e2 CB |
44 | #define FSI_SLAVE_BASE 0x800 |
45 | ||
46 | /* | |
47 | * FSI slave engine control register offsets | |
48 | */ | |
1fa847d7 JK |
49 | #define FSI_SMODE 0x0 /* R/W: Mode register */ |
50 | #define FSI_SISC 0x8 /* R/W: Interrupt condition */ | |
51 | #define FSI_SSTAT 0x14 /* R : Slave status */ | |
4af889b0 | 52 | #define FSI_LLMODE 0x100 /* R/W: Link layer mode register */ |
2b37c3e2 CB |
53 | |
54 | /* | |
55 | * SMODE fields | |
56 | */ | |
57 | #define FSI_SMODE_WSC 0x80000000 /* Warm start done */ | |
58 | #define FSI_SMODE_ECRC 0x20000000 /* Hw CRC check */ | |
59 | #define FSI_SMODE_SID_SHIFT 24 /* ID shift */ | |
60 | #define FSI_SMODE_SID_MASK 3 /* ID Mask */ | |
61 | #define FSI_SMODE_ED_SHIFT 20 /* Echo delay shift */ | |
62 | #define FSI_SMODE_ED_MASK 0xf /* Echo delay mask */ | |
63 | #define FSI_SMODE_SD_SHIFT 16 /* Send delay shift */ | |
64 | #define FSI_SMODE_SD_MASK 0xf /* Send delay mask */ | |
65 | #define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */ | |
66 | #define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */ | |
67 | ||
4af889b0 JK |
68 | /* |
69 | * LLMODE fields | |
70 | */ | |
71 | #define FSI_LLMODE_ASYNC 0x1 | |
72 | ||
2b545cd8 JK |
73 | #define FSI_SLAVE_SIZE_23b 0x800000 |
74 | ||
09aecfab JK |
75 | static DEFINE_IDA(master_ida); |
76 | ||
faf0b116 JK |
77 | struct fsi_slave { |
78 | struct device dev; | |
79 | struct fsi_master *master; | |
80 | int id; | |
81 | int link; | |
82 | uint32_t size; /* size of slave address space */ | |
83 | }; | |
84 | ||
cd0fdb5c | 85 | #define to_fsi_master(d) container_of(d, struct fsi_master, dev) |
faf0b116 JK |
86 | #define to_fsi_slave(d) container_of(d, struct fsi_slave, dev) |
87 | ||
1fa847d7 JK |
88 | static const int slave_retries = 2; |
89 | static int discard_errors; | |
90 | ||
014c2abc JK |
91 | static int fsi_master_read(struct fsi_master *master, int link, |
92 | uint8_t slave_id, uint32_t addr, void *val, size_t size); | |
93 | static int fsi_master_write(struct fsi_master *master, int link, | |
94 | uint8_t slave_id, uint32_t addr, const void *val, size_t size); | |
1fa847d7 | 95 | static int fsi_master_break(struct fsi_master *master, int link); |
4efe37f4 JK |
96 | |
97 | /* | |
98 | * fsi_device_read() / fsi_device_write() / fsi_device_peek() | |
99 | * | |
100 | * FSI endpoint-device support | |
101 | * | |
102 | * Read / write / peek accessors for a client | |
103 | * | |
104 | * Parameters: | |
105 | * dev: Structure passed to FSI client device drivers on probe(). | |
106 | * addr: FSI address of given device. Client should pass in its base address | |
107 | * plus desired offset to access its register space. | |
108 | * val: For read/peek this is the value read at the specified address. For | |
109 | * write this is value to write to the specified address. | |
110 | * The data in val must be FSI bus endian (big endian). | |
111 | * size: Size in bytes of the operation. Sizes supported are 1, 2 and 4 bytes. | |
112 | * Addresses must be aligned on size boundaries or an error will result. | |
113 | */ | |
114 | int fsi_device_read(struct fsi_device *dev, uint32_t addr, void *val, | |
115 | size_t size) | |
116 | { | |
117 | if (addr > dev->size || size > dev->size || addr > dev->size - size) | |
118 | return -EINVAL; | |
119 | ||
120 | return fsi_slave_read(dev->slave, dev->addr + addr, val, size); | |
121 | } | |
122 | EXPORT_SYMBOL_GPL(fsi_device_read); | |
123 | ||
124 | int fsi_device_write(struct fsi_device *dev, uint32_t addr, const void *val, | |
125 | size_t size) | |
126 | { | |
127 | if (addr > dev->size || size > dev->size || addr > dev->size - size) | |
128 | return -EINVAL; | |
129 | ||
130 | return fsi_slave_write(dev->slave, dev->addr + addr, val, size); | |
131 | } | |
132 | EXPORT_SYMBOL_GPL(fsi_device_write); | |
133 | ||
134 | int fsi_device_peek(struct fsi_device *dev, void *val) | |
135 | { | |
136 | uint32_t addr = FSI_PEEK_BASE + ((dev->unit - 2) * sizeof(uint32_t)); | |
014c2abc | 137 | |
4efe37f4 JK |
138 | return fsi_slave_read(dev->slave, addr, val, sizeof(uint32_t)); |
139 | } | |
f7ade2a6 JK |
140 | |
141 | static void fsi_device_release(struct device *_device) | |
142 | { | |
143 | struct fsi_device *device = to_fsi_dev(_device); | |
144 | ||
145 | kfree(device); | |
146 | } | |
147 | ||
148 | static struct fsi_device *fsi_create_device(struct fsi_slave *slave) | |
149 | { | |
150 | struct fsi_device *dev; | |
151 | ||
152 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
153 | if (!dev) | |
154 | return NULL; | |
155 | ||
156 | dev->dev.parent = &slave->dev; | |
157 | dev->dev.bus = &fsi_bus_type; | |
158 | dev->dev.release = fsi_device_release; | |
159 | ||
160 | return dev; | |
161 | } | |
162 | ||
414c1026 | 163 | /* FSI slave support */ |
014c2abc JK |
164 | static int fsi_slave_calc_addr(struct fsi_slave *slave, uint32_t *addrp, |
165 | uint8_t *idp) | |
166 | { | |
167 | uint32_t addr = *addrp; | |
168 | uint8_t id = *idp; | |
169 | ||
170 | if (addr > slave->size) | |
171 | return -EINVAL; | |
172 | ||
173 | /* For 23 bit addressing, we encode the extra two bits in the slave | |
174 | * id (and the slave's actual ID needs to be 0). | |
175 | */ | |
176 | if (addr > 0x1fffff) { | |
177 | if (slave->id != 0) | |
178 | return -EINVAL; | |
179 | id = (addr >> 21) & 0x3; | |
180 | addr &= 0x1fffff; | |
181 | } | |
182 | ||
183 | *addrp = addr; | |
184 | *idp = id; | |
185 | return 0; | |
186 | } | |
187 | ||
1fa847d7 JK |
188 | int fsi_slave_report_and_clear_errors(struct fsi_slave *slave) |
189 | { | |
190 | struct fsi_master *master = slave->master; | |
191 | uint32_t irq, stat; | |
192 | int rc, link; | |
193 | uint8_t id; | |
194 | ||
195 | link = slave->link; | |
196 | id = slave->id; | |
197 | ||
198 | rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SISC, | |
199 | &irq, sizeof(irq)); | |
200 | if (rc) | |
201 | return rc; | |
202 | ||
203 | rc = fsi_master_read(master, link, id, FSI_SLAVE_BASE + FSI_SSTAT, | |
204 | &stat, sizeof(stat)); | |
205 | if (rc) | |
206 | return rc; | |
207 | ||
208 | dev_info(&slave->dev, "status: 0x%08x, sisc: 0x%08x\n", | |
209 | be32_to_cpu(stat), be32_to_cpu(irq)); | |
210 | ||
211 | /* clear interrupts */ | |
212 | return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SISC, | |
213 | &irq, sizeof(irq)); | |
214 | } | |
215 | ||
216 | static int fsi_slave_set_smode(struct fsi_master *master, int link, int id); | |
217 | ||
218 | int fsi_slave_handle_error(struct fsi_slave *slave, bool write, uint32_t addr, | |
219 | size_t size) | |
220 | { | |
221 | struct fsi_master *master = slave->master; | |
222 | int rc, link; | |
223 | uint32_t reg; | |
224 | uint8_t id; | |
225 | ||
226 | if (discard_errors) | |
227 | return -1; | |
228 | ||
229 | link = slave->link; | |
230 | id = slave->id; | |
231 | ||
232 | dev_dbg(&slave->dev, "handling error on %s to 0x%08x[%zd]", | |
233 | write ? "write" : "read", addr, size); | |
234 | ||
235 | /* try a simple clear of error conditions, which may fail if we've lost | |
236 | * communication with the slave | |
237 | */ | |
238 | rc = fsi_slave_report_and_clear_errors(slave); | |
239 | if (!rc) | |
240 | return 0; | |
241 | ||
242 | /* send a TERM and retry */ | |
243 | if (master->term) { | |
244 | rc = master->term(master, link, id); | |
245 | if (!rc) { | |
246 | rc = fsi_master_read(master, link, id, 0, | |
247 | ®, sizeof(reg)); | |
248 | if (!rc) | |
249 | rc = fsi_slave_report_and_clear_errors(slave); | |
250 | if (!rc) | |
251 | return 0; | |
252 | } | |
253 | } | |
254 | ||
255 | /* getting serious, reset the slave via BREAK */ | |
256 | rc = fsi_master_break(master, link); | |
257 | if (rc) | |
258 | return rc; | |
259 | ||
260 | rc = fsi_slave_set_smode(master, link, id); | |
261 | if (rc) | |
262 | return rc; | |
263 | ||
264 | return fsi_slave_report_and_clear_errors(slave); | |
265 | } | |
266 | ||
da36cadf | 267 | int fsi_slave_read(struct fsi_slave *slave, uint32_t addr, |
014c2abc JK |
268 | void *val, size_t size) |
269 | { | |
270 | uint8_t id = slave->id; | |
1fa847d7 | 271 | int rc, err_rc, i; |
014c2abc JK |
272 | |
273 | rc = fsi_slave_calc_addr(slave, &addr, &id); | |
274 | if (rc) | |
275 | return rc; | |
276 | ||
1fa847d7 JK |
277 | for (i = 0; i < slave_retries; i++) { |
278 | rc = fsi_master_read(slave->master, slave->link, | |
279 | id, addr, val, size); | |
280 | if (!rc) | |
281 | break; | |
282 | ||
283 | err_rc = fsi_slave_handle_error(slave, false, addr, size); | |
284 | if (err_rc) | |
285 | break; | |
286 | } | |
287 | ||
288 | return rc; | |
014c2abc | 289 | } |
da36cadf | 290 | EXPORT_SYMBOL_GPL(fsi_slave_read); |
014c2abc | 291 | |
da36cadf | 292 | int fsi_slave_write(struct fsi_slave *slave, uint32_t addr, |
014c2abc JK |
293 | const void *val, size_t size) |
294 | { | |
295 | uint8_t id = slave->id; | |
1fa847d7 | 296 | int rc, err_rc, i; |
014c2abc JK |
297 | |
298 | rc = fsi_slave_calc_addr(slave, &addr, &id); | |
299 | if (rc) | |
300 | return rc; | |
301 | ||
1fa847d7 JK |
302 | for (i = 0; i < slave_retries; i++) { |
303 | rc = fsi_master_write(slave->master, slave->link, | |
304 | id, addr, val, size); | |
305 | if (!rc) | |
306 | break; | |
307 | ||
308 | err_rc = fsi_slave_handle_error(slave, true, addr, size); | |
309 | if (err_rc) | |
310 | break; | |
311 | } | |
312 | ||
313 | return rc; | |
014c2abc | 314 | } |
da36cadf JK |
315 | EXPORT_SYMBOL_GPL(fsi_slave_write); |
316 | ||
317 | extern int fsi_slave_claim_range(struct fsi_slave *slave, | |
318 | uint32_t addr, uint32_t size) | |
319 | { | |
320 | if (addr + size < addr) | |
321 | return -EINVAL; | |
322 | ||
323 | if (addr + size > slave->size) | |
324 | return -EINVAL; | |
325 | ||
326 | /* todo: check for overlapping claims */ | |
327 | return 0; | |
328 | } | |
329 | EXPORT_SYMBOL_GPL(fsi_slave_claim_range); | |
330 | ||
331 | extern void fsi_slave_release_range(struct fsi_slave *slave, | |
332 | uint32_t addr, uint32_t size) | |
333 | { | |
334 | } | |
335 | EXPORT_SYMBOL_GPL(fsi_slave_release_range); | |
014c2abc | 336 | |
f7ade2a6 JK |
337 | static int fsi_slave_scan(struct fsi_slave *slave) |
338 | { | |
339 | uint32_t engine_addr; | |
340 | uint32_t conf; | |
341 | int rc, i; | |
342 | ||
343 | /* | |
344 | * scan engines | |
345 | * | |
346 | * We keep the peek mode and slave engines for the core; so start | |
347 | * at the third slot in the configuration table. We also need to | |
348 | * skip the chip ID entry at the start of the address space. | |
349 | */ | |
350 | engine_addr = engine_page_size * 3; | |
351 | for (i = 2; i < engine_page_size / sizeof(uint32_t); i++) { | |
352 | uint8_t slots, version, type, crc; | |
353 | struct fsi_device *dev; | |
354 | ||
355 | rc = fsi_slave_read(slave, (i + 1) * sizeof(conf), | |
356 | &conf, sizeof(conf)); | |
357 | if (rc) { | |
358 | dev_warn(&slave->dev, | |
359 | "error reading slave registers\n"); | |
360 | return -1; | |
361 | } | |
362 | conf = be32_to_cpu(conf); | |
363 | ||
364 | crc = crc4(0, conf, 32); | |
365 | if (crc) { | |
366 | dev_warn(&slave->dev, | |
367 | "crc error in slave register at 0x%04x\n", | |
368 | i); | |
369 | return -1; | |
370 | } | |
371 | ||
372 | slots = (conf & FSI_SLAVE_CONF_SLOTS_MASK) | |
373 | >> FSI_SLAVE_CONF_SLOTS_SHIFT; | |
374 | version = (conf & FSI_SLAVE_CONF_VERSION_MASK) | |
375 | >> FSI_SLAVE_CONF_VERSION_SHIFT; | |
376 | type = (conf & FSI_SLAVE_CONF_TYPE_MASK) | |
377 | >> FSI_SLAVE_CONF_TYPE_SHIFT; | |
378 | ||
379 | /* | |
380 | * Unused address areas are marked by a zero type value; this | |
381 | * skips the defined address areas | |
382 | */ | |
383 | if (type != 0 && slots != 0) { | |
384 | ||
385 | /* create device */ | |
386 | dev = fsi_create_device(slave); | |
387 | if (!dev) | |
388 | return -ENOMEM; | |
389 | ||
390 | dev->slave = slave; | |
391 | dev->engine_type = type; | |
392 | dev->version = version; | |
393 | dev->unit = i; | |
394 | dev->addr = engine_addr; | |
395 | dev->size = slots * engine_page_size; | |
396 | ||
397 | dev_dbg(&slave->dev, | |
398 | "engine[%i]: type %x, version %x, addr %x size %x\n", | |
399 | dev->unit, dev->engine_type, version, | |
400 | dev->addr, dev->size); | |
401 | ||
402 | dev_set_name(&dev->dev, "%02x:%02x:%02x:%02x", | |
403 | slave->master->idx, slave->link, | |
404 | slave->id, i - 2); | |
405 | ||
406 | rc = device_register(&dev->dev); | |
407 | if (rc) { | |
408 | dev_warn(&slave->dev, "add failed: %d\n", rc); | |
409 | put_device(&dev->dev); | |
410 | } | |
411 | } | |
412 | ||
413 | engine_addr += slots * engine_page_size; | |
414 | ||
415 | if (!(conf & FSI_SLAVE_CONF_NEXT_MASK)) | |
416 | break; | |
417 | } | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
125739cb JK |
422 | static ssize_t fsi_slave_sysfs_raw_read(struct file *file, |
423 | struct kobject *kobj, struct bin_attribute *attr, char *buf, | |
424 | loff_t off, size_t count) | |
425 | { | |
426 | struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj)); | |
427 | size_t total_len, read_len; | |
428 | int rc; | |
429 | ||
430 | if (off < 0) | |
431 | return -EINVAL; | |
432 | ||
433 | if (off > 0xffffffff || count > 0xffffffff || off + count > 0xffffffff) | |
434 | return -EINVAL; | |
435 | ||
436 | for (total_len = 0; total_len < count; total_len += read_len) { | |
437 | read_len = min_t(size_t, count, 4); | |
438 | read_len -= off & 0x3; | |
439 | ||
440 | rc = fsi_slave_read(slave, off, buf + total_len, read_len); | |
441 | if (rc) | |
442 | return rc; | |
443 | ||
444 | off += read_len; | |
445 | } | |
446 | ||
447 | return count; | |
448 | } | |
449 | ||
450 | static ssize_t fsi_slave_sysfs_raw_write(struct file *file, | |
451 | struct kobject *kobj, struct bin_attribute *attr, | |
452 | char *buf, loff_t off, size_t count) | |
453 | { | |
454 | struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj)); | |
455 | size_t total_len, write_len; | |
456 | int rc; | |
457 | ||
458 | if (off < 0) | |
459 | return -EINVAL; | |
460 | ||
461 | if (off > 0xffffffff || count > 0xffffffff || off + count > 0xffffffff) | |
462 | return -EINVAL; | |
463 | ||
464 | for (total_len = 0; total_len < count; total_len += write_len) { | |
465 | write_len = min_t(size_t, count, 4); | |
466 | write_len -= off & 0x3; | |
467 | ||
468 | rc = fsi_slave_write(slave, off, buf + total_len, write_len); | |
469 | if (rc) | |
470 | return rc; | |
471 | ||
472 | off += write_len; | |
473 | } | |
474 | ||
475 | return count; | |
476 | } | |
477 | ||
478 | static struct bin_attribute fsi_slave_raw_attr = { | |
479 | .attr = { | |
480 | .name = "raw", | |
481 | .mode = 0600, | |
482 | }, | |
483 | .size = 0, | |
484 | .read = fsi_slave_sysfs_raw_read, | |
485 | .write = fsi_slave_sysfs_raw_write, | |
486 | }; | |
487 | ||
488 | static ssize_t fsi_slave_sysfs_term_write(struct file *file, | |
489 | struct kobject *kobj, struct bin_attribute *attr, | |
490 | char *buf, loff_t off, size_t count) | |
491 | { | |
492 | struct fsi_slave *slave = to_fsi_slave(kobj_to_dev(kobj)); | |
493 | struct fsi_master *master = slave->master; | |
494 | ||
495 | if (!master->term) | |
496 | return -ENODEV; | |
497 | ||
498 | master->term(master, slave->link, slave->id); | |
499 | return count; | |
500 | } | |
501 | ||
502 | static struct bin_attribute fsi_slave_term_attr = { | |
503 | .attr = { | |
504 | .name = "term", | |
505 | .mode = 0200, | |
506 | }, | |
507 | .size = 0, | |
508 | .write = fsi_slave_sysfs_term_write, | |
509 | }; | |
510 | ||
2b37c3e2 CB |
511 | /* Encode slave local bus echo delay */ |
512 | static inline uint32_t fsi_smode_echodly(int x) | |
513 | { | |
514 | return (x & FSI_SMODE_ED_MASK) << FSI_SMODE_ED_SHIFT; | |
515 | } | |
516 | ||
517 | /* Encode slave local bus send delay */ | |
518 | static inline uint32_t fsi_smode_senddly(int x) | |
519 | { | |
520 | return (x & FSI_SMODE_SD_MASK) << FSI_SMODE_SD_SHIFT; | |
521 | } | |
522 | ||
523 | /* Encode slave local bus clock rate ratio */ | |
524 | static inline uint32_t fsi_smode_lbcrr(int x) | |
525 | { | |
526 | return (x & FSI_SMODE_LBCRR_MASK) << FSI_SMODE_LBCRR_SHIFT; | |
527 | } | |
528 | ||
529 | /* Encode slave ID */ | |
530 | static inline uint32_t fsi_smode_sid(int x) | |
531 | { | |
532 | return (x & FSI_SMODE_SID_MASK) << FSI_SMODE_SID_SHIFT; | |
533 | } | |
534 | ||
ceb8a12f | 535 | static uint32_t fsi_slave_smode(int id) |
2b37c3e2 CB |
536 | { |
537 | return FSI_SMODE_WSC | FSI_SMODE_ECRC | |
538 | | fsi_smode_sid(id) | |
539 | | fsi_smode_echodly(0xf) | fsi_smode_senddly(0xf) | |
540 | | fsi_smode_lbcrr(0x8); | |
541 | } | |
542 | ||
543 | static int fsi_slave_set_smode(struct fsi_master *master, int link, int id) | |
544 | { | |
545 | uint32_t smode; | |
546 | ||
547 | /* set our smode register with the slave ID field to 0; this enables | |
548 | * extended slave addressing | |
549 | */ | |
550 | smode = fsi_slave_smode(id); | |
551 | smode = cpu_to_be32(smode); | |
552 | ||
553 | return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SMODE, | |
554 | &smode, sizeof(smode)); | |
555 | } | |
556 | ||
2b545cd8 JK |
557 | static void fsi_slave_release(struct device *dev) |
558 | { | |
559 | struct fsi_slave *slave = to_fsi_slave(dev); | |
560 | ||
561 | kfree(slave); | |
562 | } | |
563 | ||
414c1026 JK |
564 | static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id) |
565 | { | |
4af889b0 | 566 | uint32_t chip_id, llmode; |
2b545cd8 | 567 | struct fsi_slave *slave; |
2b545cd8 JK |
568 | uint8_t crc; |
569 | int rc; | |
570 | ||
571 | /* Currently, we only support single slaves on a link, and use the | |
572 | * full 23-bit address range | |
573 | */ | |
574 | if (id != 0) | |
575 | return -EINVAL; | |
576 | ||
577 | rc = fsi_master_read(master, link, id, 0, &chip_id, sizeof(chip_id)); | |
578 | if (rc) { | |
579 | dev_dbg(&master->dev, "can't read slave %02x:%02x %d\n", | |
580 | link, id, rc); | |
581 | return -ENODEV; | |
582 | } | |
583 | chip_id = be32_to_cpu(chip_id); | |
584 | ||
585 | crc = crc4(0, chip_id, 32); | |
586 | if (crc) { | |
587 | dev_warn(&master->dev, "slave %02x:%02x invalid chip id CRC!\n", | |
588 | link, id); | |
589 | return -EIO; | |
590 | } | |
591 | ||
592 | dev_info(&master->dev, "fsi: found chip %08x at %02x:%02x:%02x\n", | |
593 | chip_id, master->idx, link, id); | |
594 | ||
2b37c3e2 CB |
595 | rc = fsi_slave_set_smode(master, link, id); |
596 | if (rc) { | |
597 | dev_warn(&master->dev, | |
598 | "can't set smode on slave:%02x:%02x %d\n", | |
599 | link, id, rc); | |
600 | return -ENODEV; | |
601 | } | |
602 | ||
4af889b0 JK |
603 | /* If we're behind a master that doesn't provide a self-running bus |
604 | * clock, put the slave into async mode | |
605 | */ | |
606 | if (master->flags & FSI_MASTER_FLAG_SWCLOCK) { | |
607 | llmode = cpu_to_be32(FSI_LLMODE_ASYNC); | |
608 | rc = fsi_master_write(master, link, id, | |
609 | FSI_SLAVE_BASE + FSI_LLMODE, | |
610 | &llmode, sizeof(llmode)); | |
611 | if (rc) | |
612 | dev_warn(&master->dev, | |
613 | "can't set llmode on slave:%02x:%02x %d\n", | |
614 | link, id, rc); | |
615 | } | |
616 | ||
2b545cd8 JK |
617 | /* We can communicate with a slave; create the slave device and |
618 | * register. | |
619 | */ | |
620 | slave = kzalloc(sizeof(*slave), GFP_KERNEL); | |
621 | if (!slave) | |
622 | return -ENOMEM; | |
623 | ||
624 | slave->master = master; | |
625 | slave->dev.parent = &master->dev; | |
626 | slave->dev.release = fsi_slave_release; | |
627 | slave->link = link; | |
628 | slave->id = id; | |
629 | slave->size = FSI_SLAVE_SIZE_23b; | |
630 | ||
631 | dev_set_name(&slave->dev, "slave@%02x:%02x", link, id); | |
632 | rc = device_register(&slave->dev); | |
633 | if (rc < 0) { | |
634 | dev_warn(&master->dev, "failed to create slave device: %d\n", | |
635 | rc); | |
636 | put_device(&slave->dev); | |
637 | return rc; | |
638 | } | |
639 | ||
125739cb JK |
640 | rc = device_create_bin_file(&slave->dev, &fsi_slave_raw_attr); |
641 | if (rc) | |
642 | dev_warn(&slave->dev, "failed to create raw attr: %d\n", rc); | |
643 | ||
644 | rc = device_create_bin_file(&slave->dev, &fsi_slave_term_attr); | |
645 | if (rc) | |
646 | dev_warn(&slave->dev, "failed to create term attr: %d\n", rc); | |
647 | ||
f7ade2a6 JK |
648 | rc = fsi_slave_scan(slave); |
649 | if (rc) | |
650 | dev_dbg(&master->dev, "failed during slave scan with: %d\n", | |
651 | rc); | |
414c1026 | 652 | |
2b545cd8 | 653 | return rc; |
414c1026 JK |
654 | } |
655 | ||
09aecfab | 656 | /* FSI master support */ |
014c2abc JK |
657 | static int fsi_check_access(uint32_t addr, size_t size) |
658 | { | |
659 | if (size != 1 && size != 2 && size != 4) | |
660 | return -EINVAL; | |
661 | ||
662 | if ((addr & 0x3) != (size & 0x3)) | |
663 | return -EINVAL; | |
664 | ||
665 | return 0; | |
666 | } | |
667 | ||
668 | static int fsi_master_read(struct fsi_master *master, int link, | |
669 | uint8_t slave_id, uint32_t addr, void *val, size_t size) | |
670 | { | |
671 | int rc; | |
672 | ||
66433b05 JK |
673 | trace_fsi_master_read(master, link, slave_id, addr, size); |
674 | ||
014c2abc | 675 | rc = fsi_check_access(addr, size); |
66433b05 JK |
676 | if (!rc) |
677 | rc = master->read(master, link, slave_id, addr, val, size); | |
678 | ||
679 | trace_fsi_master_rw_result(master, link, slave_id, addr, size, | |
680 | false, val, rc); | |
014c2abc | 681 | |
66433b05 | 682 | return rc; |
014c2abc JK |
683 | } |
684 | ||
685 | static int fsi_master_write(struct fsi_master *master, int link, | |
686 | uint8_t slave_id, uint32_t addr, const void *val, size_t size) | |
687 | { | |
688 | int rc; | |
689 | ||
66433b05 JK |
690 | trace_fsi_master_write(master, link, slave_id, addr, size, val); |
691 | ||
014c2abc | 692 | rc = fsi_check_access(addr, size); |
66433b05 JK |
693 | if (!rc) |
694 | rc = master->write(master, link, slave_id, addr, val, size); | |
014c2abc | 695 | |
66433b05 JK |
696 | trace_fsi_master_rw_result(master, link, slave_id, addr, size, |
697 | true, val, rc); | |
698 | ||
699 | return rc; | |
014c2abc JK |
700 | } |
701 | ||
26095282 CB |
702 | static int fsi_master_link_enable(struct fsi_master *master, int link) |
703 | { | |
704 | if (master->link_enable) | |
705 | return master->link_enable(master, link); | |
706 | ||
707 | return 0; | |
708 | } | |
709 | ||
710 | /* | |
711 | * Issue a break command on this link | |
712 | */ | |
713 | static int fsi_master_break(struct fsi_master *master, int link) | |
714 | { | |
66433b05 JK |
715 | trace_fsi_master_break(master, link); |
716 | ||
26095282 CB |
717 | if (master->send_break) |
718 | return master->send_break(master, link); | |
719 | ||
720 | return 0; | |
721 | } | |
722 | ||
414c1026 JK |
723 | static int fsi_master_scan(struct fsi_master *master) |
724 | { | |
26095282 CB |
725 | int link, rc; |
726 | ||
727 | for (link = 0; link < master->n_links; link++) { | |
728 | rc = fsi_master_link_enable(master, link); | |
729 | if (rc) { | |
730 | dev_dbg(&master->dev, | |
731 | "enable link %d failed: %d\n", link, rc); | |
732 | continue; | |
733 | } | |
734 | rc = fsi_master_break(master, link); | |
735 | if (rc) { | |
736 | dev_dbg(&master->dev, | |
737 | "break to link %d failed: %d\n", link, rc); | |
738 | continue; | |
739 | } | |
414c1026 | 740 | |
414c1026 | 741 | fsi_slave_init(master, link, 0); |
26095282 | 742 | } |
414c1026 JK |
743 | |
744 | return 0; | |
745 | } | |
746 | ||
cd0fdb5c CB |
747 | static int fsi_slave_remove_device(struct device *dev, void *arg) |
748 | { | |
749 | device_unregister(dev); | |
750 | return 0; | |
751 | } | |
752 | ||
753 | static int fsi_master_remove_slave(struct device *dev, void *arg) | |
754 | { | |
755 | device_for_each_child(dev, NULL, fsi_slave_remove_device); | |
756 | device_unregister(dev); | |
757 | return 0; | |
758 | } | |
759 | ||
760 | static void fsi_master_unscan(struct fsi_master *master) | |
761 | { | |
762 | device_for_each_child(&master->dev, NULL, fsi_master_remove_slave); | |
763 | } | |
764 | ||
765 | static ssize_t master_rescan_store(struct device *dev, | |
766 | struct device_attribute *attr, const char *buf, size_t count) | |
767 | { | |
768 | struct fsi_master *master = to_fsi_master(dev); | |
769 | int rc; | |
770 | ||
771 | fsi_master_unscan(master); | |
772 | rc = fsi_master_scan(master); | |
773 | if (rc < 0) | |
774 | return rc; | |
775 | ||
776 | return count; | |
777 | } | |
778 | ||
779 | static DEVICE_ATTR(rescan, 0200, NULL, master_rescan_store); | |
780 | ||
125739cb JK |
781 | static ssize_t master_break_store(struct device *dev, |
782 | struct device_attribute *attr, const char *buf, size_t count) | |
783 | { | |
784 | struct fsi_master *master = to_fsi_master(dev); | |
785 | ||
786 | fsi_master_break(master, 0); | |
787 | ||
788 | return count; | |
789 | } | |
790 | ||
791 | static DEVICE_ATTR(break, 0200, NULL, master_break_store); | |
792 | ||
09aecfab JK |
793 | int fsi_master_register(struct fsi_master *master) |
794 | { | |
795 | int rc; | |
796 | ||
797 | if (!master) | |
798 | return -EINVAL; | |
799 | ||
800 | master->idx = ida_simple_get(&master_ida, 0, INT_MAX, GFP_KERNEL); | |
801 | dev_set_name(&master->dev, "fsi%d", master->idx); | |
802 | ||
803 | rc = device_register(&master->dev); | |
414c1026 | 804 | if (rc) { |
09aecfab | 805 | ida_simple_remove(&master_ida, master->idx); |
414c1026 JK |
806 | return rc; |
807 | } | |
09aecfab | 808 | |
cd0fdb5c CB |
809 | rc = device_create_file(&master->dev, &dev_attr_rescan); |
810 | if (rc) { | |
811 | device_unregister(&master->dev); | |
812 | ida_simple_remove(&master_ida, master->idx); | |
813 | return rc; | |
814 | } | |
815 | ||
125739cb JK |
816 | rc = device_create_file(&master->dev, &dev_attr_break); |
817 | if (rc) { | |
818 | device_unregister(&master->dev); | |
819 | ida_simple_remove(&master_ida, master->idx); | |
820 | return rc; | |
821 | } | |
822 | ||
414c1026 | 823 | fsi_master_scan(master); |
cd0fdb5c | 824 | |
414c1026 | 825 | return 0; |
09aecfab JK |
826 | } |
827 | EXPORT_SYMBOL_GPL(fsi_master_register); | |
828 | ||
829 | void fsi_master_unregister(struct fsi_master *master) | |
830 | { | |
831 | if (master->idx >= 0) { | |
832 | ida_simple_remove(&master_ida, master->idx); | |
833 | master->idx = -1; | |
834 | } | |
835 | ||
cd0fdb5c | 836 | fsi_master_unscan(master); |
09aecfab JK |
837 | device_unregister(&master->dev); |
838 | } | |
839 | EXPORT_SYMBOL_GPL(fsi_master_unregister); | |
840 | ||
0508ad1f JK |
841 | /* FSI core & Linux bus type definitions */ |
842 | ||
dd37eed7 JK |
843 | static int fsi_bus_match(struct device *dev, struct device_driver *drv) |
844 | { | |
845 | struct fsi_device *fsi_dev = to_fsi_dev(dev); | |
846 | struct fsi_driver *fsi_drv = to_fsi_drv(drv); | |
847 | const struct fsi_device_id *id; | |
848 | ||
849 | if (!fsi_drv->id_table) | |
850 | return 0; | |
851 | ||
852 | for (id = fsi_drv->id_table; id->engine_type; id++) { | |
853 | if (id->engine_type != fsi_dev->engine_type) | |
854 | continue; | |
855 | if (id->version == FSI_VERSION_ANY || | |
856 | id->version == fsi_dev->version) | |
857 | return 1; | |
858 | } | |
859 | ||
860 | return 0; | |
861 | } | |
862 | ||
356d8009 CB |
863 | int fsi_driver_register(struct fsi_driver *fsi_drv) |
864 | { | |
865 | if (!fsi_drv) | |
866 | return -EINVAL; | |
867 | if (!fsi_drv->id_table) | |
868 | return -EINVAL; | |
869 | ||
870 | return driver_register(&fsi_drv->drv); | |
871 | } | |
872 | EXPORT_SYMBOL_GPL(fsi_driver_register); | |
873 | ||
874 | void fsi_driver_unregister(struct fsi_driver *fsi_drv) | |
875 | { | |
876 | driver_unregister(&fsi_drv->drv); | |
877 | } | |
878 | EXPORT_SYMBOL_GPL(fsi_driver_unregister); | |
879 | ||
0508ad1f JK |
880 | struct bus_type fsi_bus_type = { |
881 | .name = "fsi", | |
dd37eed7 | 882 | .match = fsi_bus_match, |
0508ad1f JK |
883 | }; |
884 | EXPORT_SYMBOL_GPL(fsi_bus_type); | |
885 | ||
496f8931 | 886 | static int __init fsi_init(void) |
0508ad1f JK |
887 | { |
888 | return bus_register(&fsi_bus_type); | |
889 | } | |
496f8931 | 890 | postcore_initcall(fsi_init); |
0508ad1f JK |
891 | |
892 | static void fsi_exit(void) | |
893 | { | |
894 | bus_unregister(&fsi_bus_type); | |
895 | } | |
0508ad1f | 896 | module_exit(fsi_exit); |
1fa847d7 | 897 | module_param(discard_errors, int, 0664); |
acb7e8f7 | 898 | MODULE_LICENSE("GPL"); |
1fa847d7 | 899 | MODULE_PARM_DESC(discard_errors, "Don't invoke error handling on bus accesses"); |