]>
Commit | Line | Data |
---|---|---|
ac0385d9 CB |
1 | /* |
2 | * A FSI master controller, using a simple GPIO bit-banging interface | |
3 | */ | |
4 | ||
5 | #include <linux/crc4.h> | |
6 | #include <linux/delay.h> | |
7 | #include <linux/device.h> | |
8 | #include <linux/fsi.h> | |
9 | #include <linux/gpio/consumer.h> | |
10 | #include <linux/io.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/spinlock.h> | |
15 | ||
16 | #include "fsi-master.h" | |
17 | ||
18 | #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ | |
19 | #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ | |
20 | #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ | |
21 | #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ | |
22 | #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */ | |
23 | #define FSI_INIT_CLOCKS 5000 /* Clock out any old data */ | |
24 | #define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */ | |
25 | /* todo: adjust down as low as */ | |
26 | /* possible or eliminate */ | |
27 | #define FSI_GPIO_CMD_DPOLL 0x2 | |
28 | #define FSI_GPIO_CMD_TERM 0x3f | |
29 | #define FSI_GPIO_CMD_ABS_AR 0x4 | |
30 | ||
31 | #define FSI_GPIO_DPOLL_CLOCKS 100 /* < 21 will cause slave to hang */ | |
32 | ||
33 | /* Bus errors */ | |
34 | #define FSI_GPIO_ERR_BUSY 1 /* Slave stuck in busy state */ | |
35 | #define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */ | |
36 | #define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */ | |
37 | #define FSI_GPIO_MTOE 4 /* Master time out error */ | |
38 | #define FSI_GPIO_CRC_INVAL 5 /* Master reports slave CRC error */ | |
39 | ||
40 | /* Normal slave responses */ | |
41 | #define FSI_GPIO_RESP_BUSY 1 | |
42 | #define FSI_GPIO_RESP_ACK 0 | |
43 | #define FSI_GPIO_RESP_ACKD 4 | |
44 | ||
45 | #define FSI_GPIO_MAX_BUSY 100 | |
46 | #define FSI_GPIO_MTOE_COUNT 1000 | |
47 | #define FSI_GPIO_DRAIN_BITS 20 | |
48 | #define FSI_GPIO_CRC_SIZE 4 | |
49 | #define FSI_GPIO_MSG_ID_SIZE 2 | |
50 | #define FSI_GPIO_MSG_RESPID_SIZE 2 | |
51 | #define FSI_GPIO_PRIME_SLAVE_CLOCKS 100 | |
52 | ||
53 | struct fsi_master_gpio { | |
54 | struct fsi_master master; | |
55 | struct device *dev; | |
56 | spinlock_t cmd_lock; /* Lock for commands */ | |
57 | struct gpio_desc *gpio_clk; | |
58 | struct gpio_desc *gpio_data; | |
59 | struct gpio_desc *gpio_trans; /* Voltage translator */ | |
60 | struct gpio_desc *gpio_enable; /* FSI enable */ | |
61 | struct gpio_desc *gpio_mux; /* Mux control */ | |
62 | }; | |
63 | ||
64 | #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master) | |
65 | ||
66 | struct fsi_gpio_msg { | |
67 | uint64_t msg; | |
68 | uint8_t bits; | |
69 | }; | |
70 | ||
71 | static void clock_toggle(struct fsi_master_gpio *master, int count) | |
72 | { | |
73 | int i; | |
74 | ||
75 | for (i = 0; i < count; i++) { | |
76 | ndelay(FSI_GPIO_STD_DLY); | |
77 | gpiod_set_value(master->gpio_clk, 0); | |
78 | ndelay(FSI_GPIO_STD_DLY); | |
79 | gpiod_set_value(master->gpio_clk, 1); | |
80 | } | |
81 | } | |
82 | ||
83 | static int sda_in(struct fsi_master_gpio *master) | |
84 | { | |
85 | int in; | |
86 | ||
87 | ndelay(FSI_GPIO_STD_DLY); | |
88 | in = gpiod_get_value(master->gpio_data); | |
89 | return in ? 1 : 0; | |
90 | } | |
91 | ||
92 | static void sda_out(struct fsi_master_gpio *master, int value) | |
93 | { | |
94 | gpiod_set_value(master->gpio_data, value); | |
95 | } | |
96 | ||
97 | static void set_sda_input(struct fsi_master_gpio *master) | |
98 | { | |
99 | gpiod_direction_input(master->gpio_data); | |
100 | gpiod_set_value(master->gpio_trans, 0); | |
101 | } | |
102 | ||
103 | static void set_sda_output(struct fsi_master_gpio *master, int value) | |
104 | { | |
105 | gpiod_set_value(master->gpio_trans, 1); | |
106 | gpiod_direction_output(master->gpio_data, value); | |
107 | } | |
108 | ||
109 | static void clock_zeros(struct fsi_master_gpio *master, int count) | |
110 | { | |
111 | set_sda_output(master, 1); | |
112 | clock_toggle(master, count); | |
113 | } | |
114 | ||
115 | static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg, | |
116 | uint8_t num_bits) | |
117 | { | |
118 | uint8_t bit, in_bit; | |
119 | ||
120 | set_sda_input(master); | |
121 | ||
122 | for (bit = 0; bit < num_bits; bit++) { | |
123 | clock_toggle(master, 1); | |
124 | in_bit = sda_in(master); | |
125 | msg->msg <<= 1; | |
126 | msg->msg |= ~in_bit & 0x1; /* Data is active low */ | |
127 | } | |
128 | msg->bits += num_bits; | |
129 | } | |
130 | ||
131 | static void serial_out(struct fsi_master_gpio *master, | |
132 | const struct fsi_gpio_msg *cmd) | |
133 | { | |
134 | uint8_t bit; | |
135 | uint64_t msg = ~cmd->msg; /* Data is active low */ | |
136 | uint64_t sda_mask = 0x1ULL << (cmd->bits - 1); | |
137 | uint64_t last_bit = ~0; | |
138 | int next_bit; | |
139 | ||
140 | if (!cmd->bits) { | |
141 | dev_warn(master->dev, "trying to output 0 bits\n"); | |
142 | return; | |
143 | } | |
144 | set_sda_output(master, 0); | |
145 | ||
146 | /* Send the start bit */ | |
147 | sda_out(master, 0); | |
148 | clock_toggle(master, 1); | |
149 | ||
150 | /* Send the message */ | |
151 | for (bit = 0; bit < cmd->bits; bit++) { | |
152 | next_bit = (msg & sda_mask) >> (cmd->bits - 1); | |
153 | if (last_bit ^ next_bit) { | |
154 | sda_out(master, next_bit); | |
155 | last_bit = next_bit; | |
156 | } | |
157 | clock_toggle(master, 1); | |
158 | msg <<= 1; | |
159 | } | |
160 | } | |
161 | ||
162 | static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits) | |
163 | { | |
164 | msg->msg <<= bits; | |
165 | msg->msg |= data & ((1ull << bits) - 1); | |
166 | msg->bits += bits; | |
167 | } | |
168 | ||
169 | static void msg_push_crc(struct fsi_gpio_msg *msg) | |
170 | { | |
171 | uint8_t crc; | |
172 | int top; | |
173 | ||
174 | top = msg->bits & 0x3; | |
175 | ||
176 | /* start bit, and any non-aligned top bits */ | |
177 | crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1); | |
178 | ||
179 | /* aligned bits */ | |
180 | crc = crc4(crc, msg->msg, msg->bits - top); | |
181 | ||
182 | msg_push_bits(msg, crc, 4); | |
183 | } | |
184 | ||
185 | /* | |
186 | * Encode an Absolute Address command | |
187 | */ | |
188 | static void build_abs_ar_command(struct fsi_gpio_msg *cmd, | |
189 | uint8_t id, uint32_t addr, size_t size, const void *data) | |
190 | { | |
191 | bool write = !!data; | |
192 | uint8_t ds; | |
193 | int i; | |
194 | ||
195 | cmd->bits = 0; | |
196 | cmd->msg = 0; | |
197 | ||
198 | msg_push_bits(cmd, id, 2); | |
199 | msg_push_bits(cmd, FSI_GPIO_CMD_ABS_AR, 3); | |
200 | msg_push_bits(cmd, write ? 0 : 1, 1); | |
201 | ||
202 | /* | |
203 | * The read/write size is encoded in the lower bits of the address | |
204 | * (as it must be naturally-aligned), and the following ds bit. | |
205 | * | |
206 | * size addr:1 addr:0 ds | |
207 | * 1 x x 0 | |
208 | * 2 x 0 1 | |
209 | * 4 0 1 1 | |
210 | * | |
211 | */ | |
212 | ds = size > 1 ? 1 : 0; | |
213 | addr &= ~(size - 1); | |
214 | if (size == 4) | |
215 | addr |= 1; | |
216 | ||
217 | msg_push_bits(cmd, addr & ((1 << 21) - 1), 21); | |
218 | msg_push_bits(cmd, ds, 1); | |
219 | for (i = 0; write && i < size; i++) | |
220 | msg_push_bits(cmd, ((uint8_t *)data)[i], 8); | |
221 | ||
222 | msg_push_crc(cmd); | |
223 | } | |
224 | ||
225 | static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) | |
226 | { | |
227 | cmd->bits = 0; | |
228 | cmd->msg = 0; | |
229 | ||
230 | msg_push_bits(cmd, slave_id, 2); | |
231 | msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3); | |
232 | msg_push_crc(cmd); | |
233 | } | |
234 | ||
235 | static void echo_delay(struct fsi_master_gpio *master) | |
236 | { | |
237 | set_sda_output(master, 1); | |
238 | clock_toggle(master, FSI_ECHO_DELAY_CLOCKS); | |
239 | } | |
240 | ||
241 | static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) | |
242 | { | |
243 | cmd->bits = 0; | |
244 | cmd->msg = 0; | |
245 | ||
246 | msg_push_bits(cmd, slave_id, 2); | |
247 | msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6); | |
248 | msg_push_crc(cmd); | |
249 | } | |
250 | ||
251 | /* | |
252 | * Store information on master errors so handler can detect and clean | |
253 | * up the bus | |
254 | */ | |
255 | static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error) | |
256 | { | |
257 | ||
258 | } | |
259 | ||
260 | static int read_one_response(struct fsi_master_gpio *master, | |
261 | uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp) | |
262 | { | |
263 | struct fsi_gpio_msg msg; | |
264 | uint8_t id, tag; | |
265 | uint32_t crc; | |
266 | int i; | |
267 | ||
268 | /* wait for the start bit */ | |
269 | for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) { | |
270 | msg.bits = 0; | |
271 | msg.msg = 0; | |
272 | serial_in(master, &msg, 1); | |
273 | if (msg.msg) | |
274 | break; | |
275 | } | |
276 | if (i == FSI_GPIO_MTOE_COUNT) { | |
277 | dev_dbg(master->dev, | |
278 | "Master time out waiting for response\n"); | |
279 | fsi_master_gpio_error(master, FSI_GPIO_MTOE); | |
280 | return -EIO; | |
281 | } | |
282 | ||
283 | msg.bits = 0; | |
284 | msg.msg = 0; | |
285 | ||
286 | /* Read slave ID & response tag */ | |
287 | serial_in(master, &msg, 4); | |
288 | ||
289 | id = (msg.msg >> FSI_GPIO_MSG_RESPID_SIZE) & 0x3; | |
290 | tag = msg.msg & 0x3; | |
291 | ||
292 | /* If we have an ACK and we're expecting data, clock the data in too */ | |
293 | if (tag == FSI_GPIO_RESP_ACK && data_size) | |
294 | serial_in(master, &msg, data_size * 8); | |
295 | ||
296 | /* read CRC */ | |
297 | serial_in(master, &msg, FSI_GPIO_CRC_SIZE); | |
298 | ||
299 | /* we have a whole message now; check CRC */ | |
300 | crc = crc4(0, 1, 1); | |
301 | crc = crc4(crc, msg.msg, msg.bits); | |
302 | if (crc) { | |
303 | dev_dbg(master->dev, "ERR response CRC\n"); | |
304 | fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL); | |
305 | return -EIO; | |
306 | } | |
307 | ||
308 | if (msgp) | |
309 | *msgp = msg; | |
310 | if (tagp) | |
311 | *tagp = tag; | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
316 | static int issue_term(struct fsi_master_gpio *master, uint8_t slave) | |
317 | { | |
318 | struct fsi_gpio_msg cmd; | |
319 | uint8_t tag; | |
320 | int rc; | |
321 | ||
322 | build_term_command(&cmd, slave); | |
323 | serial_out(master, &cmd); | |
324 | echo_delay(master); | |
325 | ||
326 | rc = read_one_response(master, 0, NULL, &tag); | |
327 | if (rc < 0) { | |
328 | dev_err(master->dev, | |
329 | "TERM failed; lost communication with slave\n"); | |
330 | return -EIO; | |
331 | } else if (tag != FSI_GPIO_RESP_ACK) { | |
332 | dev_err(master->dev, "TERM failed; response %d\n", tag); | |
333 | return -EIO; | |
334 | } | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | static int poll_for_response(struct fsi_master_gpio *master, | |
340 | uint8_t slave, uint8_t size, void *data) | |
341 | { | |
342 | struct fsi_gpio_msg response, cmd; | |
343 | int busy_count = 0, rc, i; | |
344 | uint8_t tag; | |
345 | uint8_t *data_byte = data; | |
346 | ||
347 | retry: | |
348 | rc = read_one_response(master, size, &response, &tag); | |
349 | if (rc) | |
350 | return rc; | |
351 | ||
352 | switch (tag) { | |
353 | case FSI_GPIO_RESP_ACK: | |
354 | if (size && data) { | |
355 | uint64_t val = response.msg; | |
356 | /* clear crc & mask */ | |
357 | val >>= 4; | |
358 | val &= (1ull << (size * 8)) - 1; | |
359 | ||
360 | for (i = 0; i < size; i++) { | |
361 | data_byte[size-i-1] = val; | |
362 | val >>= 8; | |
363 | } | |
364 | } | |
365 | break; | |
366 | case FSI_GPIO_RESP_BUSY: | |
367 | /* | |
368 | * Its necessary to clock slave before issuing | |
369 | * d-poll, not indicated in the hardware protocol | |
370 | * spec. < 20 clocks causes slave to hang, 21 ok. | |
371 | */ | |
372 | clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS); | |
373 | if (busy_count++ < FSI_GPIO_MAX_BUSY) { | |
374 | build_dpoll_command(&cmd, slave); | |
375 | serial_out(master, &cmd); | |
376 | echo_delay(master); | |
377 | goto retry; | |
378 | } | |
379 | dev_warn(master->dev, | |
380 | "ERR slave is stuck in busy state, issuing TERM\n"); | |
381 | issue_term(master, slave); | |
382 | rc = -EIO; | |
383 | break; | |
384 | ||
385 | case FSI_GPIO_RESP_ERRA: | |
386 | case FSI_GPIO_RESP_ERRC: | |
387 | dev_dbg(master->dev, "ERR%c received: 0x%x\n", | |
388 | tag == FSI_GPIO_RESP_ERRA ? 'A' : 'C', | |
389 | (int)response.msg); | |
390 | fsi_master_gpio_error(master, response.msg); | |
391 | rc = -EIO; | |
392 | break; | |
393 | } | |
394 | ||
395 | /* Clock the slave enough to be ready for next operation */ | |
396 | clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS); | |
397 | return rc; | |
398 | } | |
399 | ||
400 | static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave, | |
401 | struct fsi_gpio_msg *cmd, size_t resp_len, void *resp) | |
402 | { | |
403 | unsigned long flags; | |
404 | int rc; | |
405 | ||
406 | spin_lock_irqsave(&master->cmd_lock, flags); | |
407 | serial_out(master, cmd); | |
408 | echo_delay(master); | |
409 | rc = poll_for_response(master, slave, resp_len, resp); | |
410 | spin_unlock_irqrestore(&master->cmd_lock, flags); | |
411 | ||
412 | return rc; | |
413 | } | |
414 | ||
415 | static int fsi_master_gpio_read(struct fsi_master *_master, int link, | |
416 | uint8_t id, uint32_t addr, void *val, size_t size) | |
417 | { | |
418 | struct fsi_master_gpio *master = to_fsi_master_gpio(_master); | |
419 | struct fsi_gpio_msg cmd; | |
420 | ||
421 | if (link != 0) | |
422 | return -ENODEV; | |
423 | ||
424 | build_abs_ar_command(&cmd, id, addr, size, NULL); | |
425 | return fsi_master_gpio_xfer(master, id, &cmd, size, val); | |
426 | } | |
427 | ||
428 | static int fsi_master_gpio_write(struct fsi_master *_master, int link, | |
429 | uint8_t id, uint32_t addr, const void *val, size_t size) | |
430 | { | |
431 | struct fsi_master_gpio *master = to_fsi_master_gpio(_master); | |
432 | struct fsi_gpio_msg cmd; | |
433 | ||
434 | if (link != 0) | |
435 | return -ENODEV; | |
436 | ||
437 | build_abs_ar_command(&cmd, id, addr, size, val); | |
438 | return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); | |
439 | } | |
440 | ||
441 | static int fsi_master_gpio_term(struct fsi_master *_master, | |
442 | int link, uint8_t id) | |
443 | { | |
444 | struct fsi_master_gpio *master = to_fsi_master_gpio(_master); | |
445 | struct fsi_gpio_msg cmd; | |
446 | ||
447 | if (link != 0) | |
448 | return -ENODEV; | |
449 | ||
450 | build_term_command(&cmd, id); | |
451 | return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); | |
452 | } | |
453 | ||
454 | static int fsi_master_gpio_break(struct fsi_master *_master, int link) | |
455 | { | |
456 | struct fsi_master_gpio *master = to_fsi_master_gpio(_master); | |
457 | ||
458 | if (link != 0) | |
459 | return -ENODEV; | |
460 | ||
461 | set_sda_output(master, 1); | |
462 | sda_out(master, 1); | |
463 | clock_toggle(master, FSI_PRE_BREAK_CLOCKS); | |
464 | sda_out(master, 0); | |
465 | clock_toggle(master, FSI_BREAK_CLOCKS); | |
466 | echo_delay(master); | |
467 | sda_out(master, 1); | |
468 | clock_toggle(master, FSI_POST_BREAK_CLOCKS); | |
469 | ||
470 | /* Wait for logic reset to take effect */ | |
471 | udelay(200); | |
472 | ||
473 | return 0; | |
474 | } | |
475 | ||
476 | static void fsi_master_gpio_init(struct fsi_master_gpio *master) | |
477 | { | |
478 | gpiod_direction_output(master->gpio_mux, 1); | |
479 | gpiod_direction_output(master->gpio_trans, 1); | |
480 | gpiod_direction_output(master->gpio_enable, 1); | |
481 | gpiod_direction_output(master->gpio_clk, 1); | |
482 | gpiod_direction_output(master->gpio_data, 1); | |
483 | ||
484 | /* todo: evaluate if clocks can be reduced */ | |
485 | clock_zeros(master, FSI_INIT_CLOCKS); | |
486 | } | |
487 | ||
488 | static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link) | |
489 | { | |
490 | struct fsi_master_gpio *master = to_fsi_master_gpio(_master); | |
491 | ||
492 | if (link != 0) | |
493 | return -ENODEV; | |
494 | gpiod_set_value(master->gpio_enable, 1); | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
499 | static int fsi_master_gpio_probe(struct platform_device *pdev) | |
500 | { | |
501 | struct fsi_master_gpio *master; | |
502 | struct gpio_desc *gpio; | |
503 | ||
504 | master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); | |
505 | if (!master) | |
506 | return -ENOMEM; | |
507 | ||
508 | master->dev = &pdev->dev; | |
509 | master->master.dev.parent = master->dev; | |
510 | ||
511 | gpio = devm_gpiod_get(&pdev->dev, "clock", 0); | |
512 | if (IS_ERR(gpio)) { | |
513 | dev_err(&pdev->dev, "failed to get clock gpio\n"); | |
514 | return PTR_ERR(gpio); | |
515 | } | |
516 | master->gpio_clk = gpio; | |
517 | ||
518 | gpio = devm_gpiod_get(&pdev->dev, "data", 0); | |
519 | if (IS_ERR(gpio)) { | |
520 | dev_err(&pdev->dev, "failed to get data gpio\n"); | |
521 | return PTR_ERR(gpio); | |
522 | } | |
523 | master->gpio_data = gpio; | |
524 | ||
525 | /* Optional GPIOs */ | |
526 | gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0); | |
527 | if (IS_ERR(gpio)) { | |
528 | dev_err(&pdev->dev, "failed to get trans gpio\n"); | |
529 | return PTR_ERR(gpio); | |
530 | } | |
531 | master->gpio_trans = gpio; | |
532 | ||
533 | gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0); | |
534 | if (IS_ERR(gpio)) { | |
535 | dev_err(&pdev->dev, "failed to get enable gpio\n"); | |
536 | return PTR_ERR(gpio); | |
537 | } | |
538 | master->gpio_enable = gpio; | |
539 | ||
540 | gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0); | |
541 | if (IS_ERR(gpio)) { | |
542 | dev_err(&pdev->dev, "failed to get mux gpio\n"); | |
543 | return PTR_ERR(gpio); | |
544 | } | |
545 | master->gpio_mux = gpio; | |
546 | ||
547 | master->master.n_links = 1; | |
548 | master->master.read = fsi_master_gpio_read; | |
549 | master->master.write = fsi_master_gpio_write; | |
550 | master->master.term = fsi_master_gpio_term; | |
551 | master->master.send_break = fsi_master_gpio_break; | |
552 | master->master.link_enable = fsi_master_gpio_link_enable; | |
553 | platform_set_drvdata(pdev, master); | |
554 | spin_lock_init(&master->cmd_lock); | |
555 | ||
556 | fsi_master_gpio_init(master); | |
557 | ||
558 | return fsi_master_register(&master->master); | |
559 | } | |
560 | ||
561 | ||
562 | static int fsi_master_gpio_remove(struct platform_device *pdev) | |
563 | { | |
564 | struct fsi_master_gpio *master = platform_get_drvdata(pdev); | |
565 | ||
566 | devm_gpiod_put(&pdev->dev, master->gpio_clk); | |
567 | devm_gpiod_put(&pdev->dev, master->gpio_data); | |
568 | if (master->gpio_trans) | |
569 | devm_gpiod_put(&pdev->dev, master->gpio_trans); | |
570 | if (master->gpio_enable) | |
571 | devm_gpiod_put(&pdev->dev, master->gpio_enable); | |
572 | if (master->gpio_mux) | |
573 | devm_gpiod_put(&pdev->dev, master->gpio_mux); | |
574 | fsi_master_unregister(&master->master); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
579 | static const struct of_device_id fsi_master_gpio_match[] = { | |
580 | { .compatible = "fsi-master-gpio" }, | |
581 | { }, | |
582 | }; | |
583 | ||
584 | static struct platform_driver fsi_master_gpio_driver = { | |
585 | .driver = { | |
586 | .name = "fsi-master-gpio", | |
587 | .of_match_table = fsi_master_gpio_match, | |
588 | }, | |
589 | .probe = fsi_master_gpio_probe, | |
590 | .remove = fsi_master_gpio_remove, | |
591 | }; | |
592 | ||
593 | module_platform_driver(fsi_master_gpio_driver); | |
594 | MODULE_LICENSE("GPL"); |