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Commit | Line | Data |
---|---|---|
80884094 MH |
1 | /* |
2 | * GPIO Chip driver for Analog Devices | |
459773ae | 3 | * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller |
80884094 | 4 | * |
459773ae | 5 | * Copyright 2009-2010 Analog Devices Inc. |
80884094 MH |
6 | * |
7 | * Licensed under the GPL-2 or later. | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/kernel.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
80884094 MH |
13 | #include <linux/init.h> |
14 | #include <linux/i2c.h> | |
15 | #include <linux/gpio.h> | |
459773ae MH |
16 | #include <linux/interrupt.h> |
17 | #include <linux/irq.h> | |
80884094 MH |
18 | |
19 | #include <linux/i2c/adp5588.h> | |
20 | ||
459773ae MH |
21 | #define DRV_NAME "adp5588-gpio" |
22 | ||
23 | /* | |
24 | * Early pre 4.0 Silicon required to delay readout by at least 25ms, | |
25 | * since the Event Counter Register updated 25ms after the interrupt | |
26 | * asserted. | |
27 | */ | |
28 | #define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4) | |
80884094 MH |
29 | |
30 | struct adp5588_gpio { | |
31 | struct i2c_client *client; | |
32 | struct gpio_chip gpio_chip; | |
33 | struct mutex lock; /* protect cached dir, dat_out */ | |
459773ae MH |
34 | /* protect serialized access to the interrupt controller bus */ |
35 | struct mutex irq_lock; | |
80884094 | 36 | unsigned gpio_start; |
459773ae | 37 | unsigned irq_base; |
80884094 MH |
38 | uint8_t dat_out[3]; |
39 | uint8_t dir[3]; | |
459773ae MH |
40 | uint8_t int_lvl[3]; |
41 | uint8_t int_en[3]; | |
42 | uint8_t irq_mask[3]; | |
43 | uint8_t irq_stat[3]; | |
80884094 MH |
44 | }; |
45 | ||
46 | static int adp5588_gpio_read(struct i2c_client *client, u8 reg) | |
47 | { | |
48 | int ret = i2c_smbus_read_byte_data(client, reg); | |
49 | ||
50 | if (ret < 0) | |
51 | dev_err(&client->dev, "Read Error\n"); | |
52 | ||
53 | return ret; | |
54 | } | |
55 | ||
56 | static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val) | |
57 | { | |
58 | int ret = i2c_smbus_write_byte_data(client, reg, val); | |
59 | ||
60 | if (ret < 0) | |
61 | dev_err(&client->dev, "Write Error\n"); | |
62 | ||
63 | return ret; | |
64 | } | |
65 | ||
66 | static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off) | |
67 | { | |
68 | struct adp5588_gpio *dev = | |
69 | container_of(chip, struct adp5588_gpio, gpio_chip); | |
992196f2 JFD |
70 | unsigned bank = ADP5588_BANK(off); |
71 | unsigned bit = ADP5588_BIT(off); | |
72 | int val; | |
80884094 | 73 | |
992196f2 JFD |
74 | mutex_lock(&dev->lock); |
75 | ||
76 | if (dev->dir[bank] & bit) | |
77 | val = dev->dat_out[bank]; | |
78 | else | |
79 | val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); | |
80 | ||
81 | mutex_unlock(&dev->lock); | |
82 | ||
83 | return !!(val & bit); | |
80884094 MH |
84 | } |
85 | ||
86 | static void adp5588_gpio_set_value(struct gpio_chip *chip, | |
87 | unsigned off, int val) | |
88 | { | |
89 | unsigned bank, bit; | |
90 | struct adp5588_gpio *dev = | |
91 | container_of(chip, struct adp5588_gpio, gpio_chip); | |
92 | ||
459773ae MH |
93 | bank = ADP5588_BANK(off); |
94 | bit = ADP5588_BIT(off); | |
80884094 MH |
95 | |
96 | mutex_lock(&dev->lock); | |
97 | if (val) | |
98 | dev->dat_out[bank] |= bit; | |
99 | else | |
100 | dev->dat_out[bank] &= ~bit; | |
101 | ||
102 | adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
103 | dev->dat_out[bank]); | |
104 | mutex_unlock(&dev->lock); | |
105 | } | |
106 | ||
107 | static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off) | |
108 | { | |
109 | int ret; | |
110 | unsigned bank; | |
111 | struct adp5588_gpio *dev = | |
112 | container_of(chip, struct adp5588_gpio, gpio_chip); | |
113 | ||
459773ae | 114 | bank = ADP5588_BANK(off); |
80884094 MH |
115 | |
116 | mutex_lock(&dev->lock); | |
459773ae | 117 | dev->dir[bank] &= ~ADP5588_BIT(off); |
80884094 MH |
118 | ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); |
119 | mutex_unlock(&dev->lock); | |
120 | ||
121 | return ret; | |
122 | } | |
123 | ||
124 | static int adp5588_gpio_direction_output(struct gpio_chip *chip, | |
125 | unsigned off, int val) | |
126 | { | |
127 | int ret; | |
128 | unsigned bank, bit; | |
129 | struct adp5588_gpio *dev = | |
130 | container_of(chip, struct adp5588_gpio, gpio_chip); | |
131 | ||
459773ae MH |
132 | bank = ADP5588_BANK(off); |
133 | bit = ADP5588_BIT(off); | |
80884094 MH |
134 | |
135 | mutex_lock(&dev->lock); | |
136 | dev->dir[bank] |= bit; | |
137 | ||
138 | if (val) | |
139 | dev->dat_out[bank] |= bit; | |
140 | else | |
141 | dev->dat_out[bank] &= ~bit; | |
142 | ||
143 | ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, | |
144 | dev->dat_out[bank]); | |
145 | ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, | |
146 | dev->dir[bank]); | |
147 | mutex_unlock(&dev->lock); | |
148 | ||
149 | return ret; | |
150 | } | |
151 | ||
459773ae MH |
152 | #ifdef CONFIG_GPIO_ADP5588_IRQ |
153 | static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off) | |
154 | { | |
155 | struct adp5588_gpio *dev = | |
156 | container_of(chip, struct adp5588_gpio, gpio_chip); | |
157 | return dev->irq_base + off; | |
158 | } | |
159 | ||
12401eed | 160 | static void adp5588_irq_bus_lock(struct irq_data *d) |
459773ae | 161 | { |
12401eed LB |
162 | struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
163 | ||
459773ae MH |
164 | mutex_lock(&dev->irq_lock); |
165 | } | |
166 | ||
167 | /* | |
168 | * genirq core code can issue chip->mask/unmask from atomic context. | |
169 | * This doesn't work for slow busses where an access needs to sleep. | |
170 | * bus_sync_unlock() is therefore called outside the atomic context, | |
171 | * syncs the current irq mask state with the slow external controller | |
172 | * and unlocks the bus. | |
173 | */ | |
174 | ||
12401eed | 175 | static void adp5588_irq_bus_sync_unlock(struct irq_data *d) |
459773ae | 176 | { |
12401eed | 177 | struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
459773ae MH |
178 | int i; |
179 | ||
180 | for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) | |
181 | if (dev->int_en[i] ^ dev->irq_mask[i]) { | |
182 | dev->int_en[i] = dev->irq_mask[i]; | |
183 | adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i, | |
184 | dev->int_en[i]); | |
185 | } | |
186 | ||
187 | mutex_unlock(&dev->irq_lock); | |
188 | } | |
189 | ||
12401eed | 190 | static void adp5588_irq_mask(struct irq_data *d) |
459773ae | 191 | { |
12401eed LB |
192 | struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
193 | unsigned gpio = d->irq - dev->irq_base; | |
459773ae MH |
194 | |
195 | dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio); | |
196 | } | |
197 | ||
12401eed | 198 | static void adp5588_irq_unmask(struct irq_data *d) |
459773ae | 199 | { |
12401eed LB |
200 | struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
201 | unsigned gpio = d->irq - dev->irq_base; | |
459773ae MH |
202 | |
203 | dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio); | |
204 | } | |
205 | ||
12401eed | 206 | static int adp5588_irq_set_type(struct irq_data *d, unsigned int type) |
459773ae | 207 | { |
12401eed LB |
208 | struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
209 | uint16_t gpio = d->irq - dev->irq_base; | |
459773ae MH |
210 | unsigned bank, bit; |
211 | ||
212 | if ((type & IRQ_TYPE_EDGE_BOTH)) { | |
213 | dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", | |
12401eed | 214 | d->irq, type); |
459773ae MH |
215 | return -EINVAL; |
216 | } | |
217 | ||
218 | bank = ADP5588_BANK(gpio); | |
219 | bit = ADP5588_BIT(gpio); | |
220 | ||
221 | if (type & IRQ_TYPE_LEVEL_HIGH) | |
222 | dev->int_lvl[bank] |= bit; | |
223 | else if (type & IRQ_TYPE_LEVEL_LOW) | |
224 | dev->int_lvl[bank] &= ~bit; | |
225 | else | |
226 | return -EINVAL; | |
227 | ||
228 | adp5588_gpio_direction_input(&dev->gpio_chip, gpio); | |
229 | adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank, | |
230 | dev->int_lvl[bank]); | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | static struct irq_chip adp5588_irq_chip = { | |
236 | .name = "adp5588", | |
12401eed LB |
237 | .irq_mask = adp5588_irq_mask, |
238 | .irq_unmask = adp5588_irq_unmask, | |
239 | .irq_bus_lock = adp5588_irq_bus_lock, | |
240 | .irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock, | |
241 | .irq_set_type = adp5588_irq_set_type, | |
459773ae MH |
242 | }; |
243 | ||
244 | static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf) | |
245 | { | |
246 | int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf); | |
247 | ||
248 | if (ret < 0) | |
249 | dev_err(&client->dev, "Read INT_STAT Error\n"); | |
250 | ||
251 | return ret; | |
252 | } | |
253 | ||
254 | static irqreturn_t adp5588_irq_handler(int irq, void *devid) | |
255 | { | |
256 | struct adp5588_gpio *dev = devid; | |
257 | unsigned status, bank, bit, pending; | |
258 | int ret; | |
259 | status = adp5588_gpio_read(dev->client, INT_STAT); | |
260 | ||
261 | if (status & ADP5588_GPI_INT) { | |
262 | ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat); | |
263 | if (ret < 0) | |
264 | memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); | |
265 | ||
078dc65e | 266 | for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); |
459773ae MH |
267 | bank++, bit = 0) { |
268 | pending = dev->irq_stat[bank] & dev->irq_mask[bank]; | |
269 | ||
270 | while (pending) { | |
271 | if (pending & (1 << bit)) { | |
272 | handle_nested_irq(dev->irq_base + | |
273 | (bank << 3) + bit); | |
274 | pending &= ~(1 << bit); | |
275 | ||
276 | } | |
277 | bit++; | |
278 | } | |
279 | } | |
280 | } | |
281 | ||
282 | adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */ | |
283 | ||
284 | return IRQ_HANDLED; | |
285 | } | |
286 | ||
287 | static int adp5588_irq_setup(struct adp5588_gpio *dev) | |
288 | { | |
289 | struct i2c_client *client = dev->client; | |
e56aee18 JH |
290 | struct adp5588_gpio_platform_data *pdata = |
291 | dev_get_platdata(&client->dev); | |
459773ae MH |
292 | unsigned gpio; |
293 | int ret; | |
294 | ||
295 | adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC); | |
296 | adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */ | |
297 | adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */ | |
298 | ||
299 | dev->irq_base = pdata->irq_base; | |
300 | mutex_init(&dev->irq_lock); | |
301 | ||
302 | for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) { | |
303 | int irq = gpio + dev->irq_base; | |
b51804bc TG |
304 | irq_set_chip_data(irq, dev); |
305 | irq_set_chip_and_handler(irq, &adp5588_irq_chip, | |
459773ae | 306 | handle_level_irq); |
b51804bc | 307 | irq_set_nested_thread(irq, 1); |
459773ae MH |
308 | #ifdef CONFIG_ARM |
309 | /* | |
310 | * ARM needs us to explicitly flag the IRQ as VALID, | |
311 | * once we do so, it will also set the noprobe. | |
312 | */ | |
313 | set_irq_flags(irq, IRQF_VALID); | |
314 | #else | |
b51804bc | 315 | irq_set_noprobe(irq); |
459773ae MH |
316 | #endif |
317 | } | |
318 | ||
319 | ret = request_threaded_irq(client->irq, | |
320 | NULL, | |
321 | adp5588_irq_handler, | |
322 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | |
323 | dev_name(&client->dev), dev); | |
324 | if (ret) { | |
325 | dev_err(&client->dev, "failed to request irq %d\n", | |
326 | client->irq); | |
327 | goto out; | |
328 | } | |
329 | ||
330 | dev->gpio_chip.to_irq = adp5588_gpio_to_irq; | |
331 | adp5588_gpio_write(client, CFG, | |
332 | ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT); | |
333 | ||
334 | return 0; | |
335 | ||
336 | out: | |
337 | dev->irq_base = 0; | |
338 | return ret; | |
339 | } | |
340 | ||
341 | static void adp5588_irq_teardown(struct adp5588_gpio *dev) | |
342 | { | |
343 | if (dev->irq_base) | |
344 | free_irq(dev->client->irq, dev); | |
345 | } | |
346 | ||
347 | #else | |
348 | static int adp5588_irq_setup(struct adp5588_gpio *dev) | |
349 | { | |
350 | struct i2c_client *client = dev->client; | |
351 | dev_warn(&client->dev, "interrupt support not compiled in\n"); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | static void adp5588_irq_teardown(struct adp5588_gpio *dev) | |
357 | { | |
358 | } | |
359 | #endif /* CONFIG_GPIO_ADP5588_IRQ */ | |
360 | ||
3836309d | 361 | static int adp5588_gpio_probe(struct i2c_client *client, |
80884094 MH |
362 | const struct i2c_device_id *id) |
363 | { | |
e56aee18 JH |
364 | struct adp5588_gpio_platform_data *pdata = |
365 | dev_get_platdata(&client->dev); | |
80884094 MH |
366 | struct adp5588_gpio *dev; |
367 | struct gpio_chip *gc; | |
368 | int ret, i, revid; | |
369 | ||
370 | if (pdata == NULL) { | |
371 | dev_err(&client->dev, "missing platform data\n"); | |
372 | return -ENODEV; | |
373 | } | |
374 | ||
375 | if (!i2c_check_functionality(client->adapter, | |
376 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
377 | dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); | |
378 | return -EIO; | |
379 | } | |
380 | ||
381 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1a25908d | 382 | if (dev == NULL) |
80884094 | 383 | return -ENOMEM; |
80884094 MH |
384 | |
385 | dev->client = client; | |
386 | ||
387 | gc = &dev->gpio_chip; | |
388 | gc->direction_input = adp5588_gpio_direction_input; | |
389 | gc->direction_output = adp5588_gpio_direction_output; | |
390 | gc->get = adp5588_gpio_get_value; | |
391 | gc->set = adp5588_gpio_set_value; | |
9fb1f39e | 392 | gc->can_sleep = true; |
80884094 MH |
393 | |
394 | gc->base = pdata->gpio_start; | |
459773ae | 395 | gc->ngpio = ADP5588_MAXGPIO; |
80884094 MH |
396 | gc->label = client->name; |
397 | gc->owner = THIS_MODULE; | |
1163316e | 398 | gc->names = pdata->names; |
80884094 MH |
399 | |
400 | mutex_init(&dev->lock); | |
401 | ||
80884094 MH |
402 | ret = adp5588_gpio_read(dev->client, DEV_ID); |
403 | if (ret < 0) | |
404 | goto err; | |
405 | ||
406 | revid = ret & ADP5588_DEVICE_ID_MASK; | |
407 | ||
459773ae | 408 | for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
80884094 MH |
409 | dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i); |
410 | dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); | |
411 | ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0); | |
412 | ret |= adp5588_gpio_write(client, GPIO_PULL1 + i, | |
413 | (pdata->pullup_dis_mask >> (8 * i)) & 0xFF); | |
459773ae | 414 | ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0); |
80884094 MH |
415 | if (ret) |
416 | goto err; | |
417 | } | |
418 | ||
459773ae MH |
419 | if (pdata->irq_base) { |
420 | if (WA_DELAYED_READOUT_REVID(revid)) { | |
421 | dev_warn(&client->dev, "GPIO int not supported\n"); | |
422 | } else { | |
423 | ret = adp5588_irq_setup(dev); | |
424 | if (ret) | |
425 | goto err; | |
426 | } | |
427 | } | |
428 | ||
80884094 MH |
429 | ret = gpiochip_add(&dev->gpio_chip); |
430 | if (ret) | |
459773ae | 431 | goto err_irq; |
80884094 | 432 | |
64842aad GL |
433 | dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n", |
434 | pdata->irq_base, revid); | |
80884094 MH |
435 | |
436 | if (pdata->setup) { | |
437 | ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context); | |
438 | if (ret < 0) | |
439 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
440 | } | |
441 | ||
442 | i2c_set_clientdata(client, dev); | |
459773ae | 443 | |
80884094 MH |
444 | return 0; |
445 | ||
459773ae MH |
446 | err_irq: |
447 | adp5588_irq_teardown(dev); | |
80884094 MH |
448 | err: |
449 | kfree(dev); | |
450 | return ret; | |
451 | } | |
452 | ||
206210ce | 453 | static int adp5588_gpio_remove(struct i2c_client *client) |
80884094 | 454 | { |
e56aee18 JH |
455 | struct adp5588_gpio_platform_data *pdata = |
456 | dev_get_platdata(&client->dev); | |
80884094 MH |
457 | struct adp5588_gpio *dev = i2c_get_clientdata(client); |
458 | int ret; | |
459 | ||
460 | if (pdata->teardown) { | |
461 | ret = pdata->teardown(client, | |
462 | dev->gpio_chip.base, dev->gpio_chip.ngpio, | |
463 | pdata->context); | |
464 | if (ret < 0) { | |
465 | dev_err(&client->dev, "teardown failed %d\n", ret); | |
466 | return ret; | |
467 | } | |
468 | } | |
469 | ||
459773ae MH |
470 | if (dev->irq_base) |
471 | free_irq(dev->client->irq, dev); | |
472 | ||
9f5132ae | 473 | gpiochip_remove(&dev->gpio_chip); |
80884094 MH |
474 | |
475 | kfree(dev); | |
476 | return 0; | |
477 | } | |
478 | ||
479 | static const struct i2c_device_id adp5588_gpio_id[] = { | |
480 | {DRV_NAME, 0}, | |
481 | {} | |
482 | }; | |
483 | ||
484 | MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id); | |
485 | ||
486 | static struct i2c_driver adp5588_gpio_driver = { | |
487 | .driver = { | |
488 | .name = DRV_NAME, | |
489 | }, | |
490 | .probe = adp5588_gpio_probe, | |
8283c4ff | 491 | .remove = adp5588_gpio_remove, |
80884094 MH |
492 | .id_table = adp5588_gpio_id, |
493 | }; | |
494 | ||
c8554d32 | 495 | module_i2c_driver(adp5588_gpio_driver); |
80884094 MH |
496 | |
497 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
498 | MODULE_DESCRIPTION("GPIO ADP5588 Driver"); | |
499 | MODULE_LICENSE("GPL"); |