[mirror_ubuntu-artful-kernel.git] / drivers / gpio / gpio-htc-egpio.c

/*
 * Support for the GPIO/IRQ expander chips present on several HTC phones.
 * These are implemented in CPLD chips present on the board.
 *
 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
 *
 * This file may be distributed under the terms of the GNU GPL license.
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/platform_data/gpio-htc-egpio.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/init.h>

struct egpio_chip {
	int              reg_start;
	int              cached_values;
	unsigned long    is_out;
	struct device    *dev;
	struct gpio_chip chip;
};

struct egpio_info {
	spinlock_t        lock;

	/* iomem info */
	void __iomem      *base_addr;
	int               bus_shift;	/* byte shift */
	int               reg_shift;	/* bit shift */
	int               reg_mask;

	/* irq info */
	int               ack_register;
	int               ack_write;
	u16               irqs_enabled;
	uint              irq_start;
	int               nirqs;
	uint              chained_irq;

	/* egpio info */
	struct egpio_chip *chip;
	int               nchips;
};

static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
{
	writew(value, ei->base_addr + (reg << ei->bus_shift));
}

static inline u16 egpio_readw(struct egpio_info *ei, int reg)
{
	return readw(ei->base_addr + (reg << ei->bus_shift));
}

/*
 * IRQs
 */

static inline void ack_irqs(struct egpio_info *ei)
{
	egpio_writew(ei->ack_write, ei, ei->ack_register);
	pr_debug("EGPIO ack - write %x to base+%x\n",
			ei->ack_write, ei->ack_register << ei->bus_shift);
}

static void egpio_ack(struct irq_data *data)
{
}

/* There does not appear to be a way to proactively mask interrupts
 * on the egpio chip itself.  So, we simply ignore interrupts that
 * aren't desired. */
static void egpio_mask(struct irq_data *data)
{
	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
	ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
	pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
}

static void egpio_unmask(struct irq_data *data)
{
	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
	ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
	pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
}

static struct irq_chip egpio_muxed_chip = {
	.name		= "htc-egpio",
	.irq_ack	= egpio_ack,
	.irq_mask	= egpio_mask,
	.irq_unmask	= egpio_unmask,
};

static void egpio_handler(struct irq_desc *desc)
{
	struct egpio_info *ei = irq_desc_get_handler_data(desc);
	int irqpin;

	/* Read current pins. */
	unsigned long readval = egpio_readw(ei, ei->ack_register);
	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
	/* Ack/unmask interrupts. */
	ack_irqs(ei);
	/* Process all set pins. */
	readval &= ei->irqs_enabled;
	for_each_set_bit(irqpin, &readval, ei->nirqs) {
		/* Run irq handler */
		pr_debug("got IRQ %d\n", irqpin);
		generic_handle_irq(ei->irq_start + irqpin);
	}
}

int htc_egpio_get_wakeup_irq(struct device *dev)
{
	struct egpio_info *ei = dev_get_drvdata(dev);

	/* Read current pins. */
	u16 readval = egpio_readw(ei, ei->ack_register);
	/* Ack/unmask interrupts. */
	ack_irqs(ei);
	/* Return first set pin. */
	readval &= ei->irqs_enabled;
	return ei->irq_start + ffs(readval) - 1;
}
EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);

static inline int egpio_pos(struct egpio_info *ei, int bit)
{
	return bit >> ei->reg_shift;
}

static inline int egpio_bit(struct egpio_info *ei, int bit)
{
	return 1 << (bit & ((1 << ei->reg_shift)-1));
}

/*
 * Input pins
 */

static int egpio_get(struct gpio_chip *chip, unsigned offset)
{
	struct egpio_chip *egpio;
	struct egpio_info *ei;
	unsigned           bit;
	int                reg;
	int                value;

	pr_debug("egpio_get_value(%d)\n", chip->base + offset);

	egpio = gpiochip_get_data(chip);
	ei    = dev_get_drvdata(egpio->dev);
	bit   = egpio_bit(ei, offset);
	reg   = egpio->reg_start + egpio_pos(ei, offset);

	if (test_bit(offset, &egpio->is_out)) {
		return !!(egpio->cached_values & (1 << offset));
	} else {
		value = egpio_readw(ei, reg);
		pr_debug("readw(%p + %x) = %x\n",
			 ei->base_addr, reg << ei->bus_shift, value);
		return !!(value & bit);
	}
}

static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
	struct egpio_chip *egpio;

	egpio = gpiochip_get_data(chip);
	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
}


/*
 * Output pins
 */

static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
	unsigned long     flag;
	struct egpio_chip *egpio;
	struct egpio_info *ei;
	unsigned          bit;
	int               pos;
	int               reg;
	int               shift;

	pr_debug("egpio_set(%s, %d(%d), %d)\n",
			chip->label, offset, offset+chip->base, value);

	egpio = gpiochip_get_data(chip);
	ei    = dev_get_drvdata(egpio->dev);
	bit   = egpio_bit(ei, offset);
	pos   = egpio_pos(ei, offset);
	reg   = egpio->reg_start + pos;
	shift = pos << ei->reg_shift;

	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
			reg, (egpio->cached_values >> shift) & ei->reg_mask);

	spin_lock_irqsave(&ei->lock, flag);
	if (value)
		egpio->cached_values |= (1 << offset);
	else
		egpio->cached_values &= ~(1 << offset);
	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
	spin_unlock_irqrestore(&ei->lock, flag);
}

static int egpio_direction_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct egpio_chip *egpio;

	egpio = gpiochip_get_data(chip);
	if (test_bit(offset, &egpio->is_out)) {
		egpio_set(chip, offset, value);
		return 0;
	} else {
		return -EINVAL;
	}
}

static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
	struct egpio_chip *egpio;

	egpio = gpiochip_get_data(chip);

	return !test_bit(offset, &egpio->is_out);
}

static void egpio_write_cache(struct egpio_info *ei)
{
	int               i;
	struct egpio_chip *egpio;
	int               shift;

	for (i = 0; i < ei->nchips; i++) {
		egpio = &(ei->chip[i]);
		if (!egpio->is_out)
			continue;

		for (shift = 0; shift < egpio->chip.ngpio;
				shift += (1<<ei->reg_shift)) {

			int reg = egpio->reg_start + egpio_pos(ei, shift);

			if (!((egpio->is_out >> shift) & ei->reg_mask))
				continue;

			pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
				(egpio->cached_values >> shift) & ei->reg_mask,
				egpio_readw(ei, reg));

			egpio_writew((egpio->cached_values >> shift)
					& ei->reg_mask, ei, reg);
		}
	}
}


/*
 * Setup
 */

static int __init egpio_probe(struct platform_device *pdev)
{
	struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct resource   *res;
	struct egpio_info *ei;
	struct gpio_chip  *chip;
	unsigned int      irq, irq_end;
	int               i;
	int               ret;

	/* Initialize ei data structure. */
	ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
	if (!ei)
		return -ENOMEM;

	spin_lock_init(&ei->lock);

	/* Find chained irq */
	ret = -EINVAL;
	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res)
		ei->chained_irq = res->start;

	/* Map egpio chip into virtual address space. */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		goto fail;
	ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
					     resource_size(res));
	if (!ei->base_addr)
		goto fail;
	pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);

	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
		goto fail;
	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
	pr_debug("bus_shift = %d\n", ei->bus_shift);

	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
		goto fail;
	ei->reg_shift = fls(pdata->reg_width - 1);
	pr_debug("reg_shift = %d\n", ei->reg_shift);

	ei->reg_mask = (1 << pdata->reg_width) - 1;

	platform_set_drvdata(pdev, ei);

	ei->nchips = pdata->num_chips;
	ei->chip = devm_kzalloc(&pdev->dev,
				sizeof(struct egpio_chip) * ei->nchips,
				GFP_KERNEL);
	if (!ei->chip) {
		ret = -ENOMEM;
		goto fail;
	}
	for (i = 0; i < ei->nchips; i++) {
		ei->chip[i].reg_start = pdata->chip[i].reg_start;
		ei->chip[i].cached_values = pdata->chip[i].initial_values;
		ei->chip[i].is_out = pdata->chip[i].direction;
		ei->chip[i].dev = &(pdev->dev);
		chip = &(ei->chip[i].chip);
		chip->label           = "htc-egpio";
		chip->parent          = &pdev->dev;
		chip->owner           = THIS_MODULE;
		chip->get             = egpio_get;
		chip->set             = egpio_set;
		chip->direction_input = egpio_direction_input;
		chip->direction_output = egpio_direction_output;
		chip->get_direction   = egpio_get_direction;
		chip->base            = pdata->chip[i].gpio_base;
		chip->ngpio           = pdata->chip[i].num_gpios;

		gpiochip_add_data(chip, &ei->chip[i]);
	}

	/* Set initial pin values */
	egpio_write_cache(ei);

	ei->irq_start = pdata->irq_base;
	ei->nirqs = pdata->num_irqs;
	ei->ack_register = pdata->ack_register;

	if (ei->chained_irq) {
		/* Setup irq handlers */
		ei->ack_write = 0xFFFF;
		if (pdata->invert_acks)
			ei->ack_write = 0;
		irq_end = ei->irq_start + ei->nirqs;
		for (irq = ei->irq_start; irq < irq_end; irq++) {
			irq_set_chip_and_handler(irq, &egpio_muxed_chip,
						 handle_simple_irq);
			irq_set_chip_data(irq, ei);
			irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
		}
		irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
		irq_set_chained_handler_and_data(ei->chained_irq,
						 egpio_handler, ei);
		ack_irqs(ei);

		device_init_wakeup(&pdev->dev, 1);
	}

	return 0;

fail:
	printk(KERN_ERR "EGPIO failed to setup\n");
	return ret;
}

#ifdef CONFIG_PM
static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
{
	struct egpio_info *ei = platform_get_drvdata(pdev);

	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
		enable_irq_wake(ei->chained_irq);
	return 0;
}

static int egpio_resume(struct platform_device *pdev)
{
	struct egpio_info *ei = platform_get_drvdata(pdev);

	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
		disable_irq_wake(ei->chained_irq);

	/* Update registers from the cache, in case
	   the CPLD was powered off during suspend */
	egpio_write_cache(ei);
	return 0;
}
#else
#define egpio_suspend NULL
#define egpio_resume NULL
#endif


static struct platform_driver egpio_driver = {
	.driver = {
		.name = "htc-egpio",
		.suppress_bind_attrs = true,
	},
	.suspend      = egpio_suspend,
	.resume       = egpio_resume,
};

static int __init egpio_init(void)
{
	return platform_driver_probe(&egpio_driver, egpio_probe);
}
/* start early for dependencies */
subsys_initcall(egpio_init);
Commit	Line	Data
a1635b8f PZ	1	/*
	2	* Support for the GPIO/IRQ expander chips present on several HTC phones.
	3	* These are implemented in CPLD chips present on the board.
	4	*
	5	* Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
	6	* Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
	7	*
	8	* This file may be distributed under the terms of the GNU GPL license.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/irq.h>
	15	#include <linux/io.h>
	16	#include <linux/spinlock.h>
3c6e8d05	17	#include <linux/platform_data/gpio-htc-egpio.h>
a1635b8f	18	#include <linux/platform_device.h>
5a0e3ad6	19	#include <linux/slab.h>
43bbf94c	20	#include <linux/init.h>
a1635b8f PZ	21
	22	struct egpio_chip {
	23	int reg_start;
	24	int cached_values;
	25	unsigned long is_out;
	26	struct device *dev;
	27	struct gpio_chip chip;
	28	};
	29
	30	struct egpio_info {
	31	spinlock_t lock;
	32
	33	/* iomem info */
	34	void __iomem *base_addr;
	35	int bus_shift; /* byte shift */
	36	int reg_shift; /* bit shift */
	37	int reg_mask;
	38
	39	/* irq info */
	40	int ack_register;
	41	int ack_write;
	42	u16 irqs_enabled;
	43	uint irq_start;
	44	int nirqs;
	45	uint chained_irq;
	46
	47	/* egpio info */
	48	struct egpio_chip *chip;
	49	int nchips;
	50	};
	51
	52	static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
	53	{
	54	writew(value, ei->base_addr + (reg << ei->bus_shift));
	55	}
	56
	57	static inline u16 egpio_readw(struct egpio_info *ei, int reg)
	58	{
	59	return readw(ei->base_addr + (reg << ei->bus_shift));
	60	}
	61
	62	/*
	63	* IRQs
	64	*/
	65
	66	static inline void ack_irqs(struct egpio_info *ei)
	67	{
	68	egpio_writew(ei->ack_write, ei, ei->ack_register);
	69	pr_debug("EGPIO ack - write %x to base+%x\n",
	70	ei->ack_write, ei->ack_register << ei->bus_shift);
	71	}
	72
949b9dec	73	static void egpio_ack(struct irq_data *data)
a1635b8f PZ	74	{
	75	}
	76
	77	/* There does not appear to be a way to proactively mask interrupts
	78	* on the egpio chip itself. So, we simply ignore interrupts that
	79	* aren't desired. */
949b9dec	80	static void egpio_mask(struct irq_data *data)
a1635b8f	81	{
949b9dec MB	82	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
	83	ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
	84	pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
a1635b8f	85	}
949b9dec MB	86
949b9dec MB	87	static void egpio_unmask(struct irq_data *data)
a1635b8f	88	{
949b9dec MB	89	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
	90	ei->irqs_enabled \|= 1 << (data->irq - ei->irq_start);
	91	pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
a1635b8f PZ	92	}
	93
	94	static struct irq_chip egpio_muxed_chip = {
949b9dec MB	95	.name = "htc-egpio",
	96	.irq_ack = egpio_ack,
	97	.irq_mask = egpio_mask,
	98	.irq_unmask = egpio_unmask,
a1635b8f PZ	99	};
a1635b8f PZ	100
bd0b9ac4	101	static void egpio_handler(struct irq_desc *desc)
a1635b8f	102	{
77eda966	103	struct egpio_info *ei = irq_desc_get_handler_data(desc);
a1635b8f PZ	104	int irqpin;
	105
	106	/* Read current pins. */
	107	unsigned long readval = egpio_readw(ei, ei->ack_register);
	108	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
	109	/* Ack/unmask interrupts. */
	110	ack_irqs(ei);
	111	/* Process all set pins. */
	112	readval &= ei->irqs_enabled;
984b3f57	113	for_each_set_bit(irqpin, &readval, ei->nirqs) {
a1635b8f PZ	114	/* Run irq handler */
a1635b8f PZ	115	pr_debug("got IRQ %d\n", irqpin);
77eda966	116	generic_handle_irq(ei->irq_start + irqpin);
a1635b8f PZ	117	}
	118	}
	119
	120	int htc_egpio_get_wakeup_irq(struct device *dev)
	121	{
	122	struct egpio_info *ei = dev_get_drvdata(dev);
	123
	124	/* Read current pins. */
	125	u16 readval = egpio_readw(ei, ei->ack_register);
	126	/* Ack/unmask interrupts. */
	127	ack_irqs(ei);
	128	/* Return first set pin. */
	129	readval &= ei->irqs_enabled;
	130	return ei->irq_start + ffs(readval) - 1;
	131	}
	132	EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
	133
	134	static inline int egpio_pos(struct egpio_info *ei, int bit)
	135	{
	136	return bit >> ei->reg_shift;
	137	}
	138
	139	static inline int egpio_bit(struct egpio_info *ei, int bit)
	140	{
	141	return 1 << (bit & ((1 << ei->reg_shift)-1));
	142	}
	143
	144	/*
	145	* Input pins
	146	*/
	147
	148	static int egpio_get(struct gpio_chip *chip, unsigned offset)
	149	{
	150	struct egpio_chip *egpio;
	151	struct egpio_info *ei;
	152	unsigned bit;
	153	int reg;
	154	int value;
	155
	156	pr_debug("egpio_get_value(%d)\n", chip->base + offset);
	157
8d5f095f	158	egpio = gpiochip_get_data(chip);
a1635b8f PZ	159	ei = dev_get_drvdata(egpio->dev);
	160	bit = egpio_bit(ei, offset);
	161	reg = egpio->reg_start + egpio_pos(ei, offset);
	162
24b35ed9 LW	163	if (test_bit(offset, &egpio->is_out)) {
	164	return !!(egpio->cached_values & (1 << offset));
	165	} else {
	166	value = egpio_readw(ei, reg);
	167	pr_debug("readw(%p + %x) = %x\n",
	168	ei->base_addr, reg << ei->bus_shift, value);
	169	return !!(value & bit);
	170	}
a1635b8f PZ	171	}
	172
	173	static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
	174	{
	175	struct egpio_chip *egpio;
	176
8d5f095f	177	egpio = gpiochip_get_data(chip);
a1635b8f PZ	178	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
	179	}
	180
	181
	182	/*
	183	* Output pins
	184	*/
	185
	186	static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
	187	{
	188	unsigned long flag;
	189	struct egpio_chip *egpio;
	190	struct egpio_info *ei;
	191	unsigned bit;
	192	int pos;
	193	int reg;
	194	int shift;
	195
	196	pr_debug("egpio_set(%s, %d(%d), %d)\n",
	197	chip->label, offset, offset+chip->base, value);
	198
8d5f095f	199	egpio = gpiochip_get_data(chip);
a1635b8f PZ	200	ei = dev_get_drvdata(egpio->dev);
	201	bit = egpio_bit(ei, offset);
	202	pos = egpio_pos(ei, offset);
	203	reg = egpio->reg_start + pos;
	204	shift = pos << ei->reg_shift;
	205
	206	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
	207	reg, (egpio->cached_values >> shift) & ei->reg_mask);
	208
	209	spin_lock_irqsave(&ei->lock, flag);
	210	if (value)
	211	egpio->cached_values \|= (1 << offset);
	212	else
	213	egpio->cached_values &= ~(1 << offset);
	214	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
	215	spin_unlock_irqrestore(&ei->lock, flag);
	216	}
	217
	218	static int egpio_direction_output(struct gpio_chip *chip,
	219	unsigned offset, int value)
	220	{
	221	struct egpio_chip *egpio;
	222
8d5f095f	223	egpio = gpiochip_get_data(chip);
a1635b8f PZ	224	if (test_bit(offset, &egpio->is_out)) {
	225	egpio_set(chip, offset, value);
	226	return 0;
	227	} else {
	228	return -EINVAL;
	229	}
	230	}
	231
9298539c LW	232	static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
	233	{
	234	struct egpio_chip *egpio;
	235
	236	egpio = gpiochip_get_data(chip);
	237
	238	return !test_bit(offset, &egpio->is_out);
	239	}
	240
a1635b8f PZ	241	static void egpio_write_cache(struct egpio_info *ei)
	242	{
	243	int i;
	244	struct egpio_chip *egpio;
	245	int shift;
	246
	247	for (i = 0; i < ei->nchips; i++) {
	248	egpio = &(ei->chip[i]);
	249	if (!egpio->is_out)
	250	continue;
	251
	252	for (shift = 0; shift < egpio->chip.ngpio;
	253	shift += (1<<ei->reg_shift)) {
	254
	255	int reg = egpio->reg_start + egpio_pos(ei, shift);
	256
	257	if (!((egpio->is_out >> shift) & ei->reg_mask))
	258	continue;
	259
	260	pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
	261	(egpio->cached_values >> shift) & ei->reg_mask,
	262	egpio_readw(ei, reg));
	263
	264	egpio_writew((egpio->cached_values >> shift)
	265	& ei->reg_mask, ei, reg);
	266	}
	267	}
	268	}
	269
	270
	271	/*
	272	* Setup
	273	*/
	274
	275	static int __init egpio_probe(struct platform_device *pdev)
	276	{
334a41ce	277	struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
a1635b8f PZ	278	struct resource *res;
	279	struct egpio_info *ei;
	280	struct gpio_chip *chip;
	281	unsigned int irq, irq_end;
	282	int i;
	283	int ret;
	284
	285	/* Initialize ei data structure. */
58645b36	286	ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
a1635b8f PZ	287	if (!ei)
	288	return -ENOMEM;
	289
	290	spin_lock_init(&ei->lock);
	291
	292	/* Find chained irq */
	293	ret = -EINVAL;
	294	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	295	if (res)
	296	ei->chained_irq = res->start;
	297
	298	/* Map egpio chip into virtual address space. */
	299	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	300	if (!res)
	301	goto fail;
3f9850f2 WY	302	ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
3f9850f2 WY	303	resource_size(res));
a1635b8f PZ	304	if (!ei->base_addr)
a1635b8f PZ	305	goto fail;
504f97f8	306	pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
a1635b8f PZ	307
	308	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
	309	goto fail;
	310	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
	311	pr_debug("bus_shift = %d\n", ei->bus_shift);
	312
	313	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
	314	goto fail;
	315	ei->reg_shift = fls(pdata->reg_width - 1);
	316	pr_debug("reg_shift = %d\n", ei->reg_shift);
	317
	318	ei->reg_mask = (1 << pdata->reg_width) - 1;
	319
	320	platform_set_drvdata(pdev, ei);
	321
	322	ei->nchips = pdata->num_chips;
58645b36 LJ	323	ei->chip = devm_kzalloc(&pdev->dev,
	324	sizeof(struct egpio_chip) * ei->nchips,
	325	GFP_KERNEL);
720fd66d	326	if (!ei->chip) {
a1635b8f PZ	327	ret = -ENOMEM;
	328	goto fail;
	329	}
	330	for (i = 0; i < ei->nchips; i++) {
	331	ei->chip[i].reg_start = pdata->chip[i].reg_start;
	332	ei->chip[i].cached_values = pdata->chip[i].initial_values;
	333	ei->chip[i].is_out = pdata->chip[i].direction;
	334	ei->chip[i].dev = &(pdev->dev);
	335	chip = &(ei->chip[i].chip);
	336	chip->label = "htc-egpio";
58383c78	337	chip->parent = &pdev->dev;
d8f388d8	338	chip->owner = THIS_MODULE;
a1635b8f PZ	339	chip->get = egpio_get;
	340	chip->set = egpio_set;
	341	chip->direction_input = egpio_direction_input;
	342	chip->direction_output = egpio_direction_output;
9298539c	343	chip->get_direction = egpio_get_direction;
a1635b8f PZ	344	chip->base = pdata->chip[i].gpio_base;
	345	chip->ngpio = pdata->chip[i].num_gpios;
	346
8d5f095f	347	gpiochip_add_data(chip, &ei->chip[i]);
a1635b8f PZ	348	}
	349
	350	/* Set initial pin values */
	351	egpio_write_cache(ei);
	352
	353	ei->irq_start = pdata->irq_base;
	354	ei->nirqs = pdata->num_irqs;
	355	ei->ack_register = pdata->ack_register;
	356
	357	if (ei->chained_irq) {
	358	/* Setup irq handlers */
	359	ei->ack_write = 0xFFFF;
	360	if (pdata->invert_acks)
	361	ei->ack_write = 0;
	362	irq_end = ei->irq_start + ei->nirqs;
	363	for (irq = ei->irq_start; irq < irq_end; irq++) {
d6f7ce9f TG	364	irq_set_chip_and_handler(irq, &egpio_muxed_chip,
d6f7ce9f TG	365	handle_simple_irq);
d5bb1221	366	irq_set_chip_data(irq, ei);
9bd09f34	367	irq_clear_status_flags(irq, IRQ_NOREQUEST \| IRQ_NOPROBE);
a1635b8f	368	}
d5bb1221	369	irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
073f7f99 TG	370	irq_set_chained_handler_and_data(ei->chained_irq,
073f7f99 TG	371	egpio_handler, ei);
a1635b8f PZ	372	ack_irqs(ei);
	373
	374	device_init_wakeup(&pdev->dev, 1);
	375	}
	376
	377	return 0;
	378
	379	fail:
	380	printk(KERN_ERR "EGPIO failed to setup\n");
a1635b8f PZ	381	return ret;
	382	}
	383
a1635b8f PZ	384	#ifdef CONFIG_PM
	385	static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
	386	{
	387	struct egpio_info *ei = platform_get_drvdata(pdev);
	388
	389	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
	390	enable_irq_wake(ei->chained_irq);
	391	return 0;
	392	}
	393
	394	static int egpio_resume(struct platform_device *pdev)
	395	{
	396	struct egpio_info *ei = platform_get_drvdata(pdev);
	397
	398	if (ei->chained_irq && device_may_wakeup(&pdev->dev))
	399	disable_irq_wake(ei->chained_irq);
	400
	401	/* Update registers from the cache, in case
	402	the CPLD was powered off during suspend */
	403	egpio_write_cache(ei);
	404	return 0;
	405	}
	406	#else
	407	#define egpio_suspend NULL
	408	#define egpio_resume NULL
	409	#endif
	410
	411
	412	static struct platform_driver egpio_driver = {
	413	.driver = {
	414	.name = "htc-egpio",
43bbf94c	415	.suppress_bind_attrs = true,
a1635b8f	416	},
a1635b8f PZ	417	.suspend = egpio_suspend,
	418	.resume = egpio_resume,
	419	};
	420
	421	static int __init egpio_init(void)
	422	{
	423	return platform_driver_probe(&egpio_driver, egpio_probe);
	424	}
a1635b8f PZ	425	/* start early for dependencies */
a1635b8f PZ	426	subsys_initcall(egpio_init);