[mirror_ubuntu-kernels.git] / drivers / gpio / gpio-janz-ttl.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Janz MODULbus VMOD-TTL GPIO Driver
 *
 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio/driver.h>
#include <linux/slab.h>
#include <linux/bitops.h>

#include <linux/mfd/janz.h>

#define DRV_NAME "janz-ttl"

#define PORTA_DIRECTION		0x23
#define PORTB_DIRECTION		0x2B
#define PORTC_DIRECTION		0x06
#define PORTA_IOCTL		0x24
#define PORTB_IOCTL		0x2C
#define PORTC_IOCTL		0x07

#define MASTER_INT_CTL		0x00
#define MASTER_CONF_CTL		0x01

#define CONF_PAE		BIT(2)
#define CONF_PBE		BIT(7)
#define CONF_PCE		BIT(4)

struct ttl_control_regs {
	__be16 portc;
	__be16 portb;
	__be16 porta;
	__be16 control;
};

struct ttl_module {
	struct gpio_chip gpio;

	/* base address of registers */
	struct ttl_control_regs __iomem *regs;

	u8 portc_shadow;
	u8 portb_shadow;
	u8 porta_shadow;

	spinlock_t lock;
};

static int ttl_get_value(struct gpio_chip *gpio, unsigned offset)
{
	struct ttl_module *mod = dev_get_drvdata(gpio->parent);
	u8 *shadow;
	int ret;

	if (offset < 8) {
		shadow = &mod->porta_shadow;
	} else if (offset < 16) {
		shadow = &mod->portb_shadow;
		offset -= 8;
	} else {
		shadow = &mod->portc_shadow;
		offset -= 16;
	}

	spin_lock(&mod->lock);
	ret = *shadow & BIT(offset);
	spin_unlock(&mod->lock);
	return !!ret;
}

static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value)
{
	struct ttl_module *mod = dev_get_drvdata(gpio->parent);
	void __iomem *port;
	u8 *shadow;

	if (offset < 8) {
		port = &mod->regs->porta;
		shadow = &mod->porta_shadow;
	} else if (offset < 16) {
		port = &mod->regs->portb;
		shadow = &mod->portb_shadow;
		offset -= 8;
	} else {
		port = &mod->regs->portc;
		shadow = &mod->portc_shadow;
		offset -= 16;
	}

	spin_lock(&mod->lock);
	if (value)
		*shadow |= BIT(offset);
	else
		*shadow &= ~BIT(offset);

	iowrite16be(*shadow, port);
	spin_unlock(&mod->lock);
}

static void ttl_write_reg(struct ttl_module *mod, u8 reg, u16 val)
{
	iowrite16be(reg, &mod->regs->control);
	iowrite16be(val, &mod->regs->control);
}

static void ttl_setup_device(struct ttl_module *mod)
{
	/* reset the device to a known state */
	iowrite16be(0x0000, &mod->regs->control);
	iowrite16be(0x0001, &mod->regs->control);
	iowrite16be(0x0000, &mod->regs->control);

	/* put all ports in open-drain mode */
	ttl_write_reg(mod, PORTA_IOCTL, 0x00ff);
	ttl_write_reg(mod, PORTB_IOCTL, 0x00ff);
	ttl_write_reg(mod, PORTC_IOCTL, 0x000f);

	/* set all ports as outputs */
	ttl_write_reg(mod, PORTA_DIRECTION, 0x0000);
	ttl_write_reg(mod, PORTB_DIRECTION, 0x0000);
	ttl_write_reg(mod, PORTC_DIRECTION, 0x0000);

	/* set all ports to drive zeroes */
	iowrite16be(0x0000, &mod->regs->porta);
	iowrite16be(0x0000, &mod->regs->portb);
	iowrite16be(0x0000, &mod->regs->portc);

	/* enable all ports */
	ttl_write_reg(mod, MASTER_CONF_CTL, CONF_PAE | CONF_PBE | CONF_PCE);
}

static int ttl_probe(struct platform_device *pdev)
{
	struct janz_platform_data *pdata;
	struct device *dev = &pdev->dev;
	struct ttl_module *mod;
	struct gpio_chip *gpio;
	int ret;

	pdata = dev_get_platdata(&pdev->dev);
	if (!pdata) {
		dev_err(dev, "no platform data\n");
		return -ENXIO;
	}

	mod = devm_kzalloc(dev, sizeof(*mod), GFP_KERNEL);
	if (!mod)
		return -ENOMEM;

	platform_set_drvdata(pdev, mod);
	spin_lock_init(&mod->lock);

	/* get access to the MODULbus registers for this module */
	mod->regs = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(mod->regs))
		return PTR_ERR(mod->regs);

	ttl_setup_device(mod);

	/* Initialize the GPIO data structures */
	gpio = &mod->gpio;
	gpio->parent = &pdev->dev;
	gpio->label = pdev->name;
	gpio->get = ttl_get_value;
	gpio->set = ttl_set_value;
	gpio->owner = THIS_MODULE;

	/* request dynamic allocation */
	gpio->base = -1;
	gpio->ngpio = 20;

	ret = devm_gpiochip_add_data(dev, gpio, NULL);
	if (ret) {
		dev_err(dev, "unable to add GPIO chip\n");
		return ret;
	}

	return 0;
}

static struct platform_driver ttl_driver = {
	.driver		= {
		.name	= DRV_NAME,
	},
	.probe		= ttl_probe,
};

module_platform_driver(ttl_driver);

MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
MODULE_DESCRIPTION("Janz MODULbus VMOD-TTL Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:janz-ttl");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
800e69fb IS	2	/*
	3	* Janz MODULbus VMOD-TTL GPIO Driver
	4	*
	5	* Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
800e69fb IS	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/init.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/delay.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/io.h>
1c947b7f	15	#include <linux/gpio/driver.h>
800e69fb	16	#include <linux/slab.h>
96d0d03d	17	#include <linux/bitops.h>
800e69fb IS	18
	19	#include <linux/mfd/janz.h>
	20
	21	#define DRV_NAME "janz-ttl"
	22
	23	#define PORTA_DIRECTION 0x23
	24	#define PORTB_DIRECTION 0x2B
	25	#define PORTC_DIRECTION 0x06
	26	#define PORTA_IOCTL 0x24
	27	#define PORTB_IOCTL 0x2C
	28	#define PORTC_IOCTL 0x07
	29
	30	#define MASTER_INT_CTL 0x00
	31	#define MASTER_CONF_CTL 0x01
	32
96d0d03d LW	33	#define CONF_PAE BIT(2)
	34	#define CONF_PBE BIT(7)
	35	#define CONF_PCE BIT(4)
800e69fb IS	36
	37	struct ttl_control_regs {
	38	__be16 portc;
	39	__be16 portb;
	40	__be16 porta;
	41	__be16 control;
	42	};
	43
	44	struct ttl_module {
	45	struct gpio_chip gpio;
	46
	47	/* base address of registers */
	48	struct ttl_control_regs __iomem *regs;
	49
	50	u8 portc_shadow;
	51	u8 portb_shadow;
	52	u8 porta_shadow;
	53
	54	spinlock_t lock;
	55	};
	56
	57	static int ttl_get_value(struct gpio_chip *gpio, unsigned offset)
	58	{
58383c78	59	struct ttl_module *mod = dev_get_drvdata(gpio->parent);
800e69fb IS	60	u8 *shadow;
	61	int ret;
	62
	63	if (offset < 8) {
	64	shadow = &mod->porta_shadow;
	65	} else if (offset < 16) {
	66	shadow = &mod->portb_shadow;
	67	offset -= 8;
	68	} else {
	69	shadow = &mod->portc_shadow;
	70	offset -= 16;
	71	}
	72
	73	spin_lock(&mod->lock);
96d0d03d	74	ret = *shadow & BIT(offset);
800e69fb	75	spin_unlock(&mod->lock);
828240c2	76	return !!ret;
800e69fb IS	77	}
	78
	79	static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value)
	80	{
58383c78	81	struct ttl_module *mod = dev_get_drvdata(gpio->parent);
800e69fb IS	82	void __iomem *port;
	83	u8 *shadow;
	84
	85	if (offset < 8) {
	86	port = &mod->regs->porta;
	87	shadow = &mod->porta_shadow;
	88	} else if (offset < 16) {
	89	port = &mod->regs->portb;
	90	shadow = &mod->portb_shadow;
	91	offset -= 8;
	92	} else {
	93	port = &mod->regs->portc;
	94	shadow = &mod->portc_shadow;
	95	offset -= 16;
	96	}
	97
	98	spin_lock(&mod->lock);
	99	if (value)
96d0d03d	100	*shadow \|= BIT(offset);
800e69fb	101	else
96d0d03d	102	*shadow &= ~BIT(offset);
800e69fb IS	103
	104	iowrite16be(*shadow, port);
	105	spin_unlock(&mod->lock);
	106	}
	107
3836309d	108	static void ttl_write_reg(struct ttl_module *mod, u8 reg, u16 val)
800e69fb IS	109	{
	110	iowrite16be(reg, &mod->regs->control);
	111	iowrite16be(val, &mod->regs->control);
	112	}
	113
3836309d	114	static void ttl_setup_device(struct ttl_module *mod)
800e69fb IS	115	{
	116	/* reset the device to a known state */
	117	iowrite16be(0x0000, &mod->regs->control);
	118	iowrite16be(0x0001, &mod->regs->control);
	119	iowrite16be(0x0000, &mod->regs->control);
	120
	121	/* put all ports in open-drain mode */
	122	ttl_write_reg(mod, PORTA_IOCTL, 0x00ff);
	123	ttl_write_reg(mod, PORTB_IOCTL, 0x00ff);
	124	ttl_write_reg(mod, PORTC_IOCTL, 0x000f);
	125
	126	/* set all ports as outputs */
	127	ttl_write_reg(mod, PORTA_DIRECTION, 0x0000);
	128	ttl_write_reg(mod, PORTB_DIRECTION, 0x0000);
	129	ttl_write_reg(mod, PORTC_DIRECTION, 0x0000);
	130
	131	/* set all ports to drive zeroes */
	132	iowrite16be(0x0000, &mod->regs->porta);
	133	iowrite16be(0x0000, &mod->regs->portb);
	134	iowrite16be(0x0000, &mod->regs->portc);
	135
	136	/* enable all ports */
	137	ttl_write_reg(mod, MASTER_CONF_CTL, CONF_PAE \| CONF_PBE \| CONF_PCE);
	138	}
	139
3836309d	140	static int ttl_probe(struct platform_device *pdev)
800e69fb IS	141	{
	142	struct janz_platform_data *pdata;
	143	struct device *dev = &pdev->dev;
	144	struct ttl_module *mod;
	145	struct gpio_chip *gpio;
800e69fb IS	146	int ret;
800e69fb IS	147
e56aee18	148	pdata = dev_get_platdata(&pdev->dev);
800e69fb IS	149	if (!pdata) {
800e69fb IS	150	dev_err(dev, "no platform data\n");
ae28193e	151	return -ENXIO;
800e69fb IS	152	}
800e69fb IS	153
ae28193e	154	mod = devm_kzalloc(dev, sizeof(*mod), GFP_KERNEL);
	155	if (!mod)
	156	return -ENOMEM;
800e69fb IS	157
	158	platform_set_drvdata(pdev, mod);
	159	spin_lock_init(&mod->lock);
	160
	161	/* get access to the MODULbus registers for this module */
38b1e680	162	mod->regs = devm_platform_ioremap_resource(pdev, 0);
ae28193e	163	if (IS_ERR(mod->regs))
ae28193e	164	return PTR_ERR(mod->regs);
800e69fb IS	165
	166	ttl_setup_device(mod);
	167
	168	/* Initialize the GPIO data structures */
	169	gpio = &mod->gpio;
58383c78	170	gpio->parent = &pdev->dev;
800e69fb IS	171	gpio->label = pdev->name;
	172	gpio->get = ttl_get_value;
	173	gpio->set = ttl_set_value;
	174	gpio->owner = THIS_MODULE;
	175
	176	/* request dynamic allocation */
	177	gpio->base = -1;
	178	gpio->ngpio = 20;
	179
abeb3f40	180	ret = devm_gpiochip_add_data(dev, gpio, NULL);
800e69fb IS	181	if (ret) {
800e69fb IS	182	dev_err(dev, "unable to add GPIO chip\n");
ae28193e	183	return ret;
800e69fb IS	184	}
800e69fb IS	185
800e69fb	186	return 0;
800e69fb IS	187	}
800e69fb IS	188
800e69fb IS	189	static struct platform_driver ttl_driver = {
	190	.driver = {
	191	.name = DRV_NAME,
800e69fb IS	192	},
800e69fb IS	193	.probe = ttl_probe,
800e69fb IS	194	};
800e69fb IS	195
6f61415e	196	module_platform_driver(ttl_driver);
800e69fb IS	197
	198	MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
	199	MODULE_DESCRIPTION("Janz MODULbus VMOD-TTL Driver");
	200	MODULE_LICENSE("GPL");
	201	MODULE_ALIAS("platform:janz-ttl");