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Commit | Line | Data |
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bbcd6d54 | 1 | /* |
c103de24 | 2 | * MAX732x I2C Port Expander with 8/16 I/O |
bbcd6d54 EM |
3 | * |
4 | * Copyright (C) 2007 Marvell International Ltd. | |
5 | * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com> | |
6 | * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com> | |
7 | * | |
8 | * Derived from drivers/gpio/pca953x.c | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/gpio.h> | |
a80a0bbe MZ |
20 | #include <linux/interrupt.h> |
21 | #include <linux/irq.h> | |
bbcd6d54 EM |
22 | #include <linux/i2c.h> |
23 | #include <linux/i2c/max732x.h> | |
43c4bcf9 | 24 | #include <linux/of.h> |
bbcd6d54 EM |
25 | |
26 | ||
27 | /* | |
28 | * Each port of MAX732x (including MAX7319) falls into one of the | |
29 | * following three types: | |
30 | * | |
31 | * - Push Pull Output | |
32 | * - Input | |
33 | * - Open Drain I/O | |
34 | * | |
35 | * designated by 'O', 'I' and 'P' individually according to MAXIM's | |
a80a0bbe MZ |
36 | * datasheets. 'I' and 'P' ports are interrupt capables, some with |
37 | * a dedicated interrupt mask. | |
bbcd6d54 EM |
38 | * |
39 | * There are two groups of I/O ports, each group usually includes | |
40 | * up to 8 I/O ports, and is accessed by a specific I2C address: | |
41 | * | |
42 | * - Group A : by I2C address 0b'110xxxx | |
43 | * - Group B : by I2C address 0b'101xxxx | |
44 | * | |
45 | * where 'xxxx' is decided by the connections of pin AD2/AD0. The | |
46 | * address used also affects the initial state of output signals. | |
47 | * | |
48 | * Within each group of ports, there are five known combinations of | |
49 | * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for | |
a80a0bbe MZ |
50 | * the detailed organization of these ports. Only Goup A is interrupt |
51 | * capable. | |
bbcd6d54 EM |
52 | * |
53 | * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16', | |
54 | * and GPIOs from GROUP_A are numbered before those from GROUP_B | |
55 | * (if there are two groups). | |
56 | * | |
57 | * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so | |
58 | * they are not supported by this driver. | |
59 | */ | |
60 | ||
61 | #define PORT_NONE 0x0 /* '/' No Port */ | |
62 | #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */ | |
63 | #define PORT_INPUT 0x2 /* 'I' Input Only */ | |
64 | #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */ | |
65 | ||
66 | #define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */ | |
67 | #define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */ | |
68 | #define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */ | |
69 | #define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */ | |
70 | #define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */ | |
71 | ||
72 | #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */ | |
73 | #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */ | |
74 | ||
a80a0bbe MZ |
75 | #define INT_NONE 0x0 /* No interrupt capability */ |
76 | #define INT_NO_MASK 0x1 /* Has interrupts, no mask */ | |
77 | #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */ | |
78 | #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */ | |
79 | ||
80 | #define INT_CAPS(x) (((uint64_t)(x)) << 32) | |
81 | ||
82 | enum { | |
83 | MAX7319, | |
84 | MAX7320, | |
85 | MAX7321, | |
86 | MAX7322, | |
87 | MAX7323, | |
88 | MAX7324, | |
89 | MAX7325, | |
90 | MAX7326, | |
91 | MAX7327, | |
92 | }; | |
93 | ||
94 | static uint64_t max732x_features[] = { | |
95 | [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK), | |
96 | [MAX7320] = GROUP_B(IO_8O), | |
97 | [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK), | |
98 | [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK), | |
99 | [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK), | |
100 | [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
101 | [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
102 | [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
103 | [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
104 | }; | |
105 | ||
bbcd6d54 | 106 | static const struct i2c_device_id max732x_id[] = { |
a80a0bbe MZ |
107 | { "max7319", MAX7319 }, |
108 | { "max7320", MAX7320 }, | |
109 | { "max7321", MAX7321 }, | |
110 | { "max7322", MAX7322 }, | |
111 | { "max7323", MAX7323 }, | |
112 | { "max7324", MAX7324 }, | |
113 | { "max7325", MAX7325 }, | |
114 | { "max7326", MAX7326 }, | |
115 | { "max7327", MAX7327 }, | |
bbcd6d54 EM |
116 | { }, |
117 | }; | |
118 | MODULE_DEVICE_TABLE(i2c, max732x_id); | |
119 | ||
43c4bcf9 SP |
120 | #ifdef CONFIG_OF |
121 | static const struct of_device_id max732x_of_table[] = { | |
122 | { .compatible = "maxim,max7319" }, | |
123 | { .compatible = "maxim,max7320" }, | |
124 | { .compatible = "maxim,max7321" }, | |
125 | { .compatible = "maxim,max7322" }, | |
126 | { .compatible = "maxim,max7323" }, | |
127 | { .compatible = "maxim,max7324" }, | |
128 | { .compatible = "maxim,max7325" }, | |
129 | { .compatible = "maxim,max7326" }, | |
130 | { .compatible = "maxim,max7327" }, | |
131 | { } | |
132 | }; | |
133 | MODULE_DEVICE_TABLE(of, max732x_of_table); | |
134 | #endif | |
135 | ||
bbcd6d54 EM |
136 | struct max732x_chip { |
137 | struct gpio_chip gpio_chip; | |
138 | ||
139 | struct i2c_client *client; /* "main" client */ | |
140 | struct i2c_client *client_dummy; | |
141 | struct i2c_client *client_group_a; | |
142 | struct i2c_client *client_group_b; | |
143 | ||
144 | unsigned int mask_group_a; | |
145 | unsigned int dir_input; | |
146 | unsigned int dir_output; | |
147 | ||
148 | struct mutex lock; | |
149 | uint8_t reg_out[2]; | |
a80a0bbe MZ |
150 | |
151 | #ifdef CONFIG_GPIO_MAX732X_IRQ | |
152 | struct mutex irq_lock; | |
153 | int irq_base; | |
154 | uint8_t irq_mask; | |
155 | uint8_t irq_mask_cur; | |
156 | uint8_t irq_trig_raise; | |
157 | uint8_t irq_trig_fall; | |
158 | uint8_t irq_features; | |
159 | #endif | |
bbcd6d54 EM |
160 | }; |
161 | ||
a80a0bbe | 162 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) |
bbcd6d54 EM |
163 | { |
164 | struct i2c_client *client; | |
165 | int ret; | |
166 | ||
167 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
168 | ret = i2c_smbus_write_byte(client, val); | |
169 | if (ret < 0) { | |
170 | dev_err(&client->dev, "failed writing\n"); | |
171 | return ret; | |
172 | } | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
a80a0bbe | 177 | static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val) |
bbcd6d54 EM |
178 | { |
179 | struct i2c_client *client; | |
180 | int ret; | |
181 | ||
182 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
183 | ret = i2c_smbus_read_byte(client); | |
184 | if (ret < 0) { | |
185 | dev_err(&client->dev, "failed reading\n"); | |
186 | return ret; | |
187 | } | |
188 | ||
189 | *val = (uint8_t)ret; | |
190 | return 0; | |
191 | } | |
192 | ||
193 | static inline int is_group_a(struct max732x_chip *chip, unsigned off) | |
194 | { | |
195 | return (1u << off) & chip->mask_group_a; | |
196 | } | |
197 | ||
198 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |
199 | { | |
200 | struct max732x_chip *chip; | |
201 | uint8_t reg_val; | |
202 | int ret; | |
203 | ||
204 | chip = container_of(gc, struct max732x_chip, gpio_chip); | |
205 | ||
a80a0bbe | 206 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); |
bbcd6d54 EM |
207 | if (ret < 0) |
208 | return 0; | |
209 | ||
210 | return reg_val & (1u << (off & 0x7)); | |
211 | } | |
212 | ||
213 | static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | |
214 | { | |
215 | struct max732x_chip *chip; | |
216 | uint8_t reg_out, mask = 1u << (off & 0x7); | |
217 | int ret; | |
218 | ||
219 | chip = container_of(gc, struct max732x_chip, gpio_chip); | |
220 | ||
221 | mutex_lock(&chip->lock); | |
222 | ||
223 | reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0]; | |
224 | reg_out = (val) ? reg_out | mask : reg_out & ~mask; | |
225 | ||
a80a0bbe | 226 | ret = max732x_writeb(chip, is_group_a(chip, off), reg_out); |
bbcd6d54 EM |
227 | if (ret < 0) |
228 | goto out; | |
229 | ||
230 | /* update the shadow register then */ | |
231 | if (off > 7) | |
232 | chip->reg_out[1] = reg_out; | |
233 | else | |
234 | chip->reg_out[0] = reg_out; | |
235 | out: | |
236 | mutex_unlock(&chip->lock); | |
237 | } | |
238 | ||
239 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | |
240 | { | |
241 | struct max732x_chip *chip; | |
242 | unsigned int mask = 1u << off; | |
243 | ||
244 | chip = container_of(gc, struct max732x_chip, gpio_chip); | |
245 | ||
246 | if ((mask & chip->dir_input) == 0) { | |
247 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
248 | chip->client->name, off); | |
249 | return -EACCES; | |
250 | } | |
251 | ||
a13c1868 MZ |
252 | /* |
253 | * Open-drain pins must be set to high impedance (which is | |
254 | * equivalent to output-high) to be turned into an input. | |
255 | */ | |
256 | if ((mask & chip->dir_output)) | |
257 | max732x_gpio_set_value(gc, off, 1); | |
258 | ||
bbcd6d54 EM |
259 | return 0; |
260 | } | |
261 | ||
262 | static int max732x_gpio_direction_output(struct gpio_chip *gc, | |
263 | unsigned off, int val) | |
264 | { | |
265 | struct max732x_chip *chip; | |
266 | unsigned int mask = 1u << off; | |
267 | ||
268 | chip = container_of(gc, struct max732x_chip, gpio_chip); | |
269 | ||
270 | if ((mask & chip->dir_output) == 0) { | |
271 | dev_dbg(&chip->client->dev, "%s port %d is input only\n", | |
272 | chip->client->name, off); | |
273 | return -EACCES; | |
274 | } | |
275 | ||
276 | max732x_gpio_set_value(gc, off, val); | |
277 | return 0; | |
278 | } | |
279 | ||
a80a0bbe MZ |
280 | #ifdef CONFIG_GPIO_MAX732X_IRQ |
281 | static int max732x_writew(struct max732x_chip *chip, uint16_t val) | |
282 | { | |
283 | int ret; | |
284 | ||
285 | val = cpu_to_le16(val); | |
286 | ||
287 | ret = i2c_master_send(chip->client_group_a, (char *)&val, 2); | |
288 | if (ret < 0) { | |
289 | dev_err(&chip->client_group_a->dev, "failed writing\n"); | |
290 | return ret; | |
291 | } | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
296 | static int max732x_readw(struct max732x_chip *chip, uint16_t *val) | |
297 | { | |
298 | int ret; | |
299 | ||
300 | ret = i2c_master_recv(chip->client_group_a, (char *)val, 2); | |
301 | if (ret < 0) { | |
302 | dev_err(&chip->client_group_a->dev, "failed reading\n"); | |
303 | return ret; | |
304 | } | |
305 | ||
306 | *val = le16_to_cpu(*val); | |
307 | return 0; | |
308 | } | |
309 | ||
310 | static void max732x_irq_update_mask(struct max732x_chip *chip) | |
311 | { | |
312 | uint16_t msg; | |
313 | ||
314 | if (chip->irq_mask == chip->irq_mask_cur) | |
315 | return; | |
316 | ||
317 | chip->irq_mask = chip->irq_mask_cur; | |
318 | ||
319 | if (chip->irq_features == INT_NO_MASK) | |
320 | return; | |
321 | ||
322 | mutex_lock(&chip->lock); | |
323 | ||
324 | switch (chip->irq_features) { | |
325 | case INT_INDEP_MASK: | |
326 | msg = (chip->irq_mask << 8) | chip->reg_out[0]; | |
327 | max732x_writew(chip, msg); | |
328 | break; | |
329 | ||
330 | case INT_MERGED_MASK: | |
331 | msg = chip->irq_mask | chip->reg_out[0]; | |
332 | max732x_writeb(chip, 1, (uint8_t)msg); | |
333 | break; | |
334 | } | |
335 | ||
336 | mutex_unlock(&chip->lock); | |
337 | } | |
338 | ||
339 | static int max732x_gpio_to_irq(struct gpio_chip *gc, unsigned off) | |
340 | { | |
341 | struct max732x_chip *chip; | |
342 | ||
343 | chip = container_of(gc, struct max732x_chip, gpio_chip); | |
344 | return chip->irq_base + off; | |
345 | } | |
346 | ||
fbc4667a | 347 | static void max732x_irq_mask(struct irq_data *d) |
a80a0bbe | 348 | { |
fbc4667a | 349 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe | 350 | |
fbc4667a | 351 | chip->irq_mask_cur &= ~(1 << (d->irq - chip->irq_base)); |
a80a0bbe MZ |
352 | } |
353 | ||
fbc4667a | 354 | static void max732x_irq_unmask(struct irq_data *d) |
a80a0bbe | 355 | { |
fbc4667a | 356 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe | 357 | |
fbc4667a | 358 | chip->irq_mask_cur |= 1 << (d->irq - chip->irq_base); |
a80a0bbe MZ |
359 | } |
360 | ||
fbc4667a | 361 | static void max732x_irq_bus_lock(struct irq_data *d) |
a80a0bbe | 362 | { |
fbc4667a | 363 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe MZ |
364 | |
365 | mutex_lock(&chip->irq_lock); | |
366 | chip->irq_mask_cur = chip->irq_mask; | |
367 | } | |
368 | ||
fbc4667a | 369 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) |
a80a0bbe | 370 | { |
fbc4667a | 371 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe MZ |
372 | |
373 | max732x_irq_update_mask(chip); | |
374 | mutex_unlock(&chip->irq_lock); | |
375 | } | |
376 | ||
fbc4667a | 377 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) |
a80a0bbe | 378 | { |
fbc4667a LB |
379 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
380 | uint16_t off = d->irq - chip->irq_base; | |
a80a0bbe MZ |
381 | uint16_t mask = 1 << off; |
382 | ||
383 | if (!(mask & chip->dir_input)) { | |
384 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
385 | chip->client->name, off); | |
386 | return -EACCES; | |
387 | } | |
388 | ||
389 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
390 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
fbc4667a | 391 | d->irq, type); |
a80a0bbe MZ |
392 | return -EINVAL; |
393 | } | |
394 | ||
395 | if (type & IRQ_TYPE_EDGE_FALLING) | |
396 | chip->irq_trig_fall |= mask; | |
397 | else | |
398 | chip->irq_trig_fall &= ~mask; | |
399 | ||
400 | if (type & IRQ_TYPE_EDGE_RISING) | |
401 | chip->irq_trig_raise |= mask; | |
402 | else | |
403 | chip->irq_trig_raise &= ~mask; | |
404 | ||
405 | return max732x_gpio_direction_input(&chip->gpio_chip, off); | |
406 | } | |
407 | ||
408 | static struct irq_chip max732x_irq_chip = { | |
409 | .name = "max732x", | |
fbc4667a LB |
410 | .irq_mask = max732x_irq_mask, |
411 | .irq_unmask = max732x_irq_unmask, | |
412 | .irq_bus_lock = max732x_irq_bus_lock, | |
413 | .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock, | |
414 | .irq_set_type = max732x_irq_set_type, | |
a80a0bbe MZ |
415 | }; |
416 | ||
417 | static uint8_t max732x_irq_pending(struct max732x_chip *chip) | |
418 | { | |
419 | uint8_t cur_stat; | |
420 | uint8_t old_stat; | |
421 | uint8_t trigger; | |
422 | uint8_t pending; | |
423 | uint16_t status; | |
424 | int ret; | |
425 | ||
426 | ret = max732x_readw(chip, &status); | |
427 | if (ret) | |
428 | return 0; | |
429 | ||
430 | trigger = status >> 8; | |
431 | trigger &= chip->irq_mask; | |
432 | ||
433 | if (!trigger) | |
434 | return 0; | |
435 | ||
436 | cur_stat = status & 0xFF; | |
437 | cur_stat &= chip->irq_mask; | |
438 | ||
439 | old_stat = cur_stat ^ trigger; | |
440 | ||
441 | pending = (old_stat & chip->irq_trig_fall) | | |
442 | (cur_stat & chip->irq_trig_raise); | |
443 | pending &= trigger; | |
444 | ||
445 | return pending; | |
446 | } | |
447 | ||
448 | static irqreturn_t max732x_irq_handler(int irq, void *devid) | |
449 | { | |
450 | struct max732x_chip *chip = devid; | |
451 | uint8_t pending; | |
452 | uint8_t level; | |
453 | ||
454 | pending = max732x_irq_pending(chip); | |
455 | ||
456 | if (!pending) | |
457 | return IRQ_HANDLED; | |
458 | ||
459 | do { | |
460 | level = __ffs(pending); | |
461 | handle_nested_irq(level + chip->irq_base); | |
462 | ||
463 | pending &= ~(1 << level); | |
464 | } while (pending); | |
465 | ||
466 | return IRQ_HANDLED; | |
467 | } | |
468 | ||
469 | static int max732x_irq_setup(struct max732x_chip *chip, | |
470 | const struct i2c_device_id *id) | |
471 | { | |
472 | struct i2c_client *client = chip->client; | |
e56aee18 | 473 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
474 | int has_irq = max732x_features[id->driver_data] >> 32; |
475 | int ret; | |
476 | ||
43c4bcf9 SP |
477 | if (((pdata && pdata->irq_base) || client->irq) |
478 | && has_irq != INT_NONE) { | |
a80a0bbe MZ |
479 | int lvl; |
480 | ||
43c4bcf9 SP |
481 | if (pdata) |
482 | chip->irq_base = pdata->irq_base; | |
a80a0bbe MZ |
483 | chip->irq_features = has_irq; |
484 | mutex_init(&chip->irq_lock); | |
485 | ||
486 | for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { | |
487 | int irq = lvl + chip->irq_base; | |
488 | ||
489 | if (!(chip->dir_input & (1 << lvl))) | |
490 | continue; | |
491 | ||
b51804bc TG |
492 | irq_set_chip_data(irq, chip); |
493 | irq_set_chip_and_handler(irq, &max732x_irq_chip, | |
a80a0bbe | 494 | handle_edge_irq); |
b51804bc | 495 | irq_set_nested_thread(irq, 1); |
a80a0bbe MZ |
496 | #ifdef CONFIG_ARM |
497 | set_irq_flags(irq, IRQF_VALID); | |
498 | #else | |
b51804bc | 499 | irq_set_noprobe(irq); |
a80a0bbe MZ |
500 | #endif |
501 | } | |
502 | ||
503 | ret = request_threaded_irq(client->irq, | |
504 | NULL, | |
505 | max732x_irq_handler, | |
506 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | |
507 | dev_name(&client->dev), chip); | |
508 | if (ret) { | |
509 | dev_err(&client->dev, "failed to request irq %d\n", | |
510 | client->irq); | |
511 | goto out_failed; | |
512 | } | |
513 | ||
514 | chip->gpio_chip.to_irq = max732x_gpio_to_irq; | |
515 | } | |
516 | ||
517 | return 0; | |
518 | ||
519 | out_failed: | |
520 | chip->irq_base = 0; | |
521 | return ret; | |
522 | } | |
523 | ||
524 | static void max732x_irq_teardown(struct max732x_chip *chip) | |
525 | { | |
526 | if (chip->irq_base) | |
527 | free_irq(chip->client->irq, chip); | |
528 | } | |
529 | #else /* CONFIG_GPIO_MAX732X_IRQ */ | |
530 | static int max732x_irq_setup(struct max732x_chip *chip, | |
531 | const struct i2c_device_id *id) | |
532 | { | |
533 | struct i2c_client *client = chip->client; | |
e56aee18 | 534 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
535 | int has_irq = max732x_features[id->driver_data] >> 32; |
536 | ||
43c4bcf9 | 537 | if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE) |
a80a0bbe MZ |
538 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
539 | ||
540 | return 0; | |
541 | } | |
542 | ||
543 | static void max732x_irq_teardown(struct max732x_chip *chip) | |
544 | { | |
545 | } | |
546 | #endif | |
547 | ||
3836309d | 548 | static int max732x_setup_gpio(struct max732x_chip *chip, |
bbcd6d54 EM |
549 | const struct i2c_device_id *id, |
550 | unsigned gpio_start) | |
551 | { | |
552 | struct gpio_chip *gc = &chip->gpio_chip; | |
a80a0bbe | 553 | uint32_t id_data = (uint32_t)max732x_features[id->driver_data]; |
bbcd6d54 EM |
554 | int i, port = 0; |
555 | ||
556 | for (i = 0; i < 16; i++, id_data >>= 2) { | |
557 | unsigned int mask = 1 << port; | |
558 | ||
559 | switch (id_data & 0x3) { | |
560 | case PORT_OUTPUT: | |
561 | chip->dir_output |= mask; | |
562 | break; | |
563 | case PORT_INPUT: | |
564 | chip->dir_input |= mask; | |
565 | break; | |
566 | case PORT_OPENDRAIN: | |
567 | chip->dir_output |= mask; | |
568 | chip->dir_input |= mask; | |
569 | break; | |
570 | default: | |
571 | continue; | |
572 | } | |
573 | ||
574 | if (i < 8) | |
575 | chip->mask_group_a |= mask; | |
576 | port++; | |
577 | } | |
578 | ||
579 | if (chip->dir_input) | |
580 | gc->direction_input = max732x_gpio_direction_input; | |
581 | if (chip->dir_output) { | |
582 | gc->direction_output = max732x_gpio_direction_output; | |
583 | gc->set = max732x_gpio_set_value; | |
584 | } | |
585 | gc->get = max732x_gpio_get_value; | |
9fb1f39e | 586 | gc->can_sleep = true; |
bbcd6d54 EM |
587 | |
588 | gc->base = gpio_start; | |
589 | gc->ngpio = port; | |
590 | gc->label = chip->client->name; | |
591 | gc->owner = THIS_MODULE; | |
592 | ||
593 | return port; | |
594 | } | |
595 | ||
43c4bcf9 SP |
596 | static struct max732x_platform_data *of_gpio_max732x(struct device *dev) |
597 | { | |
598 | struct max732x_platform_data *pdata; | |
599 | ||
600 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
601 | if (!pdata) | |
602 | return NULL; | |
603 | ||
604 | pdata->gpio_base = -1; | |
605 | ||
606 | return pdata; | |
607 | } | |
608 | ||
3836309d | 609 | static int max732x_probe(struct i2c_client *client, |
bbcd6d54 EM |
610 | const struct i2c_device_id *id) |
611 | { | |
612 | struct max732x_platform_data *pdata; | |
43c4bcf9 | 613 | struct device_node *node; |
bbcd6d54 EM |
614 | struct max732x_chip *chip; |
615 | struct i2c_client *c; | |
616 | uint16_t addr_a, addr_b; | |
617 | int ret, nr_port; | |
618 | ||
e56aee18 | 619 | pdata = dev_get_platdata(&client->dev); |
43c4bcf9 SP |
620 | node = client->dev.of_node; |
621 | ||
622 | if (!pdata && node) | |
623 | pdata = of_gpio_max732x(&client->dev); | |
624 | ||
625 | if (!pdata) { | |
a342d215 BD |
626 | dev_dbg(&client->dev, "no platform data\n"); |
627 | return -EINVAL; | |
628 | } | |
bbcd6d54 | 629 | |
43c4bcf9 | 630 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
bbcd6d54 EM |
631 | if (chip == NULL) |
632 | return -ENOMEM; | |
633 | chip->client = client; | |
634 | ||
635 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); | |
43c4bcf9 | 636 | chip->gpio_chip.dev = &client->dev; |
bbcd6d54 EM |
637 | |
638 | addr_a = (client->addr & 0x0f) | 0x60; | |
639 | addr_b = (client->addr & 0x0f) | 0x50; | |
640 | ||
641 | switch (client->addr & 0x70) { | |
642 | case 0x60: | |
643 | chip->client_group_a = client; | |
5535cb68 | 644 | if (nr_port > 8) { |
bbcd6d54 EM |
645 | c = i2c_new_dummy(client->adapter, addr_b); |
646 | chip->client_group_b = chip->client_dummy = c; | |
647 | } | |
648 | break; | |
649 | case 0x50: | |
650 | chip->client_group_b = client; | |
5535cb68 | 651 | if (nr_port > 8) { |
bbcd6d54 EM |
652 | c = i2c_new_dummy(client->adapter, addr_a); |
653 | chip->client_group_a = chip->client_dummy = c; | |
654 | } | |
655 | break; | |
656 | default: | |
657 | dev_err(&client->dev, "invalid I2C address specified %02x\n", | |
658 | client->addr); | |
659 | ret = -EINVAL; | |
660 | goto out_failed; | |
f561b423 KK |
661 | } |
662 | ||
663 | if (nr_port > 8 && !chip->client_dummy) { | |
664 | dev_err(&client->dev, | |
665 | "Failed to allocate second group I2C device\n"); | |
666 | ret = -ENODEV; | |
667 | goto out_failed; | |
bbcd6d54 EM |
668 | } |
669 | ||
670 | mutex_init(&chip->lock); | |
671 | ||
a80a0bbe | 672 | max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); |
5535cb68 | 673 | if (nr_port > 8) |
a80a0bbe MZ |
674 | max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]); |
675 | ||
676 | ret = max732x_irq_setup(chip, id); | |
677 | if (ret) | |
678 | goto out_failed; | |
bbcd6d54 EM |
679 | |
680 | ret = gpiochip_add(&chip->gpio_chip); | |
681 | if (ret) | |
682 | goto out_failed; | |
683 | ||
43c4bcf9 | 684 | if (pdata && pdata->setup) { |
bbcd6d54 EM |
685 | ret = pdata->setup(client, chip->gpio_chip.base, |
686 | chip->gpio_chip.ngpio, pdata->context); | |
687 | if (ret < 0) | |
688 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
689 | } | |
690 | ||
691 | i2c_set_clientdata(client, chip); | |
692 | return 0; | |
693 | ||
694 | out_failed: | |
c75793d8 KK |
695 | if (chip->client_dummy) |
696 | i2c_unregister_device(chip->client_dummy); | |
a80a0bbe | 697 | max732x_irq_teardown(chip); |
bbcd6d54 EM |
698 | return ret; |
699 | } | |
700 | ||
206210ce | 701 | static int max732x_remove(struct i2c_client *client) |
bbcd6d54 | 702 | { |
e56aee18 | 703 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
bbcd6d54 | 704 | struct max732x_chip *chip = i2c_get_clientdata(client); |
bbcd6d54 | 705 | |
43c4bcf9 SP |
706 | if (pdata && pdata->teardown) { |
707 | int ret; | |
708 | ||
bbcd6d54 EM |
709 | ret = pdata->teardown(client, chip->gpio_chip.base, |
710 | chip->gpio_chip.ngpio, pdata->context); | |
711 | if (ret < 0) { | |
712 | dev_err(&client->dev, "%s failed, %d\n", | |
713 | "teardown", ret); | |
714 | return ret; | |
715 | } | |
716 | } | |
717 | ||
9f5132ae | 718 | gpiochip_remove(&chip->gpio_chip); |
bbcd6d54 | 719 | |
a80a0bbe MZ |
720 | max732x_irq_teardown(chip); |
721 | ||
bbcd6d54 EM |
722 | /* unregister any dummy i2c_client */ |
723 | if (chip->client_dummy) | |
724 | i2c_unregister_device(chip->client_dummy); | |
725 | ||
bbcd6d54 EM |
726 | return 0; |
727 | } | |
728 | ||
729 | static struct i2c_driver max732x_driver = { | |
730 | .driver = { | |
43c4bcf9 SP |
731 | .name = "max732x", |
732 | .owner = THIS_MODULE, | |
733 | .of_match_table = of_match_ptr(max732x_of_table), | |
bbcd6d54 EM |
734 | }, |
735 | .probe = max732x_probe, | |
8283c4ff | 736 | .remove = max732x_remove, |
bbcd6d54 EM |
737 | .id_table = max732x_id, |
738 | }; | |
739 | ||
740 | static int __init max732x_init(void) | |
741 | { | |
742 | return i2c_add_driver(&max732x_driver); | |
743 | } | |
2f8d1197 DB |
744 | /* register after i2c postcore initcall and before |
745 | * subsys initcalls that may rely on these GPIOs | |
746 | */ | |
747 | subsys_initcall(max732x_init); | |
bbcd6d54 EM |
748 | |
749 | static void __exit max732x_exit(void) | |
750 | { | |
751 | i2c_del_driver(&max732x_driver); | |
752 | } | |
753 | module_exit(max732x_exit); | |
754 | ||
755 | MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"); | |
756 | MODULE_DESCRIPTION("GPIO expander driver for MAX732X"); | |
757 | MODULE_LICENSE("GPL"); |