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Commit | Line | Data |
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bbcd6d54 | 1 | /* |
c103de24 | 2 | * MAX732x I2C Port Expander with 8/16 I/O |
bbcd6d54 EM |
3 | * |
4 | * Copyright (C) 2007 Marvell International Ltd. | |
5 | * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com> | |
6 | * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com> | |
984f6643 | 7 | * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org> |
bbcd6d54 EM |
8 | * |
9 | * Derived from drivers/gpio/pca953x.c | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; version 2 of the License. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/string.h> | |
984f6643 | 20 | #include <linux/gpio/driver.h> |
a80a0bbe | 21 | #include <linux/interrupt.h> |
bbcd6d54 EM |
22 | #include <linux/i2c.h> |
23 | #include <linux/i2c/max732x.h> | |
43c4bcf9 | 24 | #include <linux/of.h> |
bbcd6d54 EM |
25 | |
26 | ||
27 | /* | |
28 | * Each port of MAX732x (including MAX7319) falls into one of the | |
29 | * following three types: | |
30 | * | |
31 | * - Push Pull Output | |
32 | * - Input | |
33 | * - Open Drain I/O | |
34 | * | |
35 | * designated by 'O', 'I' and 'P' individually according to MAXIM's | |
a80a0bbe MZ |
36 | * datasheets. 'I' and 'P' ports are interrupt capables, some with |
37 | * a dedicated interrupt mask. | |
bbcd6d54 EM |
38 | * |
39 | * There are two groups of I/O ports, each group usually includes | |
40 | * up to 8 I/O ports, and is accessed by a specific I2C address: | |
41 | * | |
42 | * - Group A : by I2C address 0b'110xxxx | |
43 | * - Group B : by I2C address 0b'101xxxx | |
44 | * | |
45 | * where 'xxxx' is decided by the connections of pin AD2/AD0. The | |
46 | * address used also affects the initial state of output signals. | |
47 | * | |
48 | * Within each group of ports, there are five known combinations of | |
49 | * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for | |
a80a0bbe MZ |
50 | * the detailed organization of these ports. Only Goup A is interrupt |
51 | * capable. | |
bbcd6d54 EM |
52 | * |
53 | * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16', | |
54 | * and GPIOs from GROUP_A are numbered before those from GROUP_B | |
55 | * (if there are two groups). | |
56 | * | |
57 | * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so | |
58 | * they are not supported by this driver. | |
59 | */ | |
60 | ||
61 | #define PORT_NONE 0x0 /* '/' No Port */ | |
62 | #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */ | |
63 | #define PORT_INPUT 0x2 /* 'I' Input Only */ | |
64 | #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */ | |
65 | ||
66 | #define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */ | |
67 | #define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */ | |
68 | #define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */ | |
69 | #define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */ | |
70 | #define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */ | |
71 | ||
72 | #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */ | |
73 | #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */ | |
74 | ||
a80a0bbe MZ |
75 | #define INT_NONE 0x0 /* No interrupt capability */ |
76 | #define INT_NO_MASK 0x1 /* Has interrupts, no mask */ | |
77 | #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */ | |
78 | #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */ | |
79 | ||
80 | #define INT_CAPS(x) (((uint64_t)(x)) << 32) | |
81 | ||
82 | enum { | |
83 | MAX7319, | |
84 | MAX7320, | |
85 | MAX7321, | |
86 | MAX7322, | |
87 | MAX7323, | |
88 | MAX7324, | |
89 | MAX7325, | |
90 | MAX7326, | |
91 | MAX7327, | |
92 | }; | |
93 | ||
94 | static uint64_t max732x_features[] = { | |
95 | [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK), | |
96 | [MAX7320] = GROUP_B(IO_8O), | |
97 | [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK), | |
98 | [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK), | |
99 | [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK), | |
100 | [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
101 | [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
102 | [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
103 | [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
104 | }; | |
105 | ||
bbcd6d54 | 106 | static const struct i2c_device_id max732x_id[] = { |
a80a0bbe MZ |
107 | { "max7319", MAX7319 }, |
108 | { "max7320", MAX7320 }, | |
109 | { "max7321", MAX7321 }, | |
110 | { "max7322", MAX7322 }, | |
111 | { "max7323", MAX7323 }, | |
112 | { "max7324", MAX7324 }, | |
113 | { "max7325", MAX7325 }, | |
114 | { "max7326", MAX7326 }, | |
115 | { "max7327", MAX7327 }, | |
bbcd6d54 EM |
116 | { }, |
117 | }; | |
118 | MODULE_DEVICE_TABLE(i2c, max732x_id); | |
119 | ||
43c4bcf9 SP |
120 | #ifdef CONFIG_OF |
121 | static const struct of_device_id max732x_of_table[] = { | |
122 | { .compatible = "maxim,max7319" }, | |
123 | { .compatible = "maxim,max7320" }, | |
124 | { .compatible = "maxim,max7321" }, | |
125 | { .compatible = "maxim,max7322" }, | |
126 | { .compatible = "maxim,max7323" }, | |
127 | { .compatible = "maxim,max7324" }, | |
128 | { .compatible = "maxim,max7325" }, | |
129 | { .compatible = "maxim,max7326" }, | |
130 | { .compatible = "maxim,max7327" }, | |
131 | { } | |
132 | }; | |
133 | MODULE_DEVICE_TABLE(of, max732x_of_table); | |
134 | #endif | |
135 | ||
bbcd6d54 EM |
136 | struct max732x_chip { |
137 | struct gpio_chip gpio_chip; | |
138 | ||
139 | struct i2c_client *client; /* "main" client */ | |
140 | struct i2c_client *client_dummy; | |
141 | struct i2c_client *client_group_a; | |
142 | struct i2c_client *client_group_b; | |
143 | ||
144 | unsigned int mask_group_a; | |
145 | unsigned int dir_input; | |
146 | unsigned int dir_output; | |
147 | ||
148 | struct mutex lock; | |
149 | uint8_t reg_out[2]; | |
a80a0bbe MZ |
150 | |
151 | #ifdef CONFIG_GPIO_MAX732X_IRQ | |
479f8a57 | 152 | struct mutex irq_lock; |
479f8a57 SP |
153 | uint8_t irq_mask; |
154 | uint8_t irq_mask_cur; | |
155 | uint8_t irq_trig_raise; | |
156 | uint8_t irq_trig_fall; | |
157 | uint8_t irq_features; | |
a80a0bbe | 158 | #endif |
bbcd6d54 EM |
159 | }; |
160 | ||
37fc8a92 LW |
161 | static inline struct max732x_chip *to_max732x(struct gpio_chip *gc) |
162 | { | |
163 | return container_of(gc, struct max732x_chip, gpio_chip); | |
164 | } | |
165 | ||
a80a0bbe | 166 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) |
bbcd6d54 EM |
167 | { |
168 | struct i2c_client *client; | |
169 | int ret; | |
170 | ||
171 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
172 | ret = i2c_smbus_write_byte(client, val); | |
173 | if (ret < 0) { | |
174 | dev_err(&client->dev, "failed writing\n"); | |
175 | return ret; | |
176 | } | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
a80a0bbe | 181 | static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val) |
bbcd6d54 EM |
182 | { |
183 | struct i2c_client *client; | |
184 | int ret; | |
185 | ||
186 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
187 | ret = i2c_smbus_read_byte(client); | |
188 | if (ret < 0) { | |
189 | dev_err(&client->dev, "failed reading\n"); | |
190 | return ret; | |
191 | } | |
192 | ||
193 | *val = (uint8_t)ret; | |
194 | return 0; | |
195 | } | |
196 | ||
197 | static inline int is_group_a(struct max732x_chip *chip, unsigned off) | |
198 | { | |
199 | return (1u << off) & chip->mask_group_a; | |
200 | } | |
201 | ||
202 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |
203 | { | |
37fc8a92 | 204 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
205 | uint8_t reg_val; |
206 | int ret; | |
207 | ||
a80a0bbe | 208 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); |
bbcd6d54 EM |
209 | if (ret < 0) |
210 | return 0; | |
211 | ||
212 | return reg_val & (1u << (off & 0x7)); | |
213 | } | |
214 | ||
161af6cd MR |
215 | static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask, |
216 | int val) | |
bbcd6d54 | 217 | { |
37fc8a92 | 218 | struct max732x_chip *chip = to_max732x(gc); |
161af6cd | 219 | uint8_t reg_out; |
bbcd6d54 EM |
220 | int ret; |
221 | ||
bbcd6d54 EM |
222 | mutex_lock(&chip->lock); |
223 | ||
224 | reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0]; | |
161af6cd | 225 | reg_out = (reg_out & ~mask) | (val & mask); |
bbcd6d54 | 226 | |
a80a0bbe | 227 | ret = max732x_writeb(chip, is_group_a(chip, off), reg_out); |
bbcd6d54 EM |
228 | if (ret < 0) |
229 | goto out; | |
230 | ||
231 | /* update the shadow register then */ | |
232 | if (off > 7) | |
233 | chip->reg_out[1] = reg_out; | |
234 | else | |
235 | chip->reg_out[0] = reg_out; | |
236 | out: | |
237 | mutex_unlock(&chip->lock); | |
238 | } | |
239 | ||
161af6cd MR |
240 | static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
241 | { | |
242 | unsigned base = off & ~0x7; | |
243 | uint8_t mask = 1u << (off & 0x7); | |
244 | ||
245 | max732x_gpio_set_mask(gc, base, mask, val << (off & 0x7)); | |
246 | } | |
247 | ||
248 | static void max732x_gpio_set_multiple(struct gpio_chip *gc, | |
249 | unsigned long *mask, unsigned long *bits) | |
250 | { | |
251 | unsigned mask_lo = mask[0] & 0xff; | |
252 | unsigned mask_hi = (mask[0] >> 8) & 0xff; | |
253 | ||
254 | if (mask_lo) | |
255 | max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff); | |
256 | if (mask_hi) | |
257 | max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff); | |
258 | } | |
259 | ||
bbcd6d54 EM |
260 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
261 | { | |
37fc8a92 | 262 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
263 | unsigned int mask = 1u << off; |
264 | ||
bbcd6d54 EM |
265 | if ((mask & chip->dir_input) == 0) { |
266 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
267 | chip->client->name, off); | |
268 | return -EACCES; | |
269 | } | |
270 | ||
a13c1868 MZ |
271 | /* |
272 | * Open-drain pins must be set to high impedance (which is | |
273 | * equivalent to output-high) to be turned into an input. | |
274 | */ | |
275 | if ((mask & chip->dir_output)) | |
276 | max732x_gpio_set_value(gc, off, 1); | |
277 | ||
bbcd6d54 EM |
278 | return 0; |
279 | } | |
280 | ||
281 | static int max732x_gpio_direction_output(struct gpio_chip *gc, | |
282 | unsigned off, int val) | |
283 | { | |
37fc8a92 | 284 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
285 | unsigned int mask = 1u << off; |
286 | ||
bbcd6d54 EM |
287 | if ((mask & chip->dir_output) == 0) { |
288 | dev_dbg(&chip->client->dev, "%s port %d is input only\n", | |
289 | chip->client->name, off); | |
290 | return -EACCES; | |
291 | } | |
292 | ||
293 | max732x_gpio_set_value(gc, off, val); | |
294 | return 0; | |
295 | } | |
296 | ||
a80a0bbe MZ |
297 | #ifdef CONFIG_GPIO_MAX732X_IRQ |
298 | static int max732x_writew(struct max732x_chip *chip, uint16_t val) | |
299 | { | |
300 | int ret; | |
301 | ||
302 | val = cpu_to_le16(val); | |
303 | ||
304 | ret = i2c_master_send(chip->client_group_a, (char *)&val, 2); | |
305 | if (ret < 0) { | |
306 | dev_err(&chip->client_group_a->dev, "failed writing\n"); | |
307 | return ret; | |
308 | } | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | static int max732x_readw(struct max732x_chip *chip, uint16_t *val) | |
314 | { | |
315 | int ret; | |
316 | ||
317 | ret = i2c_master_recv(chip->client_group_a, (char *)val, 2); | |
318 | if (ret < 0) { | |
319 | dev_err(&chip->client_group_a->dev, "failed reading\n"); | |
320 | return ret; | |
321 | } | |
322 | ||
323 | *val = le16_to_cpu(*val); | |
324 | return 0; | |
325 | } | |
326 | ||
327 | static void max732x_irq_update_mask(struct max732x_chip *chip) | |
328 | { | |
329 | uint16_t msg; | |
330 | ||
331 | if (chip->irq_mask == chip->irq_mask_cur) | |
332 | return; | |
333 | ||
334 | chip->irq_mask = chip->irq_mask_cur; | |
335 | ||
336 | if (chip->irq_features == INT_NO_MASK) | |
337 | return; | |
338 | ||
339 | mutex_lock(&chip->lock); | |
340 | ||
341 | switch (chip->irq_features) { | |
342 | case INT_INDEP_MASK: | |
343 | msg = (chip->irq_mask << 8) | chip->reg_out[0]; | |
344 | max732x_writew(chip, msg); | |
345 | break; | |
346 | ||
347 | case INT_MERGED_MASK: | |
348 | msg = chip->irq_mask | chip->reg_out[0]; | |
349 | max732x_writeb(chip, 1, (uint8_t)msg); | |
350 | break; | |
351 | } | |
352 | ||
353 | mutex_unlock(&chip->lock); | |
354 | } | |
355 | ||
fbc4667a | 356 | static void max732x_irq_mask(struct irq_data *d) |
a80a0bbe | 357 | { |
984f6643 LW |
358 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
359 | struct max732x_chip *chip = to_max732x(gc); | |
a80a0bbe | 360 | |
479f8a57 | 361 | chip->irq_mask_cur &= ~(1 << d->hwirq); |
a80a0bbe MZ |
362 | } |
363 | ||
fbc4667a | 364 | static void max732x_irq_unmask(struct irq_data *d) |
a80a0bbe | 365 | { |
984f6643 LW |
366 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
367 | struct max732x_chip *chip = to_max732x(gc); | |
a80a0bbe | 368 | |
479f8a57 | 369 | chip->irq_mask_cur |= 1 << d->hwirq; |
a80a0bbe MZ |
370 | } |
371 | ||
fbc4667a | 372 | static void max732x_irq_bus_lock(struct irq_data *d) |
a80a0bbe | 373 | { |
984f6643 LW |
374 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
375 | struct max732x_chip *chip = to_max732x(gc); | |
a80a0bbe MZ |
376 | |
377 | mutex_lock(&chip->irq_lock); | |
378 | chip->irq_mask_cur = chip->irq_mask; | |
379 | } | |
380 | ||
fbc4667a | 381 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) |
a80a0bbe | 382 | { |
984f6643 LW |
383 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
384 | struct max732x_chip *chip = to_max732x(gc); | |
09afa276 SP |
385 | uint16_t new_irqs; |
386 | uint16_t level; | |
a80a0bbe MZ |
387 | |
388 | max732x_irq_update_mask(chip); | |
09afa276 SP |
389 | |
390 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
391 | while (new_irqs) { | |
392 | level = __ffs(new_irqs); | |
393 | max732x_gpio_direction_input(&chip->gpio_chip, level); | |
394 | new_irqs &= ~(1 << level); | |
395 | } | |
396 | ||
a80a0bbe MZ |
397 | mutex_unlock(&chip->irq_lock); |
398 | } | |
399 | ||
fbc4667a | 400 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) |
a80a0bbe | 401 | { |
984f6643 LW |
402 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
403 | struct max732x_chip *chip = to_max732x(gc); | |
479f8a57 | 404 | uint16_t off = d->hwirq; |
a80a0bbe MZ |
405 | uint16_t mask = 1 << off; |
406 | ||
407 | if (!(mask & chip->dir_input)) { | |
408 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
409 | chip->client->name, off); | |
410 | return -EACCES; | |
411 | } | |
412 | ||
413 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
414 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
fbc4667a | 415 | d->irq, type); |
a80a0bbe MZ |
416 | return -EINVAL; |
417 | } | |
418 | ||
419 | if (type & IRQ_TYPE_EDGE_FALLING) | |
420 | chip->irq_trig_fall |= mask; | |
421 | else | |
422 | chip->irq_trig_fall &= ~mask; | |
423 | ||
424 | if (type & IRQ_TYPE_EDGE_RISING) | |
425 | chip->irq_trig_raise |= mask; | |
426 | else | |
427 | chip->irq_trig_raise &= ~mask; | |
428 | ||
09afa276 | 429 | return 0; |
a80a0bbe MZ |
430 | } |
431 | ||
67ddd32b SP |
432 | static int max732x_irq_set_wake(struct irq_data *data, unsigned int on) |
433 | { | |
434 | struct max732x_chip *chip = irq_data_get_irq_chip_data(data); | |
435 | ||
436 | irq_set_irq_wake(chip->client->irq, on); | |
437 | return 0; | |
438 | } | |
439 | ||
a80a0bbe MZ |
440 | static struct irq_chip max732x_irq_chip = { |
441 | .name = "max732x", | |
fbc4667a LB |
442 | .irq_mask = max732x_irq_mask, |
443 | .irq_unmask = max732x_irq_unmask, | |
444 | .irq_bus_lock = max732x_irq_bus_lock, | |
445 | .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock, | |
446 | .irq_set_type = max732x_irq_set_type, | |
67ddd32b | 447 | .irq_set_wake = max732x_irq_set_wake, |
a80a0bbe MZ |
448 | }; |
449 | ||
450 | static uint8_t max732x_irq_pending(struct max732x_chip *chip) | |
451 | { | |
452 | uint8_t cur_stat; | |
453 | uint8_t old_stat; | |
454 | uint8_t trigger; | |
455 | uint8_t pending; | |
456 | uint16_t status; | |
457 | int ret; | |
458 | ||
459 | ret = max732x_readw(chip, &status); | |
460 | if (ret) | |
461 | return 0; | |
462 | ||
463 | trigger = status >> 8; | |
464 | trigger &= chip->irq_mask; | |
465 | ||
466 | if (!trigger) | |
467 | return 0; | |
468 | ||
469 | cur_stat = status & 0xFF; | |
470 | cur_stat &= chip->irq_mask; | |
471 | ||
472 | old_stat = cur_stat ^ trigger; | |
473 | ||
474 | pending = (old_stat & chip->irq_trig_fall) | | |
475 | (cur_stat & chip->irq_trig_raise); | |
476 | pending &= trigger; | |
477 | ||
478 | return pending; | |
479 | } | |
480 | ||
481 | static irqreturn_t max732x_irq_handler(int irq, void *devid) | |
482 | { | |
483 | struct max732x_chip *chip = devid; | |
484 | uint8_t pending; | |
485 | uint8_t level; | |
486 | ||
487 | pending = max732x_irq_pending(chip); | |
488 | ||
489 | if (!pending) | |
490 | return IRQ_HANDLED; | |
491 | ||
492 | do { | |
493 | level = __ffs(pending); | |
984f6643 LW |
494 | handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, |
495 | level)); | |
a80a0bbe MZ |
496 | |
497 | pending &= ~(1 << level); | |
498 | } while (pending); | |
499 | ||
500 | return IRQ_HANDLED; | |
501 | } | |
502 | ||
503 | static int max732x_irq_setup(struct max732x_chip *chip, | |
504 | const struct i2c_device_id *id) | |
505 | { | |
506 | struct i2c_client *client = chip->client; | |
e56aee18 | 507 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe | 508 | int has_irq = max732x_features[id->driver_data] >> 32; |
984f6643 | 509 | int irq_base = 0; |
a80a0bbe MZ |
510 | int ret; |
511 | ||
43c4bcf9 SP |
512 | if (((pdata && pdata->irq_base) || client->irq) |
513 | && has_irq != INT_NONE) { | |
43c4bcf9 | 514 | if (pdata) |
984f6643 | 515 | irq_base = pdata->irq_base; |
a80a0bbe MZ |
516 | chip->irq_features = has_irq; |
517 | mutex_init(&chip->irq_lock); | |
518 | ||
68689dbf SP |
519 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
520 | NULL, max732x_irq_handler, IRQF_ONESHOT | | |
521 | IRQF_TRIGGER_FALLING | IRQF_SHARED, | |
522 | dev_name(&client->dev), chip); | |
a80a0bbe MZ |
523 | if (ret) { |
524 | dev_err(&client->dev, "failed to request irq %d\n", | |
525 | client->irq); | |
984f6643 | 526 | return ret; |
a80a0bbe | 527 | } |
984f6643 LW |
528 | ret = gpiochip_irqchip_add(&chip->gpio_chip, |
529 | &max732x_irq_chip, | |
530 | irq_base, | |
606f13e9 | 531 | handle_simple_irq, |
984f6643 LW |
532 | IRQ_TYPE_NONE); |
533 | if (ret) { | |
534 | dev_err(&client->dev, | |
535 | "could not connect irqchip to gpiochip\n"); | |
536 | return ret; | |
537 | } | |
538 | gpiochip_set_chained_irqchip(&chip->gpio_chip, | |
539 | &max732x_irq_chip, | |
540 | client->irq, | |
541 | NULL); | |
a80a0bbe MZ |
542 | } |
543 | ||
544 | return 0; | |
a80a0bbe MZ |
545 | } |
546 | ||
a80a0bbe MZ |
547 | #else /* CONFIG_GPIO_MAX732X_IRQ */ |
548 | static int max732x_irq_setup(struct max732x_chip *chip, | |
549 | const struct i2c_device_id *id) | |
550 | { | |
551 | struct i2c_client *client = chip->client; | |
e56aee18 | 552 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
553 | int has_irq = max732x_features[id->driver_data] >> 32; |
554 | ||
43c4bcf9 | 555 | if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE) |
a80a0bbe MZ |
556 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
557 | ||
558 | return 0; | |
559 | } | |
a80a0bbe MZ |
560 | #endif |
561 | ||
3836309d | 562 | static int max732x_setup_gpio(struct max732x_chip *chip, |
bbcd6d54 EM |
563 | const struct i2c_device_id *id, |
564 | unsigned gpio_start) | |
565 | { | |
566 | struct gpio_chip *gc = &chip->gpio_chip; | |
a80a0bbe | 567 | uint32_t id_data = (uint32_t)max732x_features[id->driver_data]; |
bbcd6d54 EM |
568 | int i, port = 0; |
569 | ||
570 | for (i = 0; i < 16; i++, id_data >>= 2) { | |
571 | unsigned int mask = 1 << port; | |
572 | ||
573 | switch (id_data & 0x3) { | |
574 | case PORT_OUTPUT: | |
575 | chip->dir_output |= mask; | |
576 | break; | |
577 | case PORT_INPUT: | |
578 | chip->dir_input |= mask; | |
579 | break; | |
580 | case PORT_OPENDRAIN: | |
581 | chip->dir_output |= mask; | |
582 | chip->dir_input |= mask; | |
583 | break; | |
584 | default: | |
585 | continue; | |
586 | } | |
587 | ||
588 | if (i < 8) | |
589 | chip->mask_group_a |= mask; | |
590 | port++; | |
591 | } | |
592 | ||
593 | if (chip->dir_input) | |
594 | gc->direction_input = max732x_gpio_direction_input; | |
595 | if (chip->dir_output) { | |
596 | gc->direction_output = max732x_gpio_direction_output; | |
597 | gc->set = max732x_gpio_set_value; | |
161af6cd | 598 | gc->set_multiple = max732x_gpio_set_multiple; |
bbcd6d54 EM |
599 | } |
600 | gc->get = max732x_gpio_get_value; | |
9fb1f39e | 601 | gc->can_sleep = true; |
bbcd6d54 EM |
602 | |
603 | gc->base = gpio_start; | |
604 | gc->ngpio = port; | |
605 | gc->label = chip->client->name; | |
34ab54ed | 606 | gc->dev = &chip->client->dev; |
bbcd6d54 EM |
607 | gc->owner = THIS_MODULE; |
608 | ||
609 | return port; | |
610 | } | |
611 | ||
43c4bcf9 SP |
612 | static struct max732x_platform_data *of_gpio_max732x(struct device *dev) |
613 | { | |
614 | struct max732x_platform_data *pdata; | |
615 | ||
616 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
617 | if (!pdata) | |
618 | return NULL; | |
619 | ||
620 | pdata->gpio_base = -1; | |
621 | ||
622 | return pdata; | |
623 | } | |
624 | ||
3836309d | 625 | static int max732x_probe(struct i2c_client *client, |
bbcd6d54 EM |
626 | const struct i2c_device_id *id) |
627 | { | |
628 | struct max732x_platform_data *pdata; | |
43c4bcf9 | 629 | struct device_node *node; |
bbcd6d54 EM |
630 | struct max732x_chip *chip; |
631 | struct i2c_client *c; | |
632 | uint16_t addr_a, addr_b; | |
633 | int ret, nr_port; | |
634 | ||
e56aee18 | 635 | pdata = dev_get_platdata(&client->dev); |
43c4bcf9 SP |
636 | node = client->dev.of_node; |
637 | ||
638 | if (!pdata && node) | |
639 | pdata = of_gpio_max732x(&client->dev); | |
640 | ||
641 | if (!pdata) { | |
a342d215 BD |
642 | dev_dbg(&client->dev, "no platform data\n"); |
643 | return -EINVAL; | |
644 | } | |
bbcd6d54 | 645 | |
43c4bcf9 | 646 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
bbcd6d54 EM |
647 | if (chip == NULL) |
648 | return -ENOMEM; | |
649 | chip->client = client; | |
650 | ||
651 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); | |
43c4bcf9 | 652 | chip->gpio_chip.dev = &client->dev; |
bbcd6d54 EM |
653 | |
654 | addr_a = (client->addr & 0x0f) | 0x60; | |
655 | addr_b = (client->addr & 0x0f) | 0x50; | |
656 | ||
657 | switch (client->addr & 0x70) { | |
658 | case 0x60: | |
659 | chip->client_group_a = client; | |
5535cb68 | 660 | if (nr_port > 8) { |
bbcd6d54 EM |
661 | c = i2c_new_dummy(client->adapter, addr_b); |
662 | chip->client_group_b = chip->client_dummy = c; | |
663 | } | |
664 | break; | |
665 | case 0x50: | |
666 | chip->client_group_b = client; | |
5535cb68 | 667 | if (nr_port > 8) { |
bbcd6d54 EM |
668 | c = i2c_new_dummy(client->adapter, addr_a); |
669 | chip->client_group_a = chip->client_dummy = c; | |
670 | } | |
671 | break; | |
672 | default: | |
673 | dev_err(&client->dev, "invalid I2C address specified %02x\n", | |
674 | client->addr); | |
675 | ret = -EINVAL; | |
676 | goto out_failed; | |
f561b423 KK |
677 | } |
678 | ||
679 | if (nr_port > 8 && !chip->client_dummy) { | |
680 | dev_err(&client->dev, | |
681 | "Failed to allocate second group I2C device\n"); | |
682 | ret = -ENODEV; | |
683 | goto out_failed; | |
bbcd6d54 EM |
684 | } |
685 | ||
686 | mutex_init(&chip->lock); | |
687 | ||
a80a0bbe | 688 | max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); |
5535cb68 | 689 | if (nr_port > 8) |
a80a0bbe MZ |
690 | max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]); |
691 | ||
984f6643 | 692 | ret = gpiochip_add(&chip->gpio_chip); |
a80a0bbe MZ |
693 | if (ret) |
694 | goto out_failed; | |
bbcd6d54 | 695 | |
984f6643 LW |
696 | ret = max732x_irq_setup(chip, id); |
697 | if (ret) { | |
698 | gpiochip_remove(&chip->gpio_chip); | |
bbcd6d54 | 699 | goto out_failed; |
984f6643 | 700 | } |
bbcd6d54 | 701 | |
43c4bcf9 | 702 | if (pdata && pdata->setup) { |
bbcd6d54 EM |
703 | ret = pdata->setup(client, chip->gpio_chip.base, |
704 | chip->gpio_chip.ngpio, pdata->context); | |
705 | if (ret < 0) | |
706 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
707 | } | |
708 | ||
709 | i2c_set_clientdata(client, chip); | |
710 | return 0; | |
711 | ||
712 | out_failed: | |
c75793d8 KK |
713 | if (chip->client_dummy) |
714 | i2c_unregister_device(chip->client_dummy); | |
bbcd6d54 EM |
715 | return ret; |
716 | } | |
717 | ||
206210ce | 718 | static int max732x_remove(struct i2c_client *client) |
bbcd6d54 | 719 | { |
e56aee18 | 720 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
bbcd6d54 | 721 | struct max732x_chip *chip = i2c_get_clientdata(client); |
bbcd6d54 | 722 | |
43c4bcf9 SP |
723 | if (pdata && pdata->teardown) { |
724 | int ret; | |
725 | ||
bbcd6d54 EM |
726 | ret = pdata->teardown(client, chip->gpio_chip.base, |
727 | chip->gpio_chip.ngpio, pdata->context); | |
728 | if (ret < 0) { | |
729 | dev_err(&client->dev, "%s failed, %d\n", | |
730 | "teardown", ret); | |
731 | return ret; | |
732 | } | |
733 | } | |
734 | ||
9f5132ae | 735 | gpiochip_remove(&chip->gpio_chip); |
bbcd6d54 EM |
736 | |
737 | /* unregister any dummy i2c_client */ | |
738 | if (chip->client_dummy) | |
739 | i2c_unregister_device(chip->client_dummy); | |
740 | ||
bbcd6d54 EM |
741 | return 0; |
742 | } | |
743 | ||
744 | static struct i2c_driver max732x_driver = { | |
745 | .driver = { | |
43c4bcf9 SP |
746 | .name = "max732x", |
747 | .owner = THIS_MODULE, | |
748 | .of_match_table = of_match_ptr(max732x_of_table), | |
bbcd6d54 EM |
749 | }, |
750 | .probe = max732x_probe, | |
8283c4ff | 751 | .remove = max732x_remove, |
bbcd6d54 EM |
752 | .id_table = max732x_id, |
753 | }; | |
754 | ||
755 | static int __init max732x_init(void) | |
756 | { | |
757 | return i2c_add_driver(&max732x_driver); | |
758 | } | |
2f8d1197 DB |
759 | /* register after i2c postcore initcall and before |
760 | * subsys initcalls that may rely on these GPIOs | |
761 | */ | |
762 | subsys_initcall(max732x_init); | |
bbcd6d54 EM |
763 | |
764 | static void __exit max732x_exit(void) | |
765 | { | |
766 | i2c_del_driver(&max732x_driver); | |
767 | } | |
768 | module_exit(max732x_exit); | |
769 | ||
770 | MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"); | |
771 | MODULE_DESCRIPTION("GPIO expander driver for MAX732X"); | |
772 | MODULE_LICENSE("GPL"); |