[mirror_ubuntu-artful-kernel.git] / drivers / gpio / gpio-mpc5200.c

/*
 * MPC52xx gpio driver
 *
 * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/of.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/of_gpio.h>
#include <linux/io.h>
#include <linux/of_platform.h>
#include <linux/module.h>

#include <asm/mpc52xx.h>
#include <sysdev/fsl_soc.h>

static DEFINE_SPINLOCK(gpio_lock);

struct mpc52xx_gpiochip {
	struct of_mm_gpio_chip mmchip;
	unsigned int shadow_dvo;
	unsigned int shadow_gpioe;
	unsigned int shadow_ddr;
};

/*
 * GPIO LIB API implementation for wakeup GPIOs.
 *
 * There's a maximum of 8 wakeup GPIOs. Which of these are available
 * for use depends on your board setup.
 *
 * 0 -> GPIO_WKUP_7
 * 1 -> GPIO_WKUP_6
 * 2 -> PSC6_1
 * 3 -> PSC6_0
 * 4 -> ETH_17
 * 5 -> PSC3_9
 * 6 -> PSC2_4
 * 7 -> PSC1_4
 *
 */
static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	unsigned int ret;

	ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;

	pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);

	return ret;
}

static inline void
__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;

	if (val)
		chip->shadow_dvo |= 1 << (7 - gpio);
	else
		chip->shadow_dvo &= ~(1 << (7 - gpio));

	out_8(&regs->wkup_dvo, chip->shadow_dvo);
}

static void
mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_wkup_gpio_set(gc, gpio, val);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
}

static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* set the direction */
	chip->shadow_ddr &= ~(1 << (7 - gpio));
	out_8(&regs->wkup_ddr, chip->shadow_ddr);

	/* and enable the pin */
	chip->shadow_gpioe |= 1 << (7 - gpio);
	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	return 0;
}

static int
mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_wkup_gpio_set(gc, gpio, val);

	/* Then set direction */
	chip->shadow_ddr |= 1 << (7 - gpio);
	out_8(&regs->wkup_ddr, chip->shadow_ddr);

	/* Finally enable the pin */
	chip->shadow_gpioe |= 1 << (7 - gpio);
	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);

	return 0;
}

static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip;
	struct mpc52xx_gpio_wkup __iomem *regs;
	struct gpio_chip *gc;
	int ret;

	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	platform_set_drvdata(ofdev, chip);

	gc = &chip->mmchip.gc;

	gc->ngpio            = 8;
	gc->direction_input  = mpc52xx_wkup_gpio_dir_in;
	gc->direction_output = mpc52xx_wkup_gpio_dir_out;
	gc->get              = mpc52xx_wkup_gpio_get;
	gc->set              = mpc52xx_wkup_gpio_set;

	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
	if (ret)
		return ret;

	regs = chip->mmchip.regs;
	chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
	chip->shadow_ddr = in_8(&regs->wkup_ddr);
	chip->shadow_dvo = in_8(&regs->wkup_dvo);

	return 0;
}

static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);

	of_mm_gpiochip_remove(&chip->mmchip);

	return 0;
}

static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
	{ .compatible = "fsl,mpc5200-gpio-wkup", },
	{}
};

static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
	.driver = {
		.name = "mpc5200-gpio-wkup",
		.of_match_table = mpc52xx_wkup_gpiochip_match,
	},
	.probe = mpc52xx_wkup_gpiochip_probe,
	.remove = mpc52xx_gpiochip_remove,
};

/*
 * GPIO LIB API implementation for simple GPIOs
 *
 * There's a maximum of 32 simple GPIOs. Which of these are available
 * for use depends on your board setup.
 * The numbering reflects the bit numbering in the port registers:
 *
 *  0..1  > reserved
 *  2..3  > IRDA
 *  4..7  > ETHR
 *  8..11 > reserved
 * 12..15 > USB
 * 16..17 > reserved
 * 18..23 > PSC3
 * 24..27 > PSC2
 * 28..31 > PSC1
 */
static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned int ret;

	ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;

	return ret;
}

static inline void
__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;

	if (val)
		chip->shadow_dvo |= 1 << (31 - gpio);
	else
		chip->shadow_dvo &= ~(1 << (31 - gpio));
	out_be32(&regs->simple_dvo, chip->shadow_dvo);
}

static void
mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	__mpc52xx_simple_gpio_set(gc, gpio, val);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
}

static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* set the direction */
	chip->shadow_ddr &= ~(1 << (31 - gpio));
	out_be32(&regs->simple_ddr, chip->shadow_ddr);

	/* and enable the pin */
	chip->shadow_gpioe |= 1 << (31 - gpio);
	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	return 0;
}

static int
mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	unsigned long flags;

	spin_lock_irqsave(&gpio_lock, flags);

	/* First set initial value */
	__mpc52xx_simple_gpio_set(gc, gpio, val);

	/* Then set direction */
	chip->shadow_ddr |= 1 << (31 - gpio);
	out_be32(&regs->simple_ddr, chip->shadow_ddr);

	/* Finally enable the pin */
	chip->shadow_gpioe |= 1 << (31 - gpio);
	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);

	spin_unlock_irqrestore(&gpio_lock, flags);

	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);

	return 0;
}

static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
{
	struct mpc52xx_gpiochip *chip;
	struct gpio_chip *gc;
	struct mpc52xx_gpio __iomem *regs;
	int ret;

	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	platform_set_drvdata(ofdev, chip);

	gc = &chip->mmchip.gc;

	gc->ngpio            = 32;
	gc->direction_input  = mpc52xx_simple_gpio_dir_in;
	gc->direction_output = mpc52xx_simple_gpio_dir_out;
	gc->get              = mpc52xx_simple_gpio_get;
	gc->set              = mpc52xx_simple_gpio_set;

	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
	if (ret)
		return ret;

	regs = chip->mmchip.regs;
	chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
	chip->shadow_ddr = in_be32(&regs->simple_ddr);
	chip->shadow_dvo = in_be32(&regs->simple_dvo);

	return 0;
}

static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
	{ .compatible = "fsl,mpc5200-gpio", },
	{}
};

static struct platform_driver mpc52xx_simple_gpiochip_driver = {
	.driver = {
		.name = "mpc5200-gpio",
		.of_match_table = mpc52xx_simple_gpiochip_match,
	},
	.probe = mpc52xx_simple_gpiochip_probe,
	.remove = mpc52xx_gpiochip_remove,
};

static struct platform_driver * const drivers[] = {
	&mpc52xx_wkup_gpiochip_driver,
	&mpc52xx_simple_gpiochip_driver,
};

static int __init mpc52xx_gpio_init(void)
{
	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
}

/* Make sure we get initialised before anyone else tries to use us */
subsys_initcall(mpc52xx_gpio_init);

static void __exit mpc52xx_gpio_exit(void)
{
	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
}
module_exit(mpc52xx_gpio_exit);

MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
3cd2550c SH	1	/*
	2	* MPC52xx gpio driver
	3	*
	4	* Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2
	8	* as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	*/
	19
	20	#include <linux/of.h>
	21	#include <linux/kernel.h>
5a0e3ad6	22	#include <linux/slab.h>
3cd2550c SH	23	#include <linux/of_gpio.h>
	24	#include <linux/io.h>
	25	#include <linux/of_platform.h>
bb207ef1	26	#include <linux/module.h>
3cd2550c	27
3cd2550c SH	28	#include <asm/mpc52xx.h>
	29	#include <sysdev/fsl_soc.h>
	30
	31	static DEFINE_SPINLOCK(gpio_lock);
	32
	33	struct mpc52xx_gpiochip {
	34	struct of_mm_gpio_chip mmchip;
	35	unsigned int shadow_dvo;
	36	unsigned int shadow_gpioe;
	37	unsigned int shadow_ddr;
	38	};
	39
	40	/*
	41	* GPIO LIB API implementation for wakeup GPIOs.
	42	*
	43	* There's a maximum of 8 wakeup GPIOs. Which of these are available
	44	* for use depends on your board setup.
	45	*
	46	* 0 -> GPIO_WKUP_7
	47	* 1 -> GPIO_WKUP_6
	48	* 2 -> PSC6_1
	49	* 3 -> PSC6_0
	50	* 4 -> ETH_17
	51	* 5 -> PSC3_9
	52	* 6 -> PSC2_4
	53	* 7 -> PSC1_4
	54	*
	55	*/
	56	static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
	57	{
	58	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	59	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	60	unsigned int ret;
	61
	62	ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;
	63
	64	pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
	65
	66	return ret;
	67	}
	68
	69	static inline void
	70	__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	71	{
	72	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	73	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	74	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
	75
	76	if (val)
	77	chip->shadow_dvo \|= 1 << (7 - gpio);
	78	else
	79	chip->shadow_dvo &= ~(1 << (7 - gpio));
	80
	81	out_8(&regs->wkup_dvo, chip->shadow_dvo);
	82	}
	83
	84	static void
	85	mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	86	{
	87	unsigned long flags;
	88
	89	spin_lock_irqsave(&gpio_lock, flags);
	90
	91	__mpc52xx_wkup_gpio_set(gc, gpio, val);
	92
	93	spin_unlock_irqrestore(&gpio_lock, flags);
	94
	95	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	96	}
	97
	98	static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	99	{
	100	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	101	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	102	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
3cd2550c SH	103	unsigned long flags;
	104
	105	spin_lock_irqsave(&gpio_lock, flags);
	106
	107	/* set the direction */
	108	chip->shadow_ddr &= ~(1 << (7 - gpio));
	109	out_8(&regs->wkup_ddr, chip->shadow_ddr);
	110
	111	/* and enable the pin */
	112	chip->shadow_gpioe \|= 1 << (7 - gpio);
	113	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
	114
	115	spin_unlock_irqrestore(&gpio_lock, flags);
	116
	117	return 0;
	118	}
	119
	120	static int
	121	mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	122	{
	123	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
93072457	124	struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
837c2705	125	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	126	unsigned long flags;
	127
	128	spin_lock_irqsave(&gpio_lock, flags);
	129
	130	__mpc52xx_wkup_gpio_set(gc, gpio, val);
	131
	132	/* Then set direction */
	133	chip->shadow_ddr \|= 1 << (7 - gpio);
	134	out_8(&regs->wkup_ddr, chip->shadow_ddr);
	135
	136	/* Finally enable the pin */
	137	chip->shadow_gpioe \|= 1 << (7 - gpio);
	138	out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
	139
	140	spin_unlock_irqrestore(&gpio_lock, flags);
	141
	142	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	143
	144	return 0;
	145	}
	146
3836309d	147	static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
3cd2550c SH	148	{
3cd2550c SH	149	struct mpc52xx_gpiochip *chip;
93072457	150	struct mpc52xx_gpio_wkup __iomem *regs;
a19e3da5	151	struct gpio_chip *gc;
3cd2550c SH	152	int ret;
3cd2550c SH	153
f91b2dbb	154	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
3cd2550c SH	155	if (!chip)
	156	return -ENOMEM;
	157
f91b2dbb RRD	158	platform_set_drvdata(ofdev, chip);
f91b2dbb RRD	159
a19e3da5	160	gc = &chip->mmchip.gc;
3cd2550c	161
a19e3da5 AV	162	gc->ngpio = 8;
	163	gc->direction_input = mpc52xx_wkup_gpio_dir_in;
	164	gc->direction_output = mpc52xx_wkup_gpio_dir_out;
	165	gc->get = mpc52xx_wkup_gpio_get;
	166	gc->set = mpc52xx_wkup_gpio_set;
3cd2550c	167
837c2705	168	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
3cd2550c SH	169	if (ret)
	170	return ret;
	171
	172	regs = chip->mmchip.regs;
	173	chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
	174	chip->shadow_ddr = in_8(&regs->wkup_ddr);
	175	chip->shadow_dvo = in_8(&regs->wkup_dvo);
	176
	177	return 0;
	178	}
	179
a454dc50	180	static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
3cd2550c	181	{
f91b2dbb RRD	182	struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
	183
	184	of_mm_gpiochip_remove(&chip->mmchip);
	185
	186	return 0;
3cd2550c SH	187	}
	188
	189	static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
6eae1ace	190	{ .compatible = "fsl,mpc5200-gpio-wkup", },
3cd2550c SH	191	{}
	192	};
	193
00006124	194	static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
4018294b	195	.driver = {
6eae1ace	196	.name = "mpc5200-gpio-wkup",
4018294b GL	197	.of_match_table = mpc52xx_wkup_gpiochip_match,
4018294b GL	198	},
3cd2550c SH	199	.probe = mpc52xx_wkup_gpiochip_probe,
	200	.remove = mpc52xx_gpiochip_remove,
	201	};
	202
	203	/*
	204	* GPIO LIB API implementation for simple GPIOs
	205	*
	206	* There's a maximum of 32 simple GPIOs. Which of these are available
	207	* for use depends on your board setup.
	208	* The numbering reflects the bit numbering in the port registers:
	209	*
	210	* 0..1 > reserved
	211	* 2..3 > IRDA
	212	* 4..7 > ETHR
	213	* 8..11 > reserved
	214	* 12..15 > USB
	215	* 16..17 > reserved
	216	* 18..23 > PSC3
	217	* 24..27 > PSC2
	218	* 28..31 > PSC1
	219	*/
	220	static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
	221	{
	222	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
	223	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	224	unsigned int ret;
	225
	226	ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;
	227
	228	return ret;
	229	}
	230
	231	static inline void
	232	__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	233	{
	234	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	235	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
3cd2550c SH	236	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
	237
	238	if (val)
	239	chip->shadow_dvo \|= 1 << (31 - gpio);
	240	else
	241	chip->shadow_dvo &= ~(1 << (31 - gpio));
	242	out_be32(&regs->simple_dvo, chip->shadow_dvo);
	243	}
	244
	245	static void
	246	mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
	247	{
	248	unsigned long flags;
	249
	250	spin_lock_irqsave(&gpio_lock, flags);
	251
	252	__mpc52xx_simple_gpio_set(gc, gpio, val);
	253
	254	spin_unlock_irqrestore(&gpio_lock, flags);
	255
	256	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	257	}
	258
	259	static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
	260	{
	261	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	262	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	263	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
3cd2550c SH	264	unsigned long flags;
	265
	266	spin_lock_irqsave(&gpio_lock, flags);
	267
	268	/* set the direction */
	269	chip->shadow_ddr &= ~(1 << (31 - gpio));
	270	out_be32(&regs->simple_ddr, chip->shadow_ddr);
	271
	272	/* and enable the pin */
	273	chip->shadow_gpioe \|= 1 << (31 - gpio);
	274	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
	275
	276	spin_unlock_irqrestore(&gpio_lock, flags);
	277
	278	return 0;
	279	}
	280
	281	static int
	282	mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
	283	{
	284	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
837c2705	285	struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
93072457	286	struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
3cd2550c SH	287	unsigned long flags;
	288
	289	spin_lock_irqsave(&gpio_lock, flags);
	290
	291	/* First set initial value */
	292	__mpc52xx_simple_gpio_set(gc, gpio, val);
	293
	294	/* Then set direction */
	295	chip->shadow_ddr \|= 1 << (31 - gpio);
	296	out_be32(&regs->simple_ddr, chip->shadow_ddr);
	297
	298	/* Finally enable the pin */
	299	chip->shadow_gpioe \|= 1 << (31 - gpio);
	300	out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
	301
	302	spin_unlock_irqrestore(&gpio_lock, flags);
	303
	304	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
	305
	306	return 0;
	307	}
	308
3836309d	309	static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
3cd2550c SH	310	{
3cd2550c SH	311	struct mpc52xx_gpiochip *chip;
a19e3da5	312	struct gpio_chip *gc;
93072457	313	struct mpc52xx_gpio __iomem *regs;
3cd2550c SH	314	int ret;
3cd2550c SH	315
f91b2dbb	316	chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
3cd2550c SH	317	if (!chip)
	318	return -ENOMEM;
	319
f91b2dbb RRD	320	platform_set_drvdata(ofdev, chip);
f91b2dbb RRD	321
a19e3da5	322	gc = &chip->mmchip.gc;
3cd2550c	323
a19e3da5 AV	324	gc->ngpio = 32;
	325	gc->direction_input = mpc52xx_simple_gpio_dir_in;
	326	gc->direction_output = mpc52xx_simple_gpio_dir_out;
	327	gc->get = mpc52xx_simple_gpio_get;
	328	gc->set = mpc52xx_simple_gpio_set;
3cd2550c	329
837c2705	330	ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
3cd2550c SH	331	if (ret)
	332	return ret;
	333
	334	regs = chip->mmchip.regs;
	335	chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
	336	chip->shadow_ddr = in_be32(&regs->simple_ddr);
	337	chip->shadow_dvo = in_be32(&regs->simple_dvo);
	338
	339	return 0;
	340	}
	341
	342	static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
6eae1ace	343	{ .compatible = "fsl,mpc5200-gpio", },
3cd2550c SH	344	{}
	345	};
	346
00006124	347	static struct platform_driver mpc52xx_simple_gpiochip_driver = {
4018294b	348	.driver = {
6eae1ace	349	.name = "mpc5200-gpio",
4018294b GL	350	.of_match_table = mpc52xx_simple_gpiochip_match,
4018294b GL	351	},
3cd2550c SH	352	.probe = mpc52xx_simple_gpiochip_probe,
	353	.remove = mpc52xx_gpiochip_remove,
	354	};
	355
20d7090f TR	356	static struct platform_driver * const drivers[] = {
	357	&mpc52xx_wkup_gpiochip_driver,
	358	&mpc52xx_simple_gpiochip_driver,
	359	};
	360
3cd2550c SH	361	static int __init mpc52xx_gpio_init(void)
3cd2550c SH	362	{
20d7090f	363	return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
3cd2550c SH	364	}
3cd2550c SH	365
3cd2550c SH	366	/* Make sure we get initialised before anyone else tries to use us */
	367	subsys_initcall(mpc52xx_gpio_init);
	368
f91b2dbb RRD	369	static void __exit mpc52xx_gpio_exit(void)
f91b2dbb RRD	370	{
20d7090f	371	platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
f91b2dbb RRD	372	}
f91b2dbb RRD	373	module_exit(mpc52xx_gpio_exit);
3cd2550c SH	374
	375	MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
	376	MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
	377	MODULE_LICENSE("GPL v2");
	378